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公开(公告)号：US20220384474A1
公开(公告)日：2022-12-01
申请号：US17459456
申请日：2021-08-27
发明人： Yuancheng Yang , Bingjie Yan , Di Wang , Cuicui Kong , Wenxi Zhou
IPC分类号： H01L27/11582
摘要： A three-dimensional (3D) memory device includes a doped semiconductor layer, a stack structure, and a channel structure. The stack structure includes interleaved conductive layers and dielectric layers formed on the doped semiconductor layer. The conductive layers include a plurality of word lines, and a drain select gate line. The channel structure extends through the stack structure along a first direction and is in contact with the doped semiconductor layer. The drain select gate line includes a first dielectric layer in contact with the channel structure, and a first polysilicon layer in contact with the first dielectric layer.
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公开(公告)号：US20220115392A1
公开(公告)日：2022-04-14
申请号：US17559181
申请日：2021-12-22
发明人： Zhong Zhang , Yuhui Han , Cuicui Kong , Kun Zhang
IPC分类号： H01L27/11536 , H01L27/11551 , H01L27/11578
摘要： A three-dimensional memory includes a stack structure, a dummy structure and a gate line slit. The stack structure includes gate line layers and isolation layers stacked alternatively in the vertical direction. The dummy structure includes a first dummy section and a second dummy section. The gate line slit has one end extending into a gap formed by at least one of the first dummy section or the second dummy section. At least one of the first dummy section and the second dummy section partially overlaps a projection of the gate line slit onto the horizontal plane to realize connection between the dummy structure and the gate line slit.
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公开(公告)号：US20240074181A1
公开(公告)日：2024-02-29
申请号：US17896959
申请日：2022-08-26
发明人： Linchun Wu , Kun Zhang , Wenxi Zhou , Cuicui Kong , Shuangshuang Wu , Zhiliang Xia , Zongliang Huo
IPC分类号： H01L27/11582 , H01L23/528 , H01L27/11519 , H01L27/11556 , H01L27/11565
CPC分类号： H01L27/11582 , H01L23/5283 , H01L27/11519 , H01L27/11556 , H01L27/11565
摘要： A memory device includes a stack structure, channel structures, and a slit structure. The stack structure includes interleaved conductive layers and dielectric layers, and the conductive layers include a plurality of word lines. Each of the channel structures extends vertically through the stack structure. The slit structure extends vertically through the stack structure. An outer region of the stack structure includes a staircase structure, and the interleaved conductive layers and dielectric layers in a bottom portion of the stack structure are wider than the interleaved conductive layers and dielectric layers in a top portion of the stack structure. A first outer width of the slit structure in the bottom portion of the stack structure is greater than a second outer width of the slit structure in the top portion of the stack structure.
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4.发明授权公开(公告)号：US11849575B2
公开(公告)日：2023-12-19
申请号：US17147400
申请日：2021-01-12
发明人： Kun Zhang , Cuicui Kong , Zhong Zhang , Wenxi Zhou
摘要： Embodiments of 3D memory devices having a concentric staircase structure and methods for forming the same are disclosed. In an example, a 3D memory device includes a memory array structure and a concentric staircase structure in an intermediate of the memory array structure. The concentric staircase structure includes a plurality of concentric zones in a radial direction in a plan view. Each of the plurality of concentric zones includes a plurality of stairs in a tangential direction in the plan view.
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公开(公告)号：US20240188292A1
公开(公告)日：2024-06-06
申请号：US18091000
申请日：2022-12-29
发明人： Cuicui Kong , Kun Zhang , Yuhui Han , Linchun Wu , Shuangshuang Wu , Zhiliang Xia , Zongliang Huo , Jingtao Xie , Bingjie Yan , Di Wang , Wenxi Zhou
CPC分类号： H01L27/11582 , H01L27/11556
摘要： In certain aspects, a three-dimensional (3D) memory device includes channel structures in a first region, word line pick-up structures in a second region, and word lines each extending from the first region into at least a portion of the second region. At least one word line pick-up structure includes multiple sections each electrically connected to a different word line.
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6.发明申请公开(公告)号：US20220139941A1
公开(公告)日：2022-05-05
申请号：US17147400
申请日：2021-01-12
发明人： Kun Zhang , Cuicui Kong , Zhong Zhang , Wenxi Zhou
IPC分类号： H01L27/11551 , H01L27/11519 , H01L27/11524 , H01L27/11565 , H01L27/1157 , H01L27/11578
摘要： Embodiments of 3D memory devices having a concentric staircase structure and methods for forming the same are disclosed. In an example, a 3D memory device includes a memory array structure and a concentric staircase structure in an intermediate of the memory array structure. The concentric staircase structure includes a plurality of concentric zones in a radial direction in a plan view. Each of the plurality of concentric zones includes a plurality of stairs in a tangential direction in the plan view.
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公开(公告)号：US20220130854A1
公开(公告)日：2022-04-28
申请号：US17147388
申请日：2021-01-12
发明人： Cuicui Kong , Zhong Zhang , Linchun Wu , Kun Zhang , Wenxi Zhou
IPC分类号： H01L27/11582 , H01L27/11556 , H01L27/11565 , H01L27/11519
摘要： Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a 3D memory device includes a memory stack, a semiconductor layer, a supporting structure, a spacer structure, and a contact structure. The memory stack includes interleaved conductive layers and dielectric layers and includes a staircase region in a plan view. The semiconductor layer is in contact with the memory stack. The supporting structure overlaps the staircase region of the memory stack and is coplanar with the semiconductor layer. The supporting structure includes a material other than a material of the semiconductor layer. The spacer structure is outside the memory stack and is coplanar with the supporting structure and the semiconductor layer. The contact structure extends vertically and is surrounded by the spacer structure.
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