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    Sputtering Apparatus, Thin-Film Forming Method, and Manufacturing Method for a Field Effect Transistor
    3.
    发明申请
    Sputtering Apparatus, Thin-Film Forming Method, and Manufacturing Method for a Field Effect Transistor 审中-公开
    溅射装置，薄膜​​形成方法和场效应晶体管的制造方法

    公开(公告)号：US20110201150A1

    公开(公告)日：2011-08-18

    申请号：US13123728

    申请日：2009-10-09

    申请人： Takaomi Kurata ,  Junya Kiyota ,  Makoto Arai ,  Yasuhiko Akamatsu ,  Satoru Ishibashi ,  Kazuya Saito

    发明人： Takaomi Kurata ,  Junya Kiyota ,  Makoto Arai ,  Yasuhiko Akamatsu ,  Satoru Ishibashi ,  Kazuya Saito

    IPC分类号： H01L21/36 ,  C23C14/34 ,  C23C14/08

    CPC分类号： C23C14/352 ,  C23C14/568 ,  H01J37/32752 ,  H01J37/3408

    摘要： [Object] To provide a sputtering apparatus, a thin-film forming method, and a manufacturing method for a field effect transistor, which are capable of reducing damage of a base layer.[Solving Means] The sputtering apparatus 100 includes a conveying mechanism, a first target Tc1, a second target (Tc2 to Tc5), and a sputtering means. The conveying mechanism conveys a supporting portion, which is arranged in an inside of a vacuum chamber and supports a substrate, linearly along a conveying surface parallel to the surface to be processed of the substrate. The first target Tc1 is opposed to the conveying surface with a first space therebetween. The second target (Tc2 to Tc5) is arranged on a downstream side in a conveying direction of the substrate with respect to the first target Tc1, and is opposed to the conveying surface with a second space smaller than the first space therebetween. The sputtering means sputters each target. According to this sputtering apparatus 100, the damage received by the base layer is small, and hence it is possible to form a thin-film having good film-forming properties.

    摘要翻译： 本发明提供能够降低基底层损伤的溅射装置，薄膜​​形成方法和场效晶体管的制造方法。 [解决方案]溅射装置100包括传送机构，第一目标Tc1，第二目标（Tc2至Tc5）和溅射装置。 传送机构传送支撑部分，其布置在真空室的内部并且沿着平行于待处理基板的表面的输送表面线性地支撑基板。 第一目标Tc1与其间具有第一空间的输送表面相对。 第二靶（Tc2〜Tc5）相对于第一靶Tc1布置在基板的输送方向的下游侧，并且与输送面相对，第二空间小于第一空间。 溅射意味着喷射每个目标。 根据该溅射装置100，由基底层接收的损伤小，因此可以形成具有良好成膜性能的薄膜。

    Sputtering Apparatus, Thin-Film Forming Method, and Manufacturing Method for a Field Effect Transistor
    4.
    发明申请
    Sputtering Apparatus, Thin-Film Forming Method, and Manufacturing Method for a Field Effect Transistor 审中-公开
    溅射装置，薄膜​​形成方法和场效应晶体管的制造方法

    公开(公告)号：US20110195562A1

    公开(公告)日：2011-08-11

    申请号：US13123727

    申请日：2009-10-14

    申请人： Takaomi Kurata ,  Junya Kiyota ,  Makoto Arai ,  Yasuhiko Akamatsu ,  Satoru Ishibashi ,  Kazuya Saito

    发明人： Takaomi Kurata ,  Junya Kiyota ,  Makoto Arai ,  Yasuhiko Akamatsu ,  Satoru Ishibashi ,  Kazuya Saito

    IPC分类号： H01L21/203 ,  C23C14/34

    CPC分类号： C23C14/083 ,  C23C14/35 ,  H01J37/3408 ,  H01J37/3455

    摘要： [Object] To provide a sputtering apparatus, a thin-film forming method, and a manufacturing method for a field effect transistor, which are capable of reducing damage of a base layer.[Solving Means] A sputtering apparatus according to an embodiment of the present invention is a sputtering apparatus for forming a thin-film on a surface to be processed of a substrate 10, and includes a vacuum chamber 61, a supporting portion 93, a target 80, and a magnet 83. The magnet 83 generates plasma forming a region to be sputtered 80a, and moves the region to be sputtered 80abetween a first position in which the region to be sputtered 80a is not opposed to the surface to be processed and a second position in which the region to be sputtered is opposed to the surface to be processed. With this, it is possible to weaken incident energy of sputtered particles incident on the surface to be processed of the substrate 10 from the region to be sputtered 80a, and to protect the base layer.

    摘要翻译： 本发明提供能够降低基底层损伤的溅射装置，薄膜​​形成方法和场效晶体管的制造方法。 本发明的实施方式的溅射装置是在基板10的被处理面上形成薄膜的溅射装置，具有真空室61，支撑部93，靶 80和磁体83.磁体83产生等离子体，形成要溅射的区域80a，并且在要溅射的区域80a与待处理的表面不相对的第一位置之间移动要溅射的区域80， 第二位置，其中要溅射的区域与待处理的表面相对。 由此，可以从入射到被溅射区域80a上的入射到待处理基板10的表面上的溅射粒子的入射能量减弱，从而保护基底层。

    MAGNETRON SPUTTERING ELECTRODE, AND SPUTTERING APPARATUS PROIDED WITH MAGNETRON SPUTTERING ELECTRODE
    6.
    发明申请
    MAGNETRON SPUTTERING ELECTRODE, AND SPUTTERING APPARATUS PROIDED WITH MAGNETRON SPUTTERING ELECTRODE 有权
    MAGNETRON喷溅电极，以及配有MAGNETRON SPUTTERING ELECTRODE的溅射装置

    公开(公告)号：US20100051454A1

    公开(公告)日：2010-03-04

    申请号：US12514513

    申请日：2007-11-13

    申请人： Yasuhiko Akamatsu ,  Tatsunori Isobe ,  Makoto Arai ,  Junya Kiyota ,  Takashi Komatsu

    发明人： Yasuhiko Akamatsu ,  Tatsunori Isobe ,  Makoto Arai ,  Junya Kiyota ,  Takashi Komatsu

    IPC分类号： C23C14/35

    CPC分类号： C23C14/35 ,  C23C14/3407 ,  H01J37/3408 ,  H01J37/3455

    摘要： In a magnetron sputtering apparatus an arrangement is made such that the peripheral portion of a target is uniformly eroded to attain a high efficiency in target utilization and, in addition, that an abnormal discharging hardly occurs to thereby enable satisfactory thin film forming. A magnet assembly is provided behind a target that is disposed opposite to the process substrate. This magnet assembly has a central magnet that is disposed linearly along the longitudinal direction, and a peripheral magnet that is disposed so as to enclose the periphery of the central magnet, while changing the polarity on the side of the target. At this time, among the respective magnetic fluxes generated between the central magnet and the peripheral magnet at the longitudinally end portions of the magnet assembly, the position at which the vertical component of the magnetic field becomes zero is locally shifted to the central magnet within a certain range.

    摘要翻译： 在磁控管溅射装置中，使得靶的周边部分均匀地被侵蚀以达到目标利用率高的结构，并且几乎不发生异常放电，从而能够令人满意的薄膜形成。 设置在与加工基板相对设置的靶之后的磁体组件。 该磁体组件具有沿着纵向方向线性设置的中心磁体，以及设置成围绕中心磁体的周边而设置的外围磁体，同时改变目标侧的极性。 此时，在磁体组件的纵向端部处的中心磁体和周边磁体之间产生的各磁通中，磁场的垂直分量为零的位置在一定位置内局部偏移到中心磁体 一定范围

    Magnetron sputtering electrode, and sputtering apparatus provided with magnetron sputtering electrode
    7.
    发明授权
    Magnetron sputtering electrode, and sputtering apparatus provided with magnetron sputtering electrode 有权
    磁控溅射电极和设置有磁控溅射电极的溅射装置

    公开(公告)号：US08172993B2

    公开(公告)日：2012-05-08

    申请号：US12514513

    申请日：2007-11-13

    申请人： Yasuhiko Akamatsu ,  Tatsunori Isobe ,  Makoto Arai ,  Junya Kiyota ,  Takashi Komatsu

    发明人： Yasuhiko Akamatsu ,  Tatsunori Isobe ,  Makoto Arai ,  Junya Kiyota ,  Takashi Komatsu

    IPC分类号： C23C14/35

    CPC分类号： C23C14/35 ,  C23C14/3407 ,  H01J37/3408 ,  H01J37/3455

    摘要： In a magnetron sputtering apparatus an arrangement is made such that the peripheral portion of a target is uniformly eroded to attain a high efficiency in target utilization and, in addition, that an abnormal discharging hardly occurs to thereby enable satisfactory thin film forming. A magnet assembly is provided behind a target that is disposed opposite to the process substrate. This magnet assembly has a central magnet that is disposed linearly along the longitudinal direction, and a peripheral magnet that is disposed so as to enclose the periphery of the central magnet, while changing the polarity on the side of the target. At this time, among the respective magnetic fluxes generated between the central magnet and the peripheral magnet at the longitudinally end portions of the magnet assembly, the position at which the vertical component of the magnetic field becomes zero is locally shifted to the central magnet within a certain range.

    摘要翻译： 在磁控管溅射装置中，使得靶的周边部分均匀地被侵蚀以达到目标利用率高的结构，并且几乎不发生异常放电，从而能够令人满意的薄膜形成。 设置在与加工基板相对设置的靶之后的磁体组件。 该磁体组件具有沿着纵向方向线性设置的中心磁体，以及设置成围绕中心磁体的周边而设置的外围磁体，同时改变目标侧的极性。 此时，在磁体组件的纵向端部处的中心磁体和周边磁体之间产生的各磁通中，磁场的垂直分量为零的位置在一定位置内局部偏移到中心磁体 一定范围

    Manufacturing method of CMOS type semiconductor device, and CMOS type semiconductor device
    8.
    发明授权
    Manufacturing method of CMOS type semiconductor device, and CMOS type semiconductor device 有权
    CMOS型半导体器件的制造方法以及CMOS型半导体器件

    公开(公告)号：US07863125B2

    公开(公告)日：2011-01-04

    申请号：US12492648

    申请日：2009-06-26

    申请人： Shimpei Tsujikawa ,  Yasuhiko Akamatsu ,  Hiroshi Umeda ,  Jiro Yugami ,  Masaharu Mizutani ,  Masao Inoue ,  Junichi Tsuchimoto ,  Kouji Nomura

    发明人： Shimpei Tsujikawa ,  Yasuhiko Akamatsu ,  Hiroshi Umeda ,  Jiro Yugami ,  Masaharu Mizutani ,  Masao Inoue ,  Junichi Tsuchimoto ,  Kouji Nomura

    IPC分类号： H01L21/8238

    CPC分类号： H01L21/823857

    摘要： The manufacturing method of the CMOS type semiconductor device which can suppress the boron penetration from the gate electrode of the pMOS transistors to the semiconductor substrate in the case that boron is contained in the gate electrodes, while enabling the improvement in the NBTI lifetime of the pMOS transistors, without degrading the performance of the nMOS transistors, is offered. The manufacturing method of the CMOS type semiconductor device concerning the present invention has the following process steps. Halogen is introduced to the semiconductor substrate of pMOS transistor formation areas. Next, a gate insulating film is formed on the semiconductor substrate of the pMOS transistor formation areas. Next, nitrogen is introduced to the gate insulating film.

    摘要翻译： 在这种CMOS型半导体器件的制造方法中，能够抑制在栅极电极中含有硼的情况下，从pMOS晶体管的栅电极到半导体衬底的硼渗透，同时能够提高pMOS的NBTI寿命 提供了晶体管，而不降低nMOS晶体管的性能。 关于本发明的CMOS型半导体器件的制造方法具有以下工序。 卤素引入pMOS晶体管形成区域的半导体衬底。 接下来，在pMOS晶体管形成区域的半导体衬底上形成栅极绝缘膜。 接下来，将氮引入到栅极绝缘膜。

    Manufacturing method of CMOS type semiconductor device, and CMOS type semiconductor device
    9.
    发明授权
    Manufacturing method of CMOS type semiconductor device, and CMOS type semiconductor device 有权
    CMOS型半导体器件的制造方法以及CMOS型半导体器件

    公开(公告)号：US07569890B2

    公开(公告)日：2009-08-04

    申请号：US11409081

    申请日：2006-04-24

    申请人： Shimpei Tsujikawa ,  Yasuhiko Akamatsu ,  Hiroshi Umeda ,  Jiro Yugami ,  Masaharu Mizutani ,  Masao Inoue ,  Junichi Tsuchimoto ,  Kouji Nomura

    发明人： Shimpei Tsujikawa ,  Yasuhiko Akamatsu ,  Hiroshi Umeda ,  Jiro Yugami ,  Masaharu Mizutani ,  Masao Inoue ,  Junichi Tsuchimoto ,  Kouji Nomura

    IPC分类号： H01L23/62

    CPC分类号： H01L21/823857

    摘要： The manufacturing method of the CMOS type semiconductor device which can suppress the boron penetration from the gate electrode of the pMOS transistors to the semiconductor substrate in the case that boron is contained in the gate electrodes, while enabling the improvement in the NBTI lifetime of the pMOS transistors, without degrading the performance of the nMOS transistors, is offered.The manufacturing method of the CMOS type semiconductor device concerning the present invention has the following process steps. Halogen is introduced to the semiconductor substrate of pMOS transistor formation areas. Next, a gate insulating film is formed on the semiconductor substrate of the pMOS transistor formation areas. Next, nitrogen is introduced to the gate insulating film.

    摘要翻译： 在这种CMOS型半导体器件的制造方法中，能够抑制在栅极电极中含有硼的情况下，从pMOS晶体管的栅电极到半导体衬底的硼渗透，同时能够提高pMOS的NBTI寿命 提供了晶体管，而不降低nMOS晶体管的性能。 关于本发明的CMOS型半导体器件的制造方法具有以下工序。 卤素引入pMOS晶体管形成区域的半导体衬底。 接下来，在pMOS晶体管形成区域的半导体衬底上形成栅极绝缘膜。 接下来，将氮引入到栅极绝缘膜。