Data processor having unified memory architecture providing priority memory access
    3.
    发明授权
    Data processor having unified memory architecture providing priority memory access 失效
    数据处理器具有统一的存储器架构,提供优先存储器

    公开(公告)号:US06717583B2

    公开(公告)日:2004-04-06

    申请号:US09991705

    申请日:2001-11-26

    IPC分类号: G06F15167

    摘要: In order to reduce degradation of the processing performance of the data processor due to use of a part of the main memory as a display frame buffer, when an access request to the memory 200 is generated from the CPU 310, the memory controller 400 holds it once, requests the display controller 560 to stop the access to the memory 200 which is in execution, when data to the access executed already is transferred from the memory 200, holds it, and transfers the access request from the CPU bus 310 which is held by the memory 200. When the access from the CPU bus 310 ends, the memory controller 400 restarts the access stopped in the display controller 560 and passes the held data to the display controller 560.

    摘要翻译: 为了减少由于使用主存储器的一部分作为显示帧缓冲器而导致的数据处理器的处理性能的劣化,当从CPU 310产生对存储器200的访问请求时,存储器控制器400保持 一旦请求显示控制器560停止对正在执行的存储器200的访问,当已经从存储器200传送已经执行的访问的数据时,显示控制器560保持它,并且从被保持的CPU总线310传送访问请求 当CPU总线310的访问结束时,存储器控制器400重新启动在显示控制器560中停止的访问,并将保持的数据传送到显示控制器560。

    Data processing apparatus and register address translation method thereof
    4.
    发明授权
    Data processing apparatus and register address translation method thereof 失效
    数据处理装置及其寄存器地址转换方法

    公开(公告)号:US6167497A

    公开(公告)日:2000-12-26

    申请号:US871978

    申请日:1997-06-10

    CPC分类号: G06F9/30138

    摘要: A data processing apparatus includes physical registers larger in number than logical registers specified by a register specification field of an instruction executed by the apparatus. The physical registers are classified into a plurality of banks. In response to a particular instruction, an execution control section supplies a register address converter with bank information to select a bank of the physical register. The converter stores the bank information in a bank register. Receiving logical register address information specified by the register specification field of the instruction, the address converter adds the bank information set to the bank register to at least a portion of the logical register address information, thereby producing a physical register address which can specify any one of the physical registers.

    摘要翻译: 数据处理装置包括数量大于由装置执行的指令的寄存器指定字段指定的逻辑寄存器的物理寄存器。 物理寄存器分为多个存储体。 响应于特定指令,执行控制部分向寄存器地址转换器提供银行信息以选择一个物理寄存器组。 转换器将银行信息存储在银行寄存器中。 接收由指令的寄存器指定字段指定的逻辑寄存器地址信息,地址转换器将存储体信息设置添加到存储体寄存器至少部分逻辑寄存器地址信息,从而产生一个物理寄存器地址, 的物理寄存器。

    Data processor apparatus and shading apparatus
    7.
    发明授权
    Data processor apparatus and shading apparatus 失效
    数据处理装置和遮光装置

    公开(公告)号:US06433782B1

    公开(公告)日:2002-08-13

    申请号:US08894786

    申请日:1997-08-28

    IPC分类号: G06T1550

    摘要: In a data processor and a shading apparatus used in the data processor, the data processor selects an address based on the information of a memory or a translation look-aside buffer. Therefore, even when the same data are accessed, a different address at high speed is adopted according to the hardware, object to be processed, processing, etc. A plurality of geometric vectors are given as the parameters for the vertexes of a picture, the vectors are interpolated in the picture, and the luminance of each small area in the figure is calculated using the vectors generated by the interpolation. Therefore, a spotlight or highlight can be expressed with high accuracy and at high speed even when the amount of the hardware and the extent of the picture are small.

    摘要翻译: 在数据处理器中使用的数据处理器和着色装置中,数据处理器根据存储器或翻译后备缓冲器的信息来选择一个地址。 因此,即使在访问相同的数据的情况下,也可以根据硬件,被处理对象,处理等来采用高速的不同的地址。作为图像的顶点的参数,给出多个几何矢量, 矢量被内插在图像中,并且使用通过内插生成的矢量来计算图中每个小区域的亮度。 因此,即使当硬件的数量和图像的程度小时,也可以高精度和高速度地表现聚光灯或高光。

    Data processing apparatus and shading apparatus
    9.
    发明授权
    Data processing apparatus and shading apparatus 失效
    数据处理装置和遮光装置

    公开(公告)号:US06806875B2

    公开(公告)日:2004-10-19

    申请号:US10175805

    申请日:2002-06-21

    IPC分类号: G06T1550

    摘要: In a data processor and a shading apparatus used in the data processor, the data processor selects an address based on the information of a memory or a translation look-aside buffer. Therefore, even when the same data are accessed, a different address at high speed is adopted according to the hardware, object to be processed, processing, etc. A plurality of geometric vectors are given as the parameters for the vertexes of a picture, the vectors are interpolated in the picture, and the luminance of each small area in the figure is calculated using the vectors generated by the interpolation. Therefore, a spotlight or highlight can be expressed with high accuracy and at high speed even when the amount of the hardware and the extent of the picture are small.

    摘要翻译: 在数据处理器中使用的数据处理器和着色装置中,数据处理器根据存储器或翻译后备缓冲器的信息来选择一个地址。 因此,即使在访问相同的数据的情况下,也可以根据硬件,被处理对象,处理等来采用高速的不同的地址。作为图像的顶点的参数,给出多个几何矢量, 矢量被内插在图像中,并且使用通过内插生成的矢量来计算图中每个小区域的亮度。 因此,即使当硬件的数量和图像的程度小时,也可以高精度和高速度地表现聚光灯或高光。