PLASMA PROCESSING DEVICE HAVING A RING-SHAPED AIR CHAMBER FOR HEAT DISSIPATION
    1.
    发明申请
    PLASMA PROCESSING DEVICE HAVING A RING-SHAPED AIR CHAMBER FOR HEAT DISSIPATION 审中-公开
    具有环形空气室的等离子体处理装置用于散热

    公开(公告)号:US20060138925A1

    公开(公告)日:2006-06-29

    申请号:US10905333

    申请日:2004-12-28

    IPC分类号: H01J7/24 H01J17/26

    摘要: A plasma processing device has a housing, a metal plate, an inner ring, and an outer ring. A vacuum chamber is formed in the housing. An air vent is installed on an upper end of the vacuum chamber for venting gaseous reactants into the vacuum chamber when performing a plasma process. The metal plate has a channel for venting gaseous matter and at least a vertical vent hole for guiding the gaseous reactants into the vacuum chamber. The inner ring and the outer ring are positioned between the housing and the metal plate, and the inner ring is surrounded by the outer ring. An air chamber formed between the inner ring and the outer ring connects with the channel of the metal plate.

    摘要翻译: 等离子体处理装置具有外壳,金属板,内圈和外圈。 在壳体中形成真空室。 在真空室的上端安装有排气孔,用于在进行等离子体处理时将气体反应物排放到真空室中。 金属板具有用于排出气态物质的通道和至少一个垂直通风孔,用于将气态反应物引导到真空室中。 内圈和外圈位于外壳和金属板之间,内圈由外圈包围。 形成在内圈和外圈之间的空气室与金属板的通道连接。

    Method for forming an opening
    2.
    发明授权
    Method for forming an opening 有权
    形成开口的方法

    公开(公告)号:US06376382B1

    公开(公告)日:2002-04-23

    申请号:US09224071

    申请日:1998-12-30

    IPC分类号: H01L21311

    CPC分类号: H01L21/76804 H01L21/31116

    摘要: A method for forming an opening is provided. The method contains forming a dielectric layer on the substrate. The dielectric layer is patterned to form a first-stage opening. A carbonic-polymer (C-polymer) concentration controlling treatment is performed to obtain a proper C-polymer concentration, which can be raised, reduced, or even down to a zero concentration. After the proper C-polymer concentration is obtained, a next-stage opening is formed by another step of etching. The C-polymer concentration controlling treatment and the etching process with a new condition for each step can be repeated until a desired opening is formed.

    摘要翻译: 提供一种形成开口的方法。 该方法包括在衬底上形成电介质层。 图案化电介质层以形成第一级开口。 进行碳聚合物(C聚合物)浓度控制处理以获得适当的C聚合物浓度,其可以升高,降低甚至降低到零浓度。 在获得适当的C-聚合物浓度之后,通过蚀刻的另一步骤形成下一阶段的开口。 可以重复用于每个步骤的C状聚合物浓度控制处理和具有新条件的蚀刻处理,直到形成期望的开口。

    Method of fabricating a plug
    3.
    发明授权
    Method of fabricating a plug 失效
    制造插头的方法

    公开(公告)号:US06221754B1

    公开(公告)日:2001-04-24

    申请号:US09181092

    申请日:1998-10-28

    IPC分类号: H01L214763

    CPC分类号: H01L21/76877

    摘要: A method of fabricating a plug etches back the first plug material layer to form a dished surface on the first plug material layer and then performs a second coverage step. A second plug material layer is formed to fill the dished surface and a hole. Thus, the slurry cannot fill the hole during chemical mechanical polishing nor can slurry react with the plug material or the first metallic layer. The reliability of the plug according to the present invention is increased. The thickness of the second plug material layer is thinner than the plug material layer of the conventional method. The thickness is decreased by about 60% when compared with the conventional method, which decreases fabrication costs.

    摘要翻译: 制造插头的方法蚀刻第一插塞材料层以在第一插塞材料层上形成碟形表面,然后执行第二覆盖步骤。 形成第二插塞材料层以填充凹陷表面和孔。 因此,浆料在化学机械抛光期间不能填充孔,也不能使浆料与塞子材料或第一金属层反应。 根据本发明的插头的可靠性增加。 第二插塞材料层的厚度比常规方法的插塞材料层薄。 与常规方法相比,厚度减少约60%,这降低了制造成本。

    Via structure and method of manufacture
    4.
    发明授权
    Via structure and method of manufacture 失效
    通过结构和制造方法

    公开(公告)号:US6080660A

    公开(公告)日:2000-06-27

    申请号:US32682

    申请日:1998-02-27

    摘要: A method for manufacturing a via structure comprising the steps of providing a semiconductor substrate, and then forming conductive line and dielectric layer over the substrate. Next, a photolithographic and a first etching operation are conducted so that an opening in the dielectric layer exposing the conductive line surface is formed. The first etching operation uses several etchants including fluorobutane, which has the highest concentration. Since there is a re-entrance structure at the bottom of the opening, a second etching operation is performed. In the second etching operation, a portion of the conductive line is etched for a fixed time interval to control the degree of etching. Consequently, a slanting surface is formed at the bottom of the opening and the re-entrance structure is eliminated. With a planarized bottom, step coverage of subsequently deposited material is increased.

    摘要翻译: 一种用于制造通孔结构的方法,包括以下步骤:提供半导体衬底,然后在衬底上形成导电线和电介质层。 接下来,进行光刻和第一蚀刻操作,从而形成暴露导电线表面的电介质层中的开口。 第一蚀刻操作使用多种蚀刻剂,包括具有最高浓度的氟代丁烷。 由于在开口的底部存在再入口结构,因此进行第二蚀刻操作。 在第二蚀刻操作中,导电线的一部分被蚀刻固定的时间间隔以控制蚀刻程度。 因此,在开口的底部形成倾斜表面,并且消除了再入口结构。 在平坦化的底部,随后沉积材料的阶梯覆盖率增加。

    Method of improving etch back process
    5.
    发明授权
    Method of improving etch back process 有权
    改进回蚀工艺的方法

    公开(公告)号:US06235644B1

    公开(公告)日:2001-05-22

    申请号:US09183853

    申请日:1998-10-30

    申请人: Hsiao-Pang Chou

    发明人: Hsiao-Pang Chou

    IPC分类号: B44C122

    摘要: A method of improving an etch back process. A substrate having a metal layer formed thereon is provided. A main etching is performed over the metal layer to form an interconnect. A first over etching is performed over a metal residue left after the main etching. A gas flush and second over etch are performed.

    摘要翻译: 一种改进回蚀工艺的方法。 提供了其上形成有金属层的基板。 在金属层上进行主蚀刻以形成互连。 在主蚀刻后留下的金属残留物上进行第一次过蚀刻。 进行气体冲洗和第二次过蚀刻。

    Method for forming opening in a semiconductor device
    6.
    发明授权
    Method for forming opening in a semiconductor device 失效
    在半导体器件中形成开口的方法

    公开(公告)号:US06214747B1

    公开(公告)日:2001-04-10

    申请号:US09428372

    申请日:1999-10-28

    IPC分类号: H01L2131

    摘要: A method for forming an opening in a semiconductor device is provided. A silicon-oxy-nitride layer is formed on a dielectric layer and then a photoresist layer with a first opening is formed on the silicon-oxy-nitride layer. A polymer film is formed on sidewalls of the first opening. A second opening narrower than the first opening is formed in the dielectric layer with the photoresist layer and the polymer film.

    摘要翻译: 提供了一种在半导体器件中形成开口的方法。 在介质层上形成硅 - 氮化物层,然后在硅 - 氮化物层上形成具有第一开口的光刻胶层。 聚合物膜形成在第一开口的侧壁上。 在具有光致抗蚀剂层和聚合物膜的电介质层中形成比第一开口窄的第二开口。

    Method removing residual photoresist
    7.
    发明授权
    Method removing residual photoresist 有权
    去除残余光刻胶的方法

    公开(公告)号:US06422246B1

    公开(公告)日:2002-07-23

    申请号:US09515952

    申请日:2000-02-29

    IPC分类号: B08B900

    CPC分类号: G03F7/30

    摘要: A method for removing residual color photoresist material from a substrate after photoresist development. The method washes the substrate with a high-pressure jet of de-ionized water that contains an activated interface agent. A second method of removing the residual photoresist material bombards the substrate with oxygen plasma for a brief period so that the residual photoresist material is polarized and then rinses the substrate with de-ionized water.

    摘要翻译: 光致抗蚀剂显影后从基板上除去残留光致抗蚀剂材料的方法。 该方法用含有活化界面剂的去离子水的高压喷射洗涤基材。 除去剩余的光致抗蚀剂材料的第二种方法是用氧等离子体短暂地轰击衬底,使残留的光致抗蚀剂材料被极化,然后用去离子水冲洗衬底。

    Dual damascene processing method
    8.
    发明授权
    Dual damascene processing method 失效
    双镶嵌加工方法

    公开(公告)号:US6001414A

    公开(公告)日:1999-12-14

    申请号:US991193

    申请日:1997-12-16

    IPC分类号: H01L21/768 B05D5/12

    CPC分类号: H01L21/76829 H01L21/76804

    摘要: A dual damascene processing method comprising the steps depositing sequentially a first oxide layer, a SRO layer and a second oxide layer over a substrate. Then, photolithographic and etching operations are conducted to form a via that links up with a desired wire-connecting region above the substrate. Next, another photolithographic and etching operations are conducted to form interconnect trench lines followed by the deposition of metal into the via and trench. Finally, the surface is polished with a chemical-mechanical polishing operation to remove the unwanted metal on the surface. The invention is capable of controlling the depth of trench and obtaining a smoother trench bottom for the metal lines. Furthermore, the separation of via and trench etching steps makes the control of the final etch profile much easier, thereby able to get an optimal result.

    摘要翻译: 一种双镶嵌加工方法,包括以下步骤:在基材上依次沉积第一氧化物层,SRO层和第二氧化物层。 然后,进行光刻和蚀刻操作以形成与基板上方的期望的线连接区域连接的通孔。 接下来,进行另一光刻和蚀刻操作以形成互连沟槽线,随后将金属沉积到通孔和沟槽中。 最后,通过化学机械抛光操作抛光表面以除去表面上不需要的金属。 本发明能够控制沟槽的深度并为金属线获得更​​平滑的沟槽底部。 此外,通孔和沟槽蚀刻步骤的分离使得最终蚀刻轮廓的控制更容易,从而能够获得最佳结果。

    Method for removing silicon nitride material
    9.
    发明授权
    Method for removing silicon nitride material 有权
    氮化硅材料去除方法

    公开(公告)号:US5968846A

    公开(公告)日:1999-10-19

    申请号:US152379

    申请日:1998-09-14

    IPC分类号: H01L21/311 H01L21/302

    CPC分类号: H01L21/31116

    摘要: A etchant recipe including a mixed gas of one of a CH.sub.x F.sub.y group and CO gas is used to etch a silicon nitride layer by plasma etching so as to form a thin polymer layer to protect a silicon layer under the silicon nitride layer from over-etching. Then a soft etching is performed to remove the thin polymer. The etchant recipe is, for example, used in forming a contact opening on a gate of a MOS transistor, on which a silicon nitride layer is formed.

    摘要翻译: 使用包括CH x F y基团和CO气体之一的混合气体的蚀刻剂配方通过等离子体蚀刻来蚀刻氮化硅层,以形成薄的聚合物层,以保护氮化硅层下的硅层免受过度蚀刻。 然后进行软蚀刻以除去薄聚合物。 蚀刻剂配方例如用于在形成有氮化硅层的MOS晶体管的栅极上形成接触开口。

    Via-first dual damascene process
    10.
    发明授权
    Via-first dual damascene process 有权
    Via-first双镶嵌工艺

    公开(公告)号:US06780761B1

    公开(公告)日:2004-08-24

    申请号:US10604771

    申请日:2003-08-15

    IPC分类号: H01L214763

    摘要: The present invention pertains to a via-first dual damascene process. A semiconductor substrate having a conductive structure and a dielectric layer on the semiconductor substrate is provided. The dielectric layer has a via opening exposing the conductive structure. The via opening is filled with a gap-filling polymer to form a gap-filling polymer (GFP) layer on the dielectric layer. The GFP layer is etched back to a predetermined depth such that an exposed surface of the GFP layer is lower than surface of the dielectric layer to form a recess, thereby exposing portions of sidewalls of the via opening. A surface treatment for altering surface property of the sidewalls and the exposed surface of the GFP layer is then carried out, thereby preventing a subsequent deep UV photoresist from interacting with the sidewalls or the exposed surface of the GFP layer either in a chemical or physical way.

    摘要翻译: 本发明涉及一种通孔 - 第一双镶嵌工艺。 提供了在半导体衬底上具有导电结构和电介质层的半导体衬底。 电介质层具有暴露导电结构的通路孔。 通孔开口填充间隙填充聚合物,以在介电层上形成间隙填充聚合物(GFP)层。 将GFP层回蚀刻到预定深度,使得GFP层的暴露表面低于介电层的表面以形成凹陷,从而暴露通孔开口的侧壁部分。 然后进行用于改变侧壁和GFP层的暴露表面的表面性质的表面处理,从而防止随后的深UV光致抗蚀剂以化学或物理方式与GFP层的侧壁或暴露表面相互作用 。