Phase-separated dielectric structure fabrication process

    公开(公告)号:US07829625B2

    公开(公告)日:2010-11-09

    申请号:US12436975

    申请日:2009-05-07

    IPC分类号: C08L83/00 C08K5/06

    摘要: A process for fabricating an electronic device including: depositing a layer comprising a semiconductor; liquid depositing a dielectric composition comprising a lower-k dielectric material, a higher-k dielectric material, and a liquid, wherein the lower-k dielectric material and the higher-k dielectric material are not phase separated prior to the liquid depositing; and causing phase separation of the lower-k dielectric material and the higher-k dielectric material to form a phase-separated dielectric structure wherein the lower-k dielectric material is in a higher concentration than the higher-k dielectric material in a region of the dielectric structure closest to the layer comprising the semiconductor, wherein the depositing the layer comprising the semiconductor is prior to the liquid depositing the dielectric composition or subsequent to the causing phase separation.

    PHASE-SEPARATED DIELECTRIC STRUCTURE FABRICATION PROCESS
    3.
    发明申请
    PHASE-SEPARATED DIELECTRIC STRUCTURE FABRICATION PROCESS 有权
    相分离电介质结构工艺

    公开(公告)号:US20080242112A1

    公开(公告)日:2008-10-02

    申请号:US11695131

    申请日:2007-04-02

    IPC分类号: H01L21/31

    摘要: A process for fabricating an electronic device including: depositing a layer comprising a semiconductor; liquid depositing a dielectric composition comprising a lower-k dielectric material, a higher-k dielectric material, and a liquid, wherein the lower-k dielectric material and the higher-k dielectric material are not phase separated prior to the liquid depositing; and causing phase separation of the lower-k dielectric material and the higher-k dielectric material to form a phase-separated dielectric structure wherein the lower-k dielectric material is in a higher concentration than the higher-k dielectric material in a region of the dielectric structure closest to the layer comprising the semiconductor, wherein the depositing the layer comprising the semiconductor is prior to the liquid depositing the dielectric composition or subsequent to the causing phase separation.

    摘要翻译: 一种制造电子器件的方法,包括:沉积包含半导体的层; 液体沉积包含低k电介质材料,较高k电介质材料和液体的电介质组合物,其中低k电介质材料和较高k电介质材料在液体沉积之前不相分离; 并引起下部k电介质材料和较高k电介质材料的相分离以形成相分离电介质结构,其中低k电介质材料的浓度高于 绝缘结构最靠近包含半导体的层,其中沉积包含半导体的层在液体沉积电介质组合物之前或之后引起相分离。

    PHASE-SEPARATED DIELECTRIC STRUCTURE FABRICATION PROCESS
    4.
    发明申请
    PHASE-SEPARATED DIELECTRIC STRUCTURE FABRICATION PROCESS 有权
    相分离电介质结构工艺

    公开(公告)号:US20090234056A1

    公开(公告)日:2009-09-17

    申请号:US12436975

    申请日:2009-05-07

    IPC分类号: C08K5/06 C08K5/05

    摘要: A process for fabricating an electronic device including: depositing a layer comprising a semiconductor; liquid depositing a dielectric composition comprising a lower-k dielectric material, a higher-k dielectric material, and a liquid, wherein the lower-k dielectric material and the higher-k dielectric material are not phase separated prior to the liquid depositing; and causing phase separation of the lower-k dielectric material and the higher-k dielectric material to form a phase-separated dielectric structure wherein the lower-k dielectric material is in a higher concentration than the higher-k dielectric material in a region of the dielectric structure closest to the layer comprising the semiconductor, wherein the depositing the layer comprising the semiconductor is prior to the liquid depositing the dielectric composition or subsequent to the causing phase separation.

    摘要翻译: 一种制造电子器件的方法,包括:沉积包含半导体的层; 液体沉积包含低k电介质材料,较高k电介质材料和液体的电介质组合物,其中低k电介质材料和较高k电介质材料在液体沉积之前不相分离; 并引起下部k电介质材料和较高k电介质材料的相分离以形成相分离电介质结构,其中低k电介质材料的浓度高于 绝缘结构最靠近包含半导体的层,其中沉积包含半导体的层在液体沉积电介质组合物之前或之后引起相分离。

    SECURITY SYSTEM USING CONDUCTIVE AND NON-CONDUCTIVE REGIONS
    5.
    发明申请
    SECURITY SYSTEM USING CONDUCTIVE AND NON-CONDUCTIVE REGIONS 有权
    使用导电和非导电区域的安全系统

    公开(公告)号:US20080122881A1

    公开(公告)日:2008-05-29

    申请号:US11563989

    申请日:2006-11-28

    IPC分类号: B41J29/38 G06K19/06

    摘要: Disclosed is an item, for example a document, including a substrate having thereon a multiplicity of separate printed markings, wherein the printed markings include both conductive printed markings and substantially non-conductive printed markings. The different conductive and substantially non-conductive regions on the substrate can be detected, for example by measuring the resistance or current of each printed marking. The pattern of different conductive and substantially non-conductive regions can be used as a security pattern of authenticity that cannot be replicated by standard office equipment, and/or can be used to encrypt information in binary code form in the item. A system for forming and detecting the different printed markings is also described.

    摘要翻译: 公开了一种物品,例如文件,包括其上具有多个分开的印刷标记的基板,其中印刷的标记包括导电印刷标记和基本不导电的印刷标记。 可以例如通过测量每个印刷标记的电阻或电流来检测衬底上不同的导电和基本不导电的区域。 可以将不同的导电和基本上不导电的区域的图案用作标准办公设备不能复制的真实性的安全模式,和/或可用于加密该项目中二进制代码形式的信息。 还描述了用于形成和检测不同印刷标记的系统。

    Security system using conductive and non-conductive regions
    6.
    发明授权
    Security system using conductive and non-conductive regions 有权
    使用导电和非导电区域的安全系统

    公开(公告)号:US07918485B2

    公开(公告)日:2011-04-05

    申请号:US11563989

    申请日:2006-11-28

    IPC分类号: B42D15/00 B42D1/00 B42D15/10

    摘要: Disclosed is an item, for example a document, including a substrate having thereon a multiplicity of separate printed markings, wherein the printed markings include both conductive printed markings and substantially non-conductive printed markings. The different conductive and substantially non-conductive regions on the substrate can be detected, for example by measuring the resistance or current of each printed marking. The pattern of different conductive and substantially non-conductive regions can be used as a security pattern of authenticity that cannot be replicated by standard office equipment, and/or can be used to encrypt information in binary code form in the item. A system for forming and detecting the different printed markings is also described.

    摘要翻译: 公开了一种物品,例如文件,包括其上具有多个分开的印刷标记的基板,其中印刷的标记包括导电印刷标记和基本不导电的印刷标记。 可以例如通过测量每个印刷标记的电阻或电流来检测衬底上不同的导电和基本不导电的区域。 可以将不同的导电和基本上不导电的区域的图案用作标准办公设备不能复制的真实性的安全模式,和/或可用于加密该项目中二进制代码形式的信息。 还描述了用于形成和检测不同印刷标记的系统。

    Top-gate thin-film transistor
    7.
    发明授权
    Top-gate thin-film transistor 有权
    顶栅薄膜晶体管

    公开(公告)号:US07397086B2

    公开(公告)日:2008-07-08

    申请号:US11317168

    申请日:2005-12-23

    IPC分类号: H01L29/76

    摘要: A thin-film transistor, such as a top-gate thin-film transistor, is provided herein. The thin-film transistor has a performance-enhancing layer, such as a performance-enhancing bottom layer, comprising a polymer other than a polyimide. In specific embodiments, the polymer is selected from the group consisting of polysiloxane, polysilsesquioxane, and mixtures thereof. In other embodiments, it is a self-assembling polymeric monolayer of a silane agent and an organophosphonic acid. The performance-enhancing layer directly contacts the substrate. The layer improves the carrier mobility and current on/off ratio of the thin film transistor.

    摘要翻译: 本文提供了诸如顶栅薄膜晶体管的薄膜晶体管。 薄膜晶体管具有性能增强层,例如性能增强底层,其包含聚酰亚胺以外的聚合物。 在具体实施方案中,聚合物选自聚硅氧烷,聚倍半硅氧烷及其混合物。 在其它实施方案中,它是硅烷试剂和有机膦酸的自组装聚合物单层。 性能增强层直接接触基板。 该层改善了薄膜晶体管的载流子迁移率和电流开/关比。