公开(公告)号：US07876253B2

公开(公告)日：2011-01-25

申请号：US12785262

申请日：2010-05-21

申请人： Yoshiaki Shimizu ,  Hisao Suzuki ,  Kenji Ito ,  Masashi Kijima

发明人： Yoshiaki Shimizu ,  Hisao Suzuki ,  Kenji Ito ,  Masashi Kijima

IPC分类号： H03M1/34

CPC分类号： H03M1/0675 ,  H03M1/08 ,  H03M1/165 ,  H03M1/168 ,  H03M1/366 ,  H03M1/42 ,  H03M1/765

摘要： A D/A conversion circuit for performing D/A conversion at high speeds. The D/A conversion circuit includes a resistor string including a plurality of resistor elements connected between a low-potential power supply and a high-potential power supply. A plurality of first switch groups are connected to the connection nodes between the resistor elements for selectively outputting voltages at the connection nodes. The outputs of the switches of the first switch groups are connected in common to a corresponding one of the nodes. The plurality of nodes are connected to an output terminal of the D/A conversion circuit via a second switch group. Predetermined switches of the first switch groups are connected in parallel to third switches to apply voltages to the nodes.

摘要翻译： 用于以高速执行D / A转换的D / A转换电路。 D / A转换电路包括连接在低电位电源和高电位电源之间的多个电阻元件的电阻串。 多个第一开关组连接到电阻元件之间的连接节点，用于选择性地输出连接节点处的电压。 第一交换机组的交换机的输出共同连接到对应的一个节点。 多个节点通过第二开关组连接到D / A转换电路的输出端。 第一开关组的预定开关并联连接到第三开关以向节点施加电压。

公开(公告)号：US07397407B2

公开(公告)日：2008-07-08

申请号：US11371289

申请日：2006-03-09

申请人： Yoshiaki Shimizu ,  Hisao Suzuki ,  Kenji Ito ,  Masashi Kijima

发明人： Yoshiaki Shimizu ,  Hisao Suzuki ,  Kenji Ito ,  Masashi Kijima

IPC分类号： H03M1/76

CPC分类号： H03M1/0675 ,  H03M1/08 ,  H03M1/165 ,  H03M1/168 ,  H03M1/366 ,  H03M1/42 ,  H03M1/765

摘要： A D/A conversion circuit for performing D/A conversion at high speeds. The D/A conversion circuit includes a resistor string including a plurality of resistor elements connected between a low-potential power supply and a high-potential power supply. A plurality of first switch groups are connected to the connection nodes between the resistor elements for selectively outputting voltages at the connection nodes. The outputs of the switches of the first switch groups are connected in common to a corresponding one of the nodes. The plurality of nodes are connected to an output terminal of the D/A conversion circuit via a second switch group. Predetermined switches of the first switch groups are connected in parallel to third switches to apply voltages to the nodes.

摘要翻译： 用于以高速执行D / A转换的D / A转换电路。 D / A转换电路包括连接在低电位电源和高电位电源之间的多个电阻元件的电阻串。 多个第一开关组连接到电阻元件之间的连接节点，用于选择性地输出连接节点处的电压。 第一交换机组的交换机的输出共同连接到对应的一个节点。 多个节点通过第二开关组连接到D / A转换电路的输出端。 第一开关组的预定开关并联连接到第三开关以向节点施加电压。

公开(公告)号：US20070046357A1

公开(公告)日：2007-03-01

申请号：US11337481

申请日：2006-01-24

申请人： Yoshiaki Shimizu ,  Hisao Suzuki

发明人： Yoshiaki Shimizu ,  Hisao Suzuki

IPC分类号： H03L5/00

CPC分类号： H03K3/356113 ,  H03K3/012

摘要： A level shift circuit for sustaining the activation and inactivation response of a transistor with respect to an input signal in a preferable manner. The level shift circuit includes a shift circuit for converting an input signal having a first voltage to an output signal having a second voltage that is higher than the first voltage. The voltage generation circuit includes a control voltage generation circuit, for generating control voltage having a generally constant voltage level irrespective of the level of a power supply voltage, and a bias generation circuit. The bias generation circuit generates bias voltage so that the node voltage of the shift circuit is substantially equalized with the control voltage.

摘要翻译： 一种用于以优选的方式维持晶体管相对于输入信号的激活和失活响应的电平移位电路。 电平移位电路包括用于将具有第一电压的输入信号转换为具有高于第一电压的第二电压的输出信号的移位电路。 电压产生电路包括控制电压产生电路，用于产生与电源电压的电平无关的具有大致恒定的电压电平的控制电压和偏置产生电路。 偏置产生电路产生偏置电压，使得移位电路的节点电压基本上与控制电压相等。

公开(公告)号：US07589578B2

公开(公告)日：2009-09-15

申请号：US11337481

申请日：2006-01-24

申请人： Yoshiaki Shimizu ,  Hisao Suzuki

发明人： Yoshiaki Shimizu ,  Hisao Suzuki

IPC分类号： H03L5/00

CPC分类号： H03K3/356113 ,  H03K3/012

摘要： A level shift circuit for sustaining the activation and inactivation response of a transistor with respect to an input signal in a preferable manner. The level shift circuit includes a shift circuit for converting an input signal having a first voltage to an output signal having a second voltage that is higher than the first voltage. The voltage generation circuit includes a control voltage generation circuit, for generating control voltage having a generally constant voltage level irrespective of the level of a power supply voltage, and a bias generation circuit. The bias generation circuit generates bias voltage so that the node voltage of the shift circuit is substantially equalized with the control voltage.

摘要翻译： 一种用于以优选的方式维持晶体管相对于输入信号的激活和失活响应的电平移位电路。 电平移位电路包括用于将具有第一电压的输入信号转换为具有高于第一电压的第二电压的输出信号的移位电路。 电压产生电路包括控制电压产生电路，用于产生与电源电压的电平无关的具有大致恒定的电压电平的控制电压和偏置产生电路。 偏置生成电路产生偏置电压，使得移位电路的节点电压基本上与控制电压相等。

公开(公告)号：US20060158362A1

公开(公告)日：2006-07-20

申请号：US11371289

申请日：2006-03-09

申请人： Yoshiaki Shimizu ,  Hisao Suzuki ,  Kenji Ito ,  Masashi Kijima

发明人： Yoshiaki Shimizu ,  Hisao Suzuki ,  Kenji Ito ,  Masashi Kijima

IPC分类号： H03M1/66

CPC分类号： H03M1/0675 ,  H03M1/08 ,  H03M1/165 ,  H03M1/168 ,  H03M1/366 ,  H03M1/42 ,  H03M1/765

摘要： A D/A conversion circuit for performing D/A conversion at high speeds. The D/A conversion circuit includes a resistor string including a plurality of resistor elements connected between a low-potential power supply and a high-potential power supply. A plurality of first switch groups are connected to the connection nodes between the resistor elements for selectively outputting voltages at the connection nodes. The outputs of the switches of the first switch groups are connected in common to a corresponding one of the nodes. The plurality of nodes are connected to an output terminal of the D/A conversion circuit via a second switch group. Predetermined switches of the first switch groups are connected in parallel to third switches to apply voltages to the nodes.

摘要翻译： 用于以高速执行D / A转换的D / A转换电路。 D / A转换电路包括连接在低电位电源和高电位电源之间的多个电阻元件的电阻串。 多个第一开关组连接到电阻元件之间的连接节点，用于选择性地输出连接节点处的电压。 第一交换机组的交换机的输出共同连接到对应的一个节点。 多个节点通过第二开关组连接到D / A转换电路的输出端。 第一开关组的预定开关并联连接到第三开关以向节点施加电压。

公开(公告)号：US07760125B2

公开(公告)日：2010-07-20

申请号：US12026901

申请日：2008-02-06

申请人： Yoshiaki Shimizu ,  Hisao Suzuki ,  Kenji Ito ,  Masashi Kijima

发明人： Yoshiaki Shimizu ,  Hisao Suzuki ,  Kenji Ito ,  Masashi Kijima

IPC分类号： H03M1/36

CPC分类号： H03M1/0675 ,  H03M1/08 ,  H03M1/165 ,  H03M1/168 ,  H03M1/366 ,  H03M1/42 ,  H03M1/765

摘要： An A/D conversion circuit including a plurality of resistor elements connected in series between a low-potential power supply and a high-potential power supply. The A/D conversion circuit includes a plurality of comparators that compare a reference voltage divided by each of the resistor elements with an analog input voltage, the comparators having a sample-and-hold function for holding a sampled analog input voltage. The plurality of comparators also include a high-order bit comparator and a low-order bit comparator having different sampling sources. The high-order bit comparator may be configured to compare the analog input voltage and one of the reference voltages to obtain a determination result. The low-order bit comparator may old the analog voltage from the time that the low-order bit comparator retrieves the analog input voltage until the low-order bit comparator performs comparison.

摘要翻译： 一种A / D转换电路，包括串联连接在低电位电源和高电位电源之间的多个电阻元件。 A / D转换电路包括将由每个电阻元件划分的参考电压与模拟输入电压进行比较的多个比较器，比较器具有用于保持采样的模拟输入电压的采样保持功能。 多个比较器还包括具有不同采样源的高位比较器和低位比较器。 高位比较器可以被配置为比较模拟输入电压和参考电压之一以获得确定结果。 低位比较器可以从低位比较器检索模拟输入电压直到低位比较器执行比较时的模拟电压为老。

公开(公告)号：US20090015450A1

公开(公告)日：2009-01-15

申请号：US12026901

申请日：2008-02-06

申请人： Yoshiaki Shimizu ,  Hisao Suzuki ,  Kenji Ito ,  Masashi Kijima

发明人： Yoshiaki Shimizu ,  Hisao Suzuki ,  Kenji Ito ,  Masashi Kijima

IPC分类号： H03M1/00 ,  H03M1/76

CPC分类号： H03M1/0675 ,  H03M1/08 ,  H03M1/165 ,  H03M1/168 ,  H03M1/366 ,  H03M1/42 ,  H03M1/765

摘要： A D/A conversion circuit for performing D/A conversion at high speeds. The D/A conversion circuit includes a resistor string including a plurality of resistor elements connected between a low-potential power supply and a high-potential power supply. A plurality of first switch groups are connected to the connection nodes between the resistor elements for selectively outputting voltages at the connection nodes. The outputs of the switches of the first switch groups are connected in common to a corresponding one of the nodes. The plurality of nodes are connected to an output terminal of the D/A conversion circuit via a second switch group. Predetermined switches of the first switch groups are connected in parallel to third switches to apply voltages to the nodes.

摘要翻译： 用于以高速执行D / A转换的D / A转换电路。 D / A转换电路包括连接在低电位电源和高电位电源之间的多个电阻元件的电阻串。 多个第一开关组连接到电阻元件之间的连接节点，用于选择性地输出连接节点处的电压。 第一交换机组的交换机的输出共同连接到对应的一个节点。 多个节点通过第二开关组连接到D / A转换电路的输出端。 第一开关组的预定开关并联连接到第三开关以向节点施加电压。

公开(公告)号：US08354696B2

公开(公告)日：2013-01-15

申请号：US12979142

申请日：2010-12-27

申请人： Yoshiaki Shimizu ,  Kazuhiko Matsuki

发明人： Yoshiaki Shimizu ,  Kazuhiko Matsuki

IPC分类号： H01L27/118

CPC分类号： H01L27/11807 ,  H01L27/0207

摘要： A semiconductor device may include a plurality of logic circuits connected to each other through input and output terminals thereof. The plurality of logic circuits comprising a first sub-plurality of logic circuits coupled to a first one of different power systems. The first sub-plurality of logic circuits is laid out and adjacent to each other in a first direction. The first sub-plurality of logic circuits includes a first logic circuit and a second logic circuit. The second logic circuit is adjacent to the first logic circuit. The first logic circuit includes a first element comprising a first diffusion layer. The second logic circuit includes a second element comprising the first diffusion layer.

摘要翻译： 半导体器件可以包括通过其输入和输出端子彼此连接的多个逻辑电路。 多个逻辑电路包括耦合到不同电源系统中的第一个的第一子组多个逻辑电路。 逻辑电路的第一子组合在第一方向相互布置并相邻。 第一子逻辑电路包括第一逻辑电路和第二逻辑电路。 第二逻辑电路与第一逻辑电路相邻。 第一逻辑电路包括包括第一扩散层的第一元件。 第二逻辑电路包括包括第一扩散层的第二元件。

公开(公告)号：US20120038719A1

公开(公告)日：2012-02-16

申请号：US13212921

申请日：2011-08-18

申请人： Yoshiaki Shimizu ,  Taku Ishizawa ,  Yuki Takeda ,  Syuichi Koganehira

发明人： Yoshiaki Shimizu ,  Taku Ishizawa ,  Yuki Takeda ,  Syuichi Koganehira

IPC分类号： B41J2/175

CPC分类号： B41J2/17506 ,  B41J2/175 ,  B41J2/17513 ,  B41J2/1752 ,  B41J2/17523 ,  B41J2/17553 ,  B41J2/19

摘要： A liquid container for supplying a liquid to a liquid ejection apparatus comprises: a liquid chamber provided to store the liquid; an air chamber connected with the liquid chamber to introduce the outside air into the liquid chamber with consumption of the liquid in the liquid chamber; an open-air hole provided to introduce the outside air into the air chamber; and a liquid inlet provided to fill the liquid into the liquid chamber, wherein the liquid inlet is located at a lower position than the open-air hole, in a filling attitude of the liquid container in which the liquid is filled into the liquid chamber.

摘要翻译： 用于向液体喷射装置供应液体的液体容器包括：设置用于储存液体的液体室; 与所述液体室连接的空气室，以在所述液体室中的液体消耗的情况下将所述外部空气引入所述液体室; 设置用于将外部空气引入空气室的露天孔; 以及设置成将液体填充到液体室中的液体入口，其中液体入口位于比露天孔低的位置处，液体容器的填充位置处于液体容器中，其中液体被填充到液体室中。

公开(公告)号：US20110214505A1

公开(公告)日：2011-09-08

申请号：US13109769

申请日：2011-05-17

申请人： Daigo Aoki ,  Hideyuki Hashimoto ,  Tetsuya Kobayashi ,  Kunio Koizumi ,  Yoshiaki Shimizu ,  Yutaka Takashima ,  Shinya Yokoyama

发明人： Daigo Aoki ,  Hideyuki Hashimoto ,  Tetsuya Kobayashi ,  Kunio Koizumi ,  Yoshiaki Shimizu ,  Yutaka Takashima ,  Shinya Yokoyama

IPC分类号： G01L9/06

CPC分类号： G01L9/0054

摘要： There is provided a semiconductor pressure sensor which improves the sensor sensitivity and is excellent in the withstand pressure characteristic and the temperature characteristic. In the semiconductor pressure sensor in which a diaphragm is formed by a cavity provided on one of top and bottom surfaces of a silicon substrate and a plurality of piezoresistors is disposed in the diaphragm edge, a recess which has a larger area than the planar shape of the diaphragm and whose entire edge is located outward from the diaphragm edge in plan view is provided in a protective film which covers the entire surface of the silicon substrate on the diaphragm side. The protective film located on the diaphragm is preferably formed of SiO2.

摘要翻译： 提供了一种提高传感器灵敏度并且耐压特性和温度特性优异的半导体压力传感器。 在半导体压力传感器中，其中隔膜由设置在硅衬底的顶表面和底表面中的一个上的空腔形成，并且多个压电电阻器设置在隔膜边缘中，具有比平面形状大的面积的凹部 隔膜的整个边缘在平面图中从隔膜边缘向外定位在覆盖隔膜侧的硅基板的整个表面的保护膜中。 位于隔膜上的保护膜优选由SiO 2形成。