利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

52 条记录 (耗时 0.039 秒)

    Automatic loading disc player
    1.
    发明授权
    Automatic loading disc player 失效
    自动加载光盘播放器

    公开(公告)号：US4879705A

    公开(公告)日：1989-11-07

    申请号：US244641

    申请日：1988-09-12

    申请人： Yoshio Aoyagi ,  Hiroyuki Hirano ,  Toshiyuki Kimura ,  Susumu Niinuma ,  Minoru Yoshioka ,  Akira Haeno ,  Takashi Sato ,  Yoshiro Nishi ,  Yoshihiko Watanabe ,  Fumihiko Yokogawa ,  Keiichi Matsumoto ,  Youichi Ogawa

    发明人： Yoshio Aoyagi ,  Hiroyuki Hirano ,  Toshiyuki Kimura ,  Susumu Niinuma ,  Minoru Yoshioka ,  Akira Haeno ,  Takashi Sato ,  Yoshiro Nishi ,  Yoshihiko Watanabe ,  Fumihiko Yokogawa ,  Keiichi Matsumoto ,  Youichi Ogawa

    IPC分类号： G11B7/09 ,  G11B17/04 ,  G11B21/08 ,  G11B27/10

    CPC分类号： G11B17/051 ,  G11B21/085 ,  G11B27/105 ,  G11B7/0946

    摘要： A disc player comprising a signal pickup unit to read information from a disc on which program information including address information is recorded, the signal pickup unit being movable with respect to the disc, pickup drive means to drive the pickup unit for movement with respect to the disc, and a control circuit including an address memory for storing the newest one of the addresses read from the disc, a counter operative to count addresses at predetermined time intervals for producing a signal representative of an expected address indicative of the position to which the pickup unit is expected to move in the next, the expected address being updated at predetermined time intervals, a detector circuit to produce a signal each time a discrepancy is found to exist between the newest address and the expected address. In response to the signal from the detector circuit, the pickup drive means is actuated to drive the pickup unit for movement to the position dictated by the newest address or the expected address.

    摘要翻译： 一种光盘播放器，包括信号拾取单元，用于从盘上读取包含地址信息的节目信息的信息，信号拾取单元可相对于盘移动;拾取驱动装置，用于驱动拾取单元相对于 盘，以及包括用于存储从盘读取的最新地址的地址存储器的控制电路，用于以预定时间间隔对地址进行计数的计数器，用于产生代表指示拾取器的位置的预期地址的信号 预期单元在下一个移动，预期地址以预定的时间间隔更新，检测器电路每当在最新地址和预期地址之间存在差异时产生信号。 响应于来自检测器电路的信号，拾取器驱动装置被致动以驱动拾取单元移动到由最新地址或预期地址指定的位置。

    Electronic impedance circuit including a compensation arrangement for d.c. offset
    4.
    发明授权
    Electronic impedance circuit including a compensation arrangement for d.c. offset 失效
    电子阻抗电路包括直流补偿装置。 抵消

    公开(公告)号：US4520282A

    公开(公告)日：1985-05-28

    申请号：US411997

    申请日：1982-08-27

    申请人： Kazuo Watanabe ,  Yuichi Ohkubo ,  Akira Haeno ,  Fumihiko Yokogawa

    发明人： Kazuo Watanabe ,  Yuichi Ohkubo ,  Akira Haeno ,  Fumihiko Yokogawa

    IPC分类号： H03G3/10 ,  H03F3/45 ,  H03H11/02 ,  H03H11/46 ,  H03K3/023 ,  H03H11/00

    CPC分类号： H03F3/45479 ,  H03H11/46

    摘要： An electronic impedance circuit is constructed of a voltage-current converter and a variable gain current amplifier. The voltage-current converter includes first and second transistors of the PNP-type differentially connected. The variable gain current amplifier includes third and fourth transistors of the NPN-type differentially connected, and fifth and sixth transistors of the PNP-type as load means. The bases of the third and fourth transistors are respectively driven by collector signals of the first and second transistors, and a collector signal of the third transistor is fed back to the base of the second transistor. In order to reduce a d.c. offset attributed to a current flowing between the base of the second transistor and the collector of the third transistor, a compensation circuit is connected to the variable gain amplifier. This compensation circuit can provide compensation by producing a compensation current for cancelling the current between the base of the second transistor and the collector of the third transistor.

    摘要翻译： 电子阻抗电路由电压 - 电流转换器和可变增益电流放大器构成。 电压 - 电流转换器包括PNP型差分连接的第一和第二晶体管。 可变增益电流放大器包括NPN型差分连接的第三和第四晶体管，以及PNP型作为负载装置的第五和第六晶体管。 第三和第四晶体管的基极分别由第一和第二晶体管的集电极信号驱动，第三晶体管的集电极信号被反馈到第二晶体管的基极。 为了减少直流 归因于在第二晶体管的基极和第三晶体管的集电极之间流动的电流的补偿，补偿电路连接到可变增益放大器。 该补偿电路可以通过产生用于消除第二晶体管的基极和第三晶体管的集电极之间的电流的补偿电流来提供补偿。

    Servo circuit for generating a tracking error signal for optical disk player
    6.
    发明授权
    Servo circuit for generating a tracking error signal for optical disk player 失效
    用于产生光盘播放器跟踪误差信号的伺服电路

    公开(公告)号：US4860271A

    公开(公告)日：1989-08-22

    申请号：US167284

    申请日：1988-03-11

    申请人： Fumihiko Yokogawa ,  Hiroyuki Hirano ,  Akira Motoyama

    发明人： Fumihiko Yokogawa ,  Hiroyuki Hirano ,  Akira Motoyama

    IPC分类号： G11B7/095 ,  G11B21/08 ,  G11B21/10

    CPC分类号： G11B7/0953 ,  G11B21/085 ,  G11B21/106

    摘要： A servo circuit for use in an optical disk player or the like, which can track a disk having a large eccentrically without abnormal sampling of the RF signal produced as a result of scanning the disk. The servo circuit according to this invention comprises a first comparator for comparing RF signals from a pair wobbled pits on a optical disk and generating a difference signal indicating the level difference between the AF signals; a holding means for holding the difference signal for a predetermined period; a reference level producing circuit for setting reference levels having a predetermined width with the level of a previously sampled difference signal of the holding means as a center; a second comparator for comparing the level of a presently sampled difference signal of the first comparator with the reference level and outputting a first signal indicative of the comparative result; and a selector for selecting and outputting, as a tracking error signal, either the presently sampled difference signal and a second signal having a level within the predetermined width of the reference level in accordance with the comparative result. The presently sampled difference signal is selected when the level of the presently sampled difference signal is within the reference level and the second signal is related when the presently sampled difference signal is out of the reference level.

    摘要翻译： 一种用于光盘播放器等的伺服电路，其可以跟踪具有大的偏心的盘而不会由于扫描盘而产生的RF信号的异常采样。 根据本发明的伺服电路包括：第一比较器，用于比较来自光盘上的一对摆动凹坑的RF信号，并产生指示AF信号之间的电平差的差信号; 保持装置，用于保持差分信号一段预定时间; 参考电平产生电路，用于将具有预定宽度的参考电平设置为以所述保持装置的先前采样的差分信号的电平为中心; 第二比较器，用于比较第一比较器的当前采样的差分信号的电平与参考电平，并输出指示比较结果的第一信号; 以及选择器，用于根据比较结果选择和输出当前采样差分信号和具有在基准电平的预定宽度内的电平的第二信号作为跟踪误差信号。 当当前采样的差分信号的电平在参考电平内并且当当前采样的差信号在参考电平之外时第二信号相关时，选择当前采样的差分信号。

    Method and apparatus for data recording and reproducing with error reduction
    7.
    发明授权
    Method and apparatus for data recording and reproducing with error reduction 失效
    用于数据记录和再现的方法和装置，具有错误减少

    公开(公告)号：US4908811A

    公开(公告)日：1990-03-13

    申请号：US248063

    申请日：1988-09-23

    申请人： Fumihiko Yokogawa ,  Hiroyuki Hirano

    发明人： Fumihiko Yokogawa ,  Hiroyuki Hirano

    IPC分类号： G11B7/004 ,  G11B20/18

    CPC分类号： G11B20/18 ,  G11B20/1879 ,  G11B7/004

    摘要： An optical disk data recording and reproducing apparatus includes variable delay circuits in the recording and reproducing sections of the apparatus. The delay of the reproducing section delay circuit is adjusted when the error ratio determined for a reproduced data signal corresponding to a recorded data signal is greater than a predetermined value. When the error ratio is less than the predetermined value after adjustment of the delay circuit, the delay of the delay circuit in the recording section is adjusted to match the adjusted delay of the reproducing section delay circuit and the delay of the latter circuit is retured to its original value.

    摘要翻译： 光盘数据记录和再现装置包括设备的记录和再现部分中的可变延迟电路。 当对与记录的数据信号相对应的再现数据信号确定的误差比大于预定值时，再现段延迟电路的延迟被调整。 当在延迟电路调整之后误差率小于预定值时，调整记录部分中的延迟电路的延迟以使再现部分延迟电路的调整延迟与后一电路的延迟相匹配， 其原始价值。

    Clock generator circuit and a synchronizing signal detection method in a sampled format system and a phase comparator circuit suited for generation of the clock
    9.
    发明授权
    Clock generator circuit and a synchronizing signal detection method in a sampled format system and a phase comparator circuit suited for generation of the clock 失效
    时钟发生器电路和采样格式系统中的同步信号检测方法以及适合于产生时钟的相位比较器电路

    公开(公告)号：US4872155A

    公开(公告)日：1989-10-03

    申请号：US162625

    申请日：1988-03-01

    申请人： Fumihiko Yokogawa ,  Hiroyuki Hirano ,  Keiji Kinpara

    发明人： Fumihiko Yokogawa ,  Hiroyuki Hirano ,  Keiji Kinpara

    IPC分类号： G11B20/14 ,  G11B20/18 ,  G11B27/19 ,  G11B27/30 ,  G11B27/36 ,  H03L7/087 ,  H03L7/095

    CPC分类号： G11B27/36 ,  G11B20/1403 ,  G11B27/19 ,  G11B27/3027 ,  H03L7/087 ,  H03L7/095 ,  G11B20/1879

    摘要： A recording-reproducing clock generator circuit generates a reproduced clock having a predetermined frequency from a read out signal including such pulses that the interval between two successive pulses thereof at a predetermined length is to be used as a synchronizing signal region. The circuit generates a reference clock of a predetermined frequency, generates a first sync signal detection signal when the distance between two successive pulses in the input signal measured by means of the clock pulses is equal to a predetermined reference value, separates a clock edge pulse from the input signal by using the first sync signal detection signal, and generates the reproduced clock having the predetermined frequency and synchronized with the separated clock edge pulse.

    摘要翻译： 记录再现时钟发生器电路从包括这样的脉冲的读出信号产生具有预定频率的再现时钟，使得其预定长度的两个连续脉冲之间的间隔被用作同步信号区域。 电路产生预定频率的参考时钟，当通过时钟脉冲测量的输入信号中的两个连续脉冲之间的距离等于预定的参考值时，产生第一同步信号检测信号，将时钟脉冲与 通过使用第一同步信号检测信号输入信号，并产生具有预定频率并与分离的时钟边缘脉冲同步的再生时钟。