公开(公告)号：US20050079294A1

公开(公告)日：2005-04-14

申请号：US10772511

申请日：2004-02-05

Applicant: Jia-Xing Lin ,  Chi-Lin Chen ,  Yu-Cheng Chen ,  Yih-Rong Luo

Inventor： Jia-Xing Lin ,  Chi-Lin Chen ,  Yu-Cheng Chen ,  Yih-Rong Luo

IPC: B05D5/12 ,  C30B13/24 ,  C30B29/06 ,  H01L21/20 ,  H01L21/336 ,  H01L21/77 ,  H01L29/04 ,  H01L29/786

CPC classification number: H01L21/02686 ,  C30B13/24 ,  C30B29/06 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/2026 ,  H01L27/1281 ,  H01L27/1296 ,  H01L29/04 ,  H01L29/66757 ,  H01L29/78603

Abstract: A heat sink layer is formed on portions of a substrate, and then an amorphous silicon layer is formed thereon. The heat coefficient of the heat sink layer is greater than that of the substrate. When an excimer laser heats the amorphous silicon layer to crystallize the amorphous silicon, nucleation sites are formed in the amorphous silicon layer on the heat sink layer. Next, laterally expanding crystallization occurs in the amorphous silicon layer on the substrate to form polysilicon having a crystal size of a micrometer.

Abstract translation: 在衬底的部分上形成散热层，然后在其上形成非晶硅层。 散热层的热系数大于衬底的热系数。 当准分子激光器加热非晶硅层以使非晶硅结晶时，在散热层上的非晶硅层中形成成核位点。 接着，在基板上的非晶硅层发生横向膨胀结晶，形成晶体尺寸为微米的多晶硅。

公开(公告)号：US07927929B2

公开(公告)日：2011-04-19

申请号：US12371625

申请日：2009-02-16

Applicant: Chi-Lin Chen ,  Yu-Cheng Chen ,  Hsing-Hua Wu ,  Po-Tsun Liu

Inventor： Chi-Lin Chen ,  Yu-Cheng Chen ,  Hsing-Hua Wu ,  Po-Tsun Liu

IPC: H01L29/04

CPC classification number: H01L21/268 ,  H01L21/28008 ,  H01L29/4238 ,  H01L29/4916 ,  H01L29/66757 ,  H01L29/78609 ,  H01L29/78618 ,  H01L29/78675 ,  H01L29/78696

Abstract: A method of fabricating a thin film transistor (TFT) includes first providing a strip-shaped silicon island which is a thin film region with a predetermined long side and short side. Next, the strip-shaped silicon island is subject to an ion implantation to form a first ion doping region and a second ion doping region. The first and second ion doping regions, respectively used as the source and the drain of the TFT, are located at two sides along the long side of the island and substantially perpendicular to the gate. A gate is formed over the strip-shaped silicon island and the first and second ion doping regions, wherein the gate is substantially parallel to the direction of the short side.

Abstract translation: 制造薄膜晶体管（TFT）的方法包括首先提供作为具有预定长边和短边的薄膜区域的条状硅岛。 接下来，条状硅岛经受离子注入以形成第一离子掺杂区和第二离子掺杂区。 分别用作TFT的源极和漏极的第一和第二离子掺杂区域位于岛的长边的两侧并且基本上垂直于栅极。 栅极形成在带状硅岛和第一和第二离子掺杂区之上，其中栅极基本上平行于短边的方向。

公开(公告)号：US20090142886A1

公开(公告)日：2009-06-04

申请号：US12371625

申请日：2009-02-16

Applicant: Chi-Lin Chen ,  Yu-Cheng Chen ,  Hsing-Hua Wu ,  Po-Tsun Liu

Inventor： Chi-Lin Chen ,  Yu-Cheng Chen ,  Hsing-Hua Wu ,  Po-Tsun Liu

IPC: H01L21/336

CPC classification number: H01L21/268 ,  H01L21/28008 ,  H01L29/4238 ,  H01L29/4916 ,  H01L29/66757 ,  H01L29/78609 ,  H01L29/78618 ,  H01L29/78675 ,  H01L29/78696

Abstract: A method of fabricating a thin film transistor (TFT) includes first providing a strip-shaped silicon island which is a thin film region with a predetermined long side and short side. Next, the strip-shaped silicon island is subject to an ion implantation to form a first ion doping region and a second ion doping region. The first and second ion doping regions, respectively used as the source and the drain of the TFT, are located at two sides along the long side of the island and substantially perpendicular to the gate. A gate is formed over the strip-shaped silicon island and the first and second ion doping regions, wherein the gate is substantially parallel to the direction of the short side.

Abstract translation: 制造薄膜晶体管（TFT）的方法包括首先提供作为具有预定长边和短边的薄膜区域的条状硅岛。 接下来，条状硅岛经受离子注入以形成第一离子掺杂区和第二离子掺杂区。 分别用作TFT的源极和漏极的第一和第二离子掺杂区域位于岛的长边的两侧并且基本上垂直于栅极。 栅极形成在带状硅岛和第一和第二离子掺杂区之上，其中栅极基本上平行于短边的方向。

公开(公告)号：US20080029902A1

公开(公告)日：2008-02-07

申请号：US11870426

申请日：2007-10-11

Applicant: Yu-Cheng Chen ,  Chi-Lin Chen ,  Chi-Ming Chang

Inventor： Yu-Cheng Chen ,  Chi-Lin Chen ,  Chi-Ming Chang

IPC: H01L23/52

CPC classification number: H01L27/1288 ,  G02F1/1368 ,  H01L27/124

Abstract: A multi-layered complementary conductive line structure, a manufacturing method thereof and a manufacturing method of a TFT (thin film transistor) display array are provided. The process of TFT having multi-layered complementary conductive line structures does not need to increase the mask number in comparison with the currently process and is able to solve the resistance problem of the lines inside a display.

Abstract translation: 提供多层互补导电线结构，其制造方法和TFT（薄膜晶体管）显示阵列的制造方法。 具有多层互补导电线结构的TFT的工艺与当前工艺相比不需要增加掩模数，并且能够解决显示器内部的线的电阻问题。

公开(公告)号：US20070210310A1

公开(公告)日：2007-09-13

申请号：US11561898

申请日：2006-11-21

Applicant: Chi-Lin Chen ,  Yu-Cheng Chen ,  Hsing-Hua Wu ,  Po-Tsun Liu

Inventor： Chi-Lin Chen ,  Yu-Cheng Chen ,  Hsing-Hua Wu ,  Po-Tsun Liu

IPC: H01L29/04

CPC classification number: H01L21/268 ,  H01L21/28008 ,  H01L29/4238 ,  H01L29/4916 ,  H01L29/66757 ,  H01L29/78609 ,  H01L29/78618 ,  H01L29/78675 ,  H01L29/78696

Abstract: A structure of a thin film transistor and a method for making the same are provided. The structure includes a strip-shaped silicon island, a gate, and a first and second ion doping regions. The strip-shaped silicon island is a thin film region with a predetermined long side and short side, and farther has a plurality of lateral grain boundaries substantially parallel to the short side of the silicon island. The gate is located over the silicon island and substantially parallel to the lateral grain boundaries. The first and second ion doping regions, used as source/drain regions of the TFT, are located at two sides along the long side of the island and substantially perpendicular to the gate.

Abstract translation: 提供薄膜晶体管的结构及其制造方法。 该结构包括条形硅岛，栅极以及第一和第二离子掺杂区域。 带状硅岛是具有预定的长边和短边的薄膜区域，并且还具有基本上平行于硅岛短边的多个横向晶界。 栅极位于硅岛上方并且基本上平行于横向晶界。 用作TFT的源极/漏极区域的第一和第二离子掺杂区域位于岛的长边的两侧并且基本上垂直于栅极。

公开(公告)号：US20060051905A1

公开(公告)日：2006-03-09

申请号：US11200139

申请日：2005-08-10

Applicant: Hung-Tse Chen ,  Yu-Cheng Chen ,  Chi-Lin Chen

Inventor： Hung-Tse Chen ,  Yu-Cheng Chen ,  Chi-Lin Chen

IPC: H01L21/84 ,  H01L21/00

CPC classification number: H01L21/02675 ,  H01L21/02532 ,  H01L21/2026 ,  H01L21/32134 ,  H01L27/1285 ,  H01L29/66757

Abstract: A buffer layer, a protective layer and a poly-silicon layer are formed on a substrate in turn, and the poly-silicon layer is then patterned to form island active regions. Next, n-type ions are implanted into portions of the poly-silicon layer to form source/drain regions. Then, a dilute buffer oxide etchant is utilized to micro-etch the poly-silicon layer to change the surface morphology of the poly-silicon. Finally, a laser annealing process is performed to partially melt the poly-silicon for forming a smooth surface and activating the source/drain region of the poly-silicon simultaneously.

Abstract translation: 依次在基板上形成缓冲层，保护层和多晶硅层，然后对多晶硅层进行图案化以形成岛状有源区。 接下来，将n型离子注入到多晶硅层的部分中以形成源/漏区。 然后，使用稀释缓冲氧化物蚀刻剂来微蚀刻多晶硅层以改变多晶硅的表面形态。 最后，进行激光退火处理以部分地熔化多晶硅以形成光滑表面并同时激活多晶硅的源极/漏极区域。

公开(公告)号：US07851801B2

公开(公告)日：2010-12-14

申请号：US11963853

申请日：2007-12-24

Applicant: Hung-Tse Chen ,  Chi-Lin Chen ,  Yu-Cheng Chen

Inventor： Hung-Tse Chen ,  Chi-Lin Chen ,  Yu-Cheng Chen

IPC: H01L29/76

CPC classification number: H01L29/78696 ,  G11C16/0466 ,  H01L21/28282 ,  H01L27/12 ,  H01L27/1285 ,  H01L29/04 ,  H01L29/4234 ,  H01L29/66757 ,  H01L29/66833 ,  H01L29/78675 ,  H01L29/792

Abstract: A memory cell suitable for being disposed over a substrate is provided. The memory cell includes a poly-silicon island, a first dielectric layer, a trapping layer, a second dielectric layer and a control gate. The poly-silicon island is disposed on the substrate and includes a source region, a drain region and a channel region located between the source and drain regions. The channel region has a plurality of regularly arranged tips thereon. The first dielectric layer is disposed on the poly-silicon island. The trapping layer is disposed on the first dielectric layer. The second dielectric layer is disposed on the trapping layer. The control gate is disposed on the second dielectric layer. The memory cell mentioned above can be integrated into the LTPS-LCD panel or OLED panel.

Abstract translation: 提供了适于布置在基板上的存储单元。 存储单元包括多晶硅岛，第一介电层，俘获层，第二介质层和控制栅极。 多硅岛设置在衬底上，并且包括源极区，漏极区和位于源极和漏极区之间的沟道区。 通道区域在其上具有多个规则排列的尖端。 第一介电层设置在多晶硅岛上。 捕获层设置在第一介电层上。 第二介质层设置在捕获层上。 控制栅极设置在第二电介质层上。 上述存储单元可以集成到LTPS-LCD面板或OLED面板中。

公开(公告)号：US07795683B2

公开(公告)日：2010-09-14

申请号：US11561898

申请日：2006-11-21

Applicant: Chi-Lin Chen ,  Yu-Cheng Chen ,  Hsing-Hua Wu ,  Po-Tsun Liu

Inventor： Chi-Lin Chen ,  Yu-Cheng Chen ,  Hsing-Hua Wu ,  Po-Tsun Liu

IPC: H01L29/04

CPC classification number: H01L21/268 ,  H01L21/28008 ,  H01L29/4238 ,  H01L29/4916 ,  H01L29/66757 ,  H01L29/78609 ,  H01L29/78618 ,  H01L29/78675 ,  H01L29/78696

Abstract: A structure of a thin film transistor and a method for making the same are provided. The structure includes a strip-shaped silicon island, a gate, and a first and second ion doping regions. The strip-shaped silicon island is a thin film region with a predetermined long side and short side, and farther has a plurality of lateral grain boundaries substantially parallel to the short side of the silicon island. The gate is located over the silicon island and substantially parallel to the lateral grain boundaries. The first and second ion doping regions, used as source/drain regions of the TFT, are located at two sides along the long side of the island and substantially perpendicular to the gate.

Abstract translation: 提供薄膜晶体管的结构及其制造方法。 该结构包括条形硅岛，栅极以及第一和第二离子掺杂区域。 带状硅岛是具有预定的长边和短边的薄膜区域，并且还具有基本上平行于硅岛短边的多个横向晶界。 栅极位于硅岛上方并且基本上平行于横向晶界。 用作TFT的源极/漏极区域的第一和第二离子掺杂区域位于岛的长边的两侧并且基本上垂直于栅极。

公开(公告)号：US20070243670A1

公开(公告)日：2007-10-18

申请号：US11279933

申请日：2006-04-17

Applicant: Chi-Lin Chen ,  Po-Hao Tsai ,  Hung-Tse Chen ,  Yu-Cheng Chen ,  Jia-Xing Lin

Inventor： Chi-Lin Chen ,  Po-Hao Tsai ,  Hung-Tse Chen ,  Yu-Cheng Chen ,  Jia-Xing Lin

IPC: H01L21/84 ,  H01L21/20

CPC classification number: H01L29/78675 ,  H01L21/02532 ,  H01L21/02667 ,  H01L21/2026 ,  H01L27/1281 ,  H01L29/04 ,  H01L29/42384 ,  H01L29/66757 ,  H01L29/78618 ,  H01L29/78621 ,  H01L29/78645 ,  H01L29/78696

Abstract: A method for fabricating a thin film transistor (“TFT”) device includes providing a substrate, forming a patterned amorphous silicon layer over the substrate including a pair of first regions, a second region disposed between the pair of first regions, and at least one third region, each of which being disposed between and contiguous with the second region and each of the pair of first regions, the second region including a sub-region contiguous with each of the at least one third region, forming a heat retaining layer over the substrate, irradiating the patterned amorphous silicon layer with a laser through the heat retaining layer to form a patterned crystallized silicon layer corresponding to the patterned amorphous silicon layer including a grain boundary extending substantially across a crystallized sub-region corresponding to the sub-region, and forming a patterned conductive layer over a portion of a crystallized second region of the patterned crystallized silicon layer corresponding to the second region of the patterned amorphous silicon layer.

Abstract translation: 一种制造薄膜晶体管（“TFT”）器件的方法包括提供衬底，在衬底上形成图案化的非晶硅层，该衬底包括一对第一区域，设置在该对第一区域之间的第二区域和至少一个 第三区域，每个区域设置在第二区域之间并与第二区域和第一区域中的每一个相邻并且与第一区域中的每一个邻接，第二区域包括与至少一个第三区域中的每一个邻接的子区域， 衬底，通过所述保温层用激光照射所述图案化非晶硅层，以形成对应于所述图案化非晶硅层的图案化结晶硅层，所述图案化非晶硅层包括基本上跨越对应于所述子区域的结晶子区域延伸的晶界，以及 在图案化的结晶硅层对角结晶的第二区域的一部分上形成图案化的导电层 结合到图案化非晶硅层的第二区域。

公开(公告)号：US06982195B2

公开(公告)日：2006-01-03

申请号：US10780589

申请日：2004-02-19

Applicant: Jia-Xing Lin ,  Chi-Lin Chen ,  Yu-Cheng Chen

Inventor： Jia-Xing Lin ,  Chi-Lin Chen ,  Yu-Cheng Chen

IPC: H01L21/84

CPC classification number: H01L21/02686 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/2026 ,  H01L21/268 ,  H01L27/1296 ,  H01L29/66757 ,  H01L29/78675

Abstract: An amorphous silicon layer is formed on a substrate, and then a protective layer and a reflective layer are formed in turn to form a film stack on portions of the amorphous silicon layer. The reflective layer is a metal material with reflectivity of laser, and the protective layer is able to prevent metal diffusion. When an excimer laser heats the amorphous silicon layer to crystallize the amorphous silicon, nucleation sites are formed in the amorphous silicon layer under the film stack of the protective layer and the reflective layer. Next, laterally expanding crystallization occurs in the amorphous silicon layer to form poly-silicon having crystal grains with size of micrometers and high grain order.

Abstract translation: 在基板上形成非晶硅层，然后依次形成保护层和反射层，以在非晶硅层的部分上形成膜堆叠。 反射层是具有激光反射率的金属材料，保护层能够防止金属扩散。 当准分子激光器加热非晶硅层以使非晶硅结晶时，在保护层和反射层的膜堆叠下面的非晶硅层中形成成核位置。 接下来，在非晶硅层中发生横向膨胀结晶，形成晶粒大小为微米，晶粒度高的多晶硅。