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    Semiconductor processing apparatus with simultaneously movable stages
    1.
    发明授权
    Semiconductor processing apparatus with simultaneously movable stages 有权
    半导体处理装置具有同步可动级

    公开(公告)号：US08544317B2

    公开(公告)日：2013-10-01

    申请号：US12576526

    申请日：2009-10-09

    申请人： Yu-Fu Lin ,  Yung-Cheng Chen ,  Heng-Jen Lee ,  Chin-Hsiang Lin

    发明人： Yu-Fu Lin ,  Yung-Cheng Chen ,  Heng-Jen Lee ,  Chin-Hsiang Lin

    IPC分类号： B23Q17/09 ,  G01N19/02

    CPC分类号： H01L21/68785 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/70525 ,  G03F7/70725 ,  G03F7/70733 ,  G03F7/70766 ,  H01J37/3174 ,  H01L21/68

    摘要： A method and apparatus provide for simultaneously moving multiple semiconductor wafers in opposite directions while simultaneously performing processing operations on each of the wafers. The semiconductor wafers are orientated in coplanar fashion and are disposed on stages that simultaneously translate in opposite directions to produce a net system momentum of zero. The die of the respective semiconductor wafers are processed in the same spatial sequence with respect to a global alignment feature of the semiconductor wafer. A balance mass is not needed to counteract the motion of a stage because the opposite motions of the respective stages cancel each other.

    摘要翻译： 一种方法和装置提供同时在相反方向上移动多个半导体晶片，同时对每个晶片执行处理操作。 半导体晶片以共面方式取向，并且设置在同时沿相反方向平移的阶段上，以产生零的系统动量。 相对于半导体晶片的全局对准特征，对相应的半导体晶片的管芯进行相同的空间序列处理。 不需要平衡质量来抵消舞台的运动，因为各个舞台的相反运动彼此抵消。

    Frame cell for shot layout flexibility
    2.
    发明授权
    Frame cell for shot layout flexibility 有权
    帧单元，用于拍摄布局灵活性

    公开(公告)号：US08843860B2

    公开(公告)日：2014-09-23

    申请号：US13409517

    申请日：2012-03-01

    申请人： Chin-Ming Lin ,  Chia-hung Huang ,  Chi-Ming Yang ,  Chin-Hsiang Lin ,  Yung-Cheng Chen ,  Chih-Wei Lin

    发明人： Chin-Ming Lin ,  Chia-hung Huang ,  Chi-Ming Yang ,  Chin-Hsiang Lin ,  Yung-Cheng Chen ,  Chih-Wei Lin

    IPC分类号： G06F17/50 ,  G03F7/20

    CPC分类号： G03F7/70433

    摘要： A method includes establishing an initial shot layout in which a number of shots are arranged in vertically aligned columns and horizontally aligned rows to cover a semiconductor wafer. At least one of a row of shots or a column of shots is shifted relative to an adjacent row or column of shots to establish at least one additional shot layout that differs from the initial shot layout in that shots in the at least one shifted row or column of shots are not aligned with the shots in the adjacent row or column of shots with which they were aligned in the initial shot layout. One of the initial shot layout and the at least one additional shot layout is selected as a final shot layout. The wafer is exposed to light using the final shot layout.

    摘要翻译： 一种方法包括建立初始照片布局，其中多个照片布置在垂直排列的列和水平排列的行中以覆盖半导体晶片。 一排照片或一列照片中的至少一列相对于相邻的行或列发射位移，以建立与至少一个移位行中的拍摄中的初始镜头布局不同的至少一个附加镜头布局，或 一列照片不与在初始镜头布局中对齐的相邻行或照片列中的镜头对齐。 选择初始镜头布局和至少一个附加镜头布局之一作为最终镜头布局。 使用最终镜头布局将晶片曝光。

    Method and apparatus to improve lithography throughput
    3.
    发明授权
    Method and apparatus to improve lithography throughput 有权
    提高光刻产量的方法和装置

    公开(公告)号：US07795601B2

    公开(公告)日：2010-09-14

    申请号：US11421590

    申请日：2006-06-01

    申请人： Chin-Hsiang Lin ,  Jui-Chung Peng ,  Yung-Cheng Chen ,  Shy-Jay Lin

    发明人： Chin-Hsiang Lin ,  Jui-Chung Peng ,  Yung-Cheng Chen ,  Shy-Jay Lin

    IPC分类号： C12Q1/68 ,  H01J40/00

    CPC分类号： G03F7/70991 ,  G03F7/70466

    摘要： The present disclosure provides a lithography apparatus with improved lithography throughput. The lithography apparatus includes a first lens system; a first substrate stage configured to receive a first radiation energy from the first lens system, and designed operable to move a substrate during an exposing process; a second lens system, having a higher resolution than that of the first lens system; and a second substrate stage approximate to the first substrate stage and configured to receive a second radiation energy from the second lens system, and designed operable to receive the substrate from the first substrate stage and move the substrate.

    摘要翻译： 本公开提供了具有改进的光刻产量的光刻设备。 光刻设备包括第一透镜系统; 第一衬底台，被配置为从所述第一透镜系统接收第一辐射能量，并且被设计为可操作以在曝光过程期间移动衬底; 第二透镜系统，具有比第一透镜系统更高的分辨率; 以及第二衬底台，其近似于所述第一衬底台并且被配置为从所述第二透镜系统接收第二辐射能量，并且被设计为可操作以从所述第一衬底台接收所述衬底并移动所述衬底。

    Wafer edge exposure module
    4.
    发明授权
    Wafer edge exposure module 有权
    晶圆边缘曝光模块

    公开(公告)号：US08625076B2

    公开(公告)日：2014-01-07

    申请号：US12702601

    申请日：2010-02-09

    申请人： Tsung-Chih Chien ,  Yung-Cheng Chen ,  Heng-Jen Lee

    发明人： Tsung-Chih Chien ,  Yung-Cheng Chen ,  Heng-Jen Lee

    IPC分类号： G03B27/74 ,  G03B27/42

    CPC分类号： G03F7/2022 ,  G03F7/70425

    摘要： A wafer edge exposure module connected to a semiconductor wafer track system. The wafer edge exposure module includes a wafer spin device, an optical system, a scanner interface module, and a controller. The wafer spin device supports a wafer for processing. The optical system directs exposure light on a respective edge portion of the wafer simultaneously to create a dummy track on the edge of the wafer. The scanner interface module sends and/or receives dummy edge exposure information from a scanner via a computer network. The controller receives the dummy edge exposure information from the scanner interface module and uses the exposure information to control the optical system.

    摘要翻译： 连接到半导体晶片轨道系统的晶片边缘曝光模块。 晶片边缘曝光模块包括晶片自旋装置，光学系统，扫描仪接口模块和控制器。 晶圆自旋装置支撑用于处理的晶片。 光学系统同时引导曝光在晶片的相应边缘部分上，以在晶片的边缘上产生虚拟轨迹。 扫描仪接口模块经由计算机网络从扫描仪发送和/或接收虚拟边缘曝光信息。 控制器从扫描仪接口模块接收虚拟边缘曝光信息，并使用曝光信息来控制光学系统。

    Frame cell for shot layout flexibility
    5.
    发明授权
    Frame cell for shot layout flexibility 有权
    帧单元，用于拍摄布局灵活性

    公开(公告)号：US08239788B2

    公开(公告)日：2012-08-07

    申请号：US12537836

    申请日：2009-08-07

    申请人： Chih-Wei Lin ,  Yung-Cheng Chen ,  Heng-Jen Lee

    发明人： Chih-Wei Lin ,  Yung-Cheng Chen ,  Heng-Jen Lee

    IPC分类号： G06F17/50 ,  G03C5/00

    CPC分类号： G03F7/70433

    摘要： A method includes receiving an integrated circuit chip size and determining a frame structure segment size based on the chip size. The frame structure segment size is less than the chip size. An initial shot layout having a chip count is established in which a number of shots, each including at least one frame structure segment and at least one chip, are arranged in vertically and horizontally aligned columns and rows. At least one additional shot layout is established in which at least one of a row or column of shots is offset from an adjacent row or column of shots. The initial shot layout is compared to the at least one additional shot layout, and a final shot layout is selected based in part on the total number of shots in the shot layout and has a final chip count that is greater than or equal to the initial chip count.

    摘要翻译： 一种方法包括接收集成电路芯片尺寸并基于芯片尺寸确定帧结构段大小。 帧结构段大小小于芯片大小。 建立具有芯片数量的初始照片布局，其中每个包括至少一个框架结构段和至少一个芯片的镜头排列在垂直和水平排列的列和行中。 建立至少一个额外的镜头布局，其中一列或一列镜头中的至少一个从相邻的行或镜头列偏移。 将初始照片布局与至少一个附加镜头布局进行比较，并且部分地基于镜头布局中的总镜头数量选择最终镜头布局，并且具有大于或等于初始镜头布局的最终​​裁片数量 芯片数量

    FRAME CELL FOR SHOT LAYOUT FLEXIBILITY
    6.
    发明申请
    FRAME CELL FOR SHOT LAYOUT FLEXIBILITY 有权
    用于拍摄布局灵活性的框架单元

    公开(公告)号：US20110033787A1

    公开(公告)日：2011-02-10

    申请号：US12537836

    申请日：2009-08-07

    申请人： Chih-Wei Lin ,  Yung-Cheng Chen ,  Heng-Jen Lee

    发明人： Chih-Wei Lin ,  Yung-Cheng Chen ,  Heng-Jen Lee

    IPC分类号： G03F7/20 ,  G06F17/50

    CPC分类号： G03F7/70433

    摘要： A method includes receiving an integrated circuit chip size and determining a frame structure segment size based on the chip size. The frame structure segment size is less than the chip size. An initial shot layout having a chip count is established in which a number of shots, each including at least one frame structure segment and at least one chip, are arranged in vertically and horizontally aligned columns and rows. At least one additional shot layout is established in which at least one of a row or column of shots is offset from an adjacent row or column of shots. The initial shot layout is compared to the at least one additional shot layout, and a final shot layout is selected based in part on the total number of shots in the shot layout and has a final chip count that is greater than or equal to the initial chip count.

    摘要翻译： 一种方法包括接收集成电路芯片尺寸并基于芯片尺寸确定帧结构段大小。 帧结构段大小小于芯片大小。 建立具有芯片数量的初始照片布局，其中每个包括至少一个框架结构段和至少一个芯片的镜头排列在垂直和水平排列的列和行中。 建立至少一个额外的镜头布局，其中一列或一列镜头中的至少一个从相邻的行或列的镜头偏移。 将初始照片布局与至少一个附加镜头布局进行比较，并且部分地基于镜头布局中的总镜头数量选择最终镜头布局，并且具有大于或等于初始镜头布局的最终​​裁片数量 芯片数量

    FRAME CELL FOR SHOT LAYOUT FLEXIBILITY
    8.
    发明申请
    FRAME CELL FOR SHOT LAYOUT FLEXIBILITY 有权
    用于拍摄布局灵活性的框架单元

    公开(公告)号：US20120181669A1

    公开(公告)日：2012-07-19

    申请号：US13409517

    申请日：2012-03-01

    申请人： Chin-Ming LIN ,  Chia-hung Huang ,  Chi-Ming Yang ,  Chin-Hsiang Lin ,  Yung-Cheng Chen ,  Chih-Wei Lin

    发明人： Chin-Ming LIN ,  Chia-hung Huang ,  Chi-Ming Yang ,  Chin-Hsiang Lin ,  Yung-Cheng Chen ,  Chih-Wei Lin

    IPC分类号： H01L23/544 ,  G06F17/50

    CPC分类号： G03F7/70433

    摘要： A method includes establishing an initial shot layout in which a number of shots are arranged in vertically aligned columns and horizontally aligned rows to cover a semiconductor wafer. At least one of a row of shots or a column of shots is shifted relative to an adjacent row or column of shots to establish at least one additional shot layout that differs from the initial shot layout in that shots in the at least one shifted row or column of shots are not aligned with the shots in the adjacent row or column of shots with which they were aligned in the initial shot layout. One of the initial shot layout and the at least one additional shot layout is selected as a final shot layout. The wafer is exposed to light using the final shot layout.

    摘要翻译： 一种方法包括建立初始照片布局，其中多个照片布置在垂直排列的列和水平排列的行中以覆盖半导体晶片。 一排照片或一列照片中的至少一列相对于相邻的行或列发射位移，以建立与至少一个移位行中的拍摄中的初始镜头布局不同的至少一个附加镜头布局，或 一列照片不与在初始镜头布局中对齐的相邻行或照片列中的镜头对齐。 选择初始镜头布局和至少一个附加镜头布局之一作为最终镜头布局。 使用最终镜头布局将晶片曝光。

    DISPLAY DEVICE AND METHOD OF MEASURING SURFACE STRUCTURE THEREOF
    10.
    发明申请
    DISPLAY DEVICE AND METHOD OF MEASURING SURFACE STRUCTURE THEREOF 有权
    显示装置及其表面结构的测量方法

    公开(公告)号：US20110128481A1

    公开(公告)日：2011-06-02

    申请号：US12779915

    申请日：2010-05-13

    申请人： Chih-Wei Lin ,  Min-Cheng Wang ,  Yung-Cheng Chen ,  Hung-Min Liu

    发明人： Chih-Wei Lin ,  Min-Cheng Wang ,  Yung-Cheng Chen ,  Hung-Min Liu

    IPC分类号： G02F1/1335 ,  G02F1/167 ,  G01B11/00

    CPC分类号： G01B11/24 ,  G01B5/061 ,  G01B11/00 ,  G01B11/02 ,  G01B11/0608 ,  G01B11/08 ,  G01B17/02 ,  G02F1/133512 ,  G02F1/13394 ,  G03F7/70625

    摘要： A display device and a method of measuring a surface structure of the same are provided. The display device includes first and second substrates, first and second patterned light-shielding layers, and first and second pixel units. The first patterned light-shielding layer disposed on a surface of the first substrate includes first openings. The second patterned light-shielding layer disposed on the surface of the first substrate in the first patterned light-shielding layer includes second openings. The first pixel unit includes first and second protrusions. The first protrusion correspondingly covers the first openings and a portion of the first patterned light-shielding layer. The second protrusion is disposed in the first and second patterned light-shielding layers. The second pixel unit includes a third protrusion correspondingly covering the second openings and a portion of the second patterned light-shielding layer, wherein sizes of the second openings are smaller than sizes of the first openings.

    摘要翻译： 提供显示装置和测量其表面结构的方法。 显示装置包括第一和第二基板，第一和第二图案化遮光层以及第一和第二像素单元。 设置在第一基板的表面上的第一图案化遮光层包括第一开口。 设置在第一图案化遮光层中的第一基板的表面上的第二图案遮光层包括第二开口。 第一像素单元包括第一和第二突起。 第一突起相应地覆盖第一开口和第一图案化遮光层的一部分。 第二突起设置在第一和第二图案化的遮光层中。 第二像素单元包括对应地覆盖第二开口的第三突起和第二图案化遮光层的一部分，其中第二开口的尺寸小于第一开口的尺寸。