摘要:
A method includes establishing an initial shot layout in which a number of shots are arranged in vertically aligned columns and horizontally aligned rows to cover a semiconductor wafer. At least one of a row of shots or a column of shots is shifted relative to an adjacent row or column of shots to establish at least one additional shot layout that differs from the initial shot layout in that shots in the at least one shifted row or column of shots are not aligned with the shots in the adjacent row or column of shots with which they were aligned in the initial shot layout. One of the initial shot layout and the at least one additional shot layout is selected as a final shot layout. The wafer is exposed to light using the final shot layout.
摘要:
A method includes establishing an initial shot layout in which a number of shots are arranged in vertically aligned columns and horizontally aligned rows to cover a semiconductor wafer. At least one of a row of shots or a column of shots is shifted relative to an adjacent row or column of shots to establish at least one additional shot layout that differs from the initial shot layout in that shots in the at least one shifted row or column of shots are not aligned with the shots in the adjacent row or column of shots with which they were aligned in the initial shot layout. One of the initial shot layout and the at least one additional shot layout is selected as a final shot layout. The wafer is exposed to light using the final shot layout.
摘要:
A method and system to improve scanner throughput is provided. An image from a reticle is projected onto a substrate using a continuous linear scanning procedure in which an entire column of die or cells of die is scanned continuously, i.e. without stepping to a different location. Each scan includes translating a substrate with respect to a fixed beam. While the substrate is translated, the reticle is also translated. When a first die or cell of die is projected onto the substrate, the reticle translates along a direction opposite the scan direction and as the scan continues along the same direction, the reticle then translates in the opposite direction of the substrate thereby forming an inverted pattern on the next die or cell. The time associated with exposing the substrate is minimized as the stepping operation only occurs after a complete column of cells is scanned.
摘要:
A display device and a method of measuring a surface structure of the same are provided. The display device includes first and second substrates, first and second patterned light-shielding layers, and first and second pixel units. The first patterned light-shielding layer disposed on a surface of the first substrate includes first openings. The second patterned light-shielding layer disposed on the surface of the first substrate in the first patterned light-shielding layer includes second openings. The first pixel unit includes first and second protrusions. The first protrusion correspondingly covers the first openings and a portion of the first patterned light-shielding layer. The second protrusion is disposed in the first and second patterned light-shielding layers. The second pixel unit includes a third protrusion correspondingly covering the second openings and a portion of the second patterned light-shielding layer, wherein sizes of the second openings are smaller than sizes of the first openings.
摘要:
A display device and a method of measuring a surface structure of the same are provided. The display device includes first and second substrates, first and second patterned light-shielding layers, and first and second pixel units. The first patterned light-shielding layer disposed on a surface of the first substrate includes first openings. The second patterned light-shielding layer disposed on the surface of the first substrate in the first patterned light-shielding layer includes second openings. The first pixel unit includes first and second protrusions. The first protrusion correspondingly covers the first openings and a portion of the first patterned light-shielding layer. The second protrusion is disposed in the first and second patterned light-shielding layers. The second pixel unit includes a third protrusion correspondingly covering the second openings and a portion of the second patterned light-shielding layer, wherein sizes of the second openings are smaller than sizes of the first openings.
摘要:
A method includes receiving an integrated circuit chip size and determining a frame structure segment size based on the chip size. The frame structure segment size is less than the chip size. An initial shot layout having a chip count is established in which a number of shots, each including at least one frame structure segment and at least one chip, are arranged in vertically and horizontally aligned columns and rows. At least one additional shot layout is established in which at least one of a row or column of shots is offset from an adjacent row or column of shots. The initial shot layout is compared to the at least one additional shot layout, and a final shot layout is selected based in part on the total number of shots in the shot layout and has a final chip count that is greater than or equal to the initial chip count.
摘要:
A method includes receiving an integrated circuit chip size and determining a frame structure segment size based on the chip size. The frame structure segment size is less than the chip size. An initial shot layout having a chip count is established in which a number of shots, each including at least one frame structure segment and at least one chip, are arranged in vertically and horizontally aligned columns and rows. At least one additional shot layout is established in which at least one of a row or column of shots is offset from an adjacent row or column of shots. The initial shot layout is compared to the at least one additional shot layout, and a final shot layout is selected based in part on the total number of shots in the shot layout and has a final chip count that is greater than or equal to the initial chip count.
摘要:
The invention relates to a bump structure of a semiconductor device. An exemplary structure for a semiconductor device comprises a substrate; a contact pad over the substrate; a passivation layer extending over the substrate having an opening over the contact pad; and a conductive pillar over the opening of the passivation layer, wherein the conductive pillar comprises an upper portion substantially perpendicular to a surface of the substrate and a lower portion having tapered sidewalls.
摘要:
A device includes a redistribution line, and a polymer region molded over the redistribution line. The polymer region includes a first flat top surface. A solder region is disposed in the polymer region and electrically coupled to the redistribution line. The solder region includes a second flat top surface not higher than the first flat top surface.
摘要:
A method includes applying a polymer-comprising material over a carrier, and forming a via over the carrier. The via is located inside the polymer-comprising material, and substantially penetrates through the polymer-comprising material. A first redistribution line is formed on a first side of the polymer-comprising material. A second redistribution line is formed on a second side of the polymer-comprising material opposite to the first side. The first redistribution line is electrically coupled to the second redistribution line through the via.