摘要:
In a wireless device, a method and system for a baseband receiver interface including analog and digital components are provided. An analog or a digital interface may be selected for a I/Q data signal received from a front-end receiver. The analog interface may be a conventional RF or a VLIF interface. The I/Q data signal may be digitized when received from the analog interface and saturation detection may be used during digitization of the I/Q data signal. When the analog interface is the VLIF interface, a derotator may be used to remove the VLIF frequency. The derotator may be based on a CORDIC algorithm. The I/Q data signal may be converted from serial to parallel format when received from the digital interface. The received I/Q data signal may be decimated before transferred to a baseband processor.
摘要:
In an audio processing device, a method and system for improved CODEC with polyringer are provided. An audio CODEC may comprise an audio ADC, an audio DAC, and a sidetone generator. Data from an external microphone may be processed by an audio ADC and may be sent to a processor that may be adapted to perform digital signal processing operations. The audio DAC may receive from the processor digital audio and polyphonic ringer data and may process the digital audio and polyphonic ringer data through separate digital filters and digital interpolators. The audio DAC may add the processed digital audio and polyphonic ringer data before analog conversion. The audio DAC may perform analog conversion by utilizing a delta-sigma modulator, a current-based DAC, and a switched-capacitor filter. The converted data may be filtered with an RC filter and may be utilized to drive an external speaker or earpiece.
摘要:
A system for implementing Incremental Redundancy (IR) operations in a wireless receiver includes a baseband processor, an equalizer, a system processor, and an IR processing module. The baseband processor receives an analog signal corresponding to a data block and samples the analog signal to produce samples. The equalizer receives the samples from the baseband processor, equalizes the samples, and produces soft decision bits corresponding to the data block. The equalizer may be implemented as a distinct processing component or may be performed by the baseband processor or system processor. The system processor receives at least the soft decision bits and initiates IR operations. The IR processing module receives the soft decision bits of the data block and performs IR operations on the data block in an attempt to correctly decode a corresponding data block.
摘要:
A system for implementing Incremental Redundancy (IR) operations in a wireless receiver includes a baseband processor, an equalizer, a system processor, and an IR processing module. The baseband processor receives an analog signal corresponding to a data block and samples the analog signal to produce samples. The equalizer receives the samples from the baseband processor, equalizes the samples, and produces soft decision bits corresponding to the data block. The equalizer may be implemented as a distinct processing component or may be performed by the baseband processor or system processor. The system processor receives at least the soft decision bits and initiates IR operations. The IR processing module receives the soft decision bits of the data block and performs IR operations on the data block in an attempt to correctly decode a corresponding data block.
摘要:
The present invention provides a multi-branch equalizer processing module operable to cancel interference associated with received radio frequency (RF) burst(s). This multi-branch equalizer processing module includes both a first equalizer processing branch and a second equalizer processing branch. The first equalizer processing branch is operable to be trained based upon known training sequences and equalize the received RF burst. This results in soft samples or decisions which in turn may be converted to data bits. The soft samples are processed with a de-interleaver and channel decoder, where the combination is operable to produce a decoded frame of data bits from the soft samples. A re-encoder may re-encode the decoded frame to produce re-encoded or at least partially re-encoded data bits. An interleaver then processes the at least partially re-encoded data bits to produce and at least partially re-encoded burst. The second equalizer processing branch uses the at least partially re-encoded data bits to train linear equalizer(s) within-the second equalizer processing branch. A buffer may initially store the received RF burst(s), which are retrieved and equalized by the second equalizer processing branch once the linear equalizer(s) are trained. This results in alternate soft samples or decisions which in turn may be converted to alternate data bits. The alternate soft samples are processed with the de-interleaver and channel decoder, where the combination is operable to produce an alternate decoded frame of data bits from the alternate soft samples. This allows interfering signals to be cancelled and more accurate processing of the received RF bursts to occur.
摘要:
Disclosed are various embodiments involving a two-step searcher for cell discovery. Multiple scrambling codes associated with multiple neighboring cells are obtained. Slot timing is obtained for a received signal based at least in part on a detection of primary synchronization peak energy in the received signal. One of the scrambling codes for decoding the received signal is identified based at least in part on testing multiple scrambling code hypotheses in parallel during an accumulation time period of the received signal in response to obtaining the slot timing.
摘要:
A technique for time tracking helps a mobile communication device with multiple SIMs to more accurately maintain synchronization with a base station. By utilizing synchronization information from both SIMs, the technique is able to more frequently and more accurately adjust timing information for each SIM. As a result, the mobile communication device exhibits an increased ability to accurately synchronize without the need for a higher precision reference or increased power consumption.
摘要:
A method and system for decoding control data in GSM-based systems using inherent redundancy and physical constraints are presented. At least one estimated GSM-based bit sequence may be selected by performing searches that start from trellis junctions determined by the decoding algorithm. The estimated bit sequences may be selected based on corresponding redundancy verification parameters. At least one physical constraint test may be performed on the selected estimated GSM-based bit sequences to select a decoded output GSM-based bit sequence. A multilayer decoding process may comprise a burst process and a frame process. Results from a first burst process may be utilized to generate a decoded GSM bit sequence in the frame process. The frame process may utilize redundancy information and physical constraints to improve the performance of a decoding algorithm.
摘要:
Aspects of a method and system for decoding single antenna interference cancellation (SAIC) and redundancy processing adaptation using burst process are provided. A wireless receiver may decode bit sequences based on a first decoding algorithm that may utilize redundancy in the data and that may impose physical constraints. The receiver may also decode a received bit sequence based on a second decoding algorithm that utilizes SAIC. Received data may be processed in a burst process portion in either decoding algorithm. Burst processed data from one of the decoding algorithms may be selected based on signal-to-noise ratio and/or received signal level measurements. The selected burst processed data may be communicated to a frame processing portion of the corresponding decoding algorithm.
摘要:
Aspects of a method and system for decoding single antenna interference cancellation (SAIC) and redundancy processing adaptation using burst process are provided. A wireless receiver may decode bit sequences based on a first decoding algorithm that may utilize redundancy in the data and that may impose physical constraints. The receiver may also decode a received bit sequence based on a second decoding algorithm that utilizes SAIC. Received data may be processed in a burst process portion in either decoding algorithm. Burst processed data from one of the decoding algorithms may be selected based on signal-to-noise ratio and/or received signal level measurements. The selected burst processed data may be communicated to a frame processing portion of the corresponding decoding algorithm.