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    Nonvolatile semiconductor device and a method of manufacturing thereof
    2.
    发明授权
    Nonvolatile semiconductor device and a method of manufacturing thereof 失效
    非易失性半导体器件及其制造方法

    公开(公告)号：US5338957A

    公开(公告)日：1994-08-16

    申请号：US110151

    申请日：1993-08-23

    申请人： Atsushi Fukumoto ,  Makoto Ohi ,  Hiroshi Onoda ,  Natsuo Ajika ,  Yuichi Kunori

    发明人： Atsushi Fukumoto ,  Makoto Ohi ,  Hiroshi Onoda ,  Natsuo Ajika ,  Yuichi Kunori

    IPC分类号： H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L29/68 ,  G11C11/34

    CPC分类号： H01L27/115

    摘要： The width of a charge storage electrode and a control electrode in the column direction is set to be wider above an element isolation region than that above a channel region. Therefore, the capacitance between the control electrode and the charge storage electrode can be increased to improve the coupling ratio in a nonvolatile semiconductor memory device. Also, a first interconnection layer is equal in height above the control electrode and above the channel region, so that patterning of the first interconnection layer can be carried out easily and precisely.

    摘要翻译： 在列方向上的电荷存储电极和控制电极的宽度被设定为比元件隔离区域高于沟道区域以上的宽度。 因此，可以增加控制电极和电荷存储电极之间的电容，以提高非易失性半导体存储器件中的耦合比。 此外，第一互连层在控制电极上方高于沟道区域的高度相等，使得可以容易且精确地执行第一互连层的图案化。

    Semiconductor memory device and method of manufacturing the same
    3.
    发明授权
    Semiconductor memory device and method of manufacturing the same 失效
    半导体存储器件及其制造方法

    公开(公告)号：US5400278A

    公开(公告)日：1995-03-21

    申请号：US114229

    申请日：1993-09-01

    申请人： Yuichi Kunori ,  Natsuo Ajika ,  Hiroshi Onoda ,  Makoto Ohi ,  Atsushi Fukumoto

    发明人： Yuichi Kunori ,  Natsuo Ajika ,  Hiroshi Onoda ,  Makoto Ohi ,  Atsushi Fukumoto

    IPC分类号： H01L21/8242 ,  H01L21/8246 ,  H01L21/8247 ,  H01L27/10 ,  H01L27/105 ,  H01L27/112 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

    CPC分类号： H01L27/10844 ,  H01L27/105 ,  H01L27/11517 ,  H01L27/11526

    摘要： In a semiconductor memory device according to the present invention, a conductive layer is formed on a field oxide film in a boundary region on the main surface of a semiconductor substrate. A floating gate electrode, an interlayer insulating film, and a control gate electrode are formed on the semiconductor substrate in a memory cell array region with a gate insulating film interposed therebetween. A gate electrode is formed in a peripheral circuit region with the gate insulating film interposed therebetween. An interlayer insulating film is formed on the conductive layer, the gate electrode, and the control gate electrode. A contact hole is formed at a predetermined position of the interlayer insulating film. An interconnection layer is selectively formed on the interlayer insulating film including the inner surface of the contact hole. According to the present invention, it is possible to prevent formation of a concave portion on the surface of the field oxide film in the boundary region. It is also possible to protect the memory cell array region from an external noise by forming the conductive layer on the field oxide film in the boundary region and by fixing the potential of the conductive layer.

    摘要翻译： 在根据本发明的半导体存储器件中，在半导体衬底的主表面上的边界区域中的场氧化物膜上形成导电层。 在半导体衬底上形成有一个栅极绝缘膜和一个控制栅电极的存储单元阵列区域中，栅极绝缘膜插在其间。 栅极电极形成在外围电路区域中，栅极绝缘膜插入其间。 在导电层，栅电极和控制栅电极上形成层间绝缘膜。 在层间绝缘膜的预定位置处形成接触孔。 在包括接触孔的内表面的层间绝缘膜上选择性地形成布线层。 根据本发明，可以防止在边界区域的场氧化膜的表面上形成凹部。 也可以通过在边界区域的场氧化膜上形成导电层，并通过固定导电层的电位来保护存储单元阵列区域免受外部噪声的影响。

    Method of making memory cells with peripheral transistors
    5.
    发明授权
    Method of making memory cells with peripheral transistors 失效
    制造具有外围晶体管的存储单元的方法

    公开(公告)号：US5538912A

    公开(公告)日：1996-07-23

    申请号：US370755

    申请日：1995-01-10

    申请人： Yuichi Kunori ,  Natsuo Ajika ,  Hiroshi Onoda ,  Makoto Ohi ,  Atsushi Fukumoto

    发明人： Yuichi Kunori ,  Natsuo Ajika ,  Hiroshi Onoda ,  Makoto Ohi ,  Atsushi Fukumoto

    IPC分类号： H01L21/8242 ,  H01L21/8246 ,  H01L21/8247 ,  H01L27/10 ,  H01L27/105 ,  H01L27/112 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

    CPC分类号： H01L27/10844 ,  H01L27/105 ,  H01L27/11517 ,  H01L27/11526

    摘要： In a semiconductor memory device according to the present invention, a conductive layer is formed on a field oxide film in a boundary region on the main surface of a semiconductor substrate. A floating gate electrode, an interlayer insulating film, and a control gate electrode are formed on the semiconductor substrate in a memory cell array region with a gate insulating film interposed therebetween. A gate electrode is formed in a peripheral circuit region with the gate insulating film interposed therebetween. An interlayer insulating film is formed on the conductive layer, the gate electrode, and the control gate electrode. A contact hole is formed at a predetermined position of the interlayer insulating film. An interconnection layer is selectively formed on the interlayer insulating film including the inner surface of the contact hole. According to the present invention, it is possible to prevent formation of a concave portion on the surface of the field oxide film in the boundary region. It is also possible to protect the memory cell array region from an external noise by forming the conductive layer on the field oxide film in the boundary region and by fixing the potential of the conductive layer.

    摘要翻译： 在根据本发明的半导体存储器件中，在半导体衬底的主表面上的边界区域中的场氧化物膜上形成导电层。 在半导体衬底上形成有一个栅极绝缘膜和一个控制栅电极的存储单元阵列区域中，栅极绝缘膜插在其间。 栅极电极形成在外围电路区域中，栅极绝缘膜插入其间。 在导电层，栅电极和控制栅电极上形成层间绝缘膜。 在层间绝缘膜的预定位置处形成接触孔。 在包括接触孔的内表面的层间绝缘膜上选择性地形成布线层。 根据本发明，可以防止在边界区域的场氧化膜的表面上形成凹部。 也可以通过在边界区域的场氧化膜上形成导电层，并通过固定导电层的电位来保护存储单元阵列区域免受外部噪声的影响。

    Non-volatile semiconductor memory device
    8.
    发明授权
    Non-volatile semiconductor memory device 有权
    非易失性半导体存储器件

    公开(公告)号：US06172397B2

    公开(公告)日：2001-01-09

    申请号：US09222794

    申请日：1998-12-30

    申请人： Takahiro Oonakado ,  Hiroshi Onoda ,  Natsuo Ajika ,  Kiyohiko Sakakibara

    发明人： Takahiro Oonakado ,  Hiroshi Onoda ,  Natsuo Ajika ,  Kiyohiko Sakakibara

    IPC分类号： H01L29788

    CPC分类号： H01L29/7885

    摘要： In a non-volatile semiconductor memory device according to the present invention, a p type source region and a p type drain region are formed in the surface of an n well. A floating gate electrode and a control gate electrode are formed on a channel region with a tunnel oxide film interposed therebetween. According to this structure, a negative potential is applied to the drain region and a positive potential is applied to the control gate electrode when data is programmed, whereby electrons are injected from the drain region to the floating gate electrode by a band-to-band tunnel current induced hot electron injection current in the drain region. As a result, a non-volatile semiconductor memory device is provided which can prevent deterioration of the tunnel oxide film and which can be miniaturized.

    摘要翻译： 在根据本发明的非易失性半导体存储器件中，在n阱的表面中形成p型源极区和p型漏极区。 在沟道区域上形成浮栅电极和控制栅电极，其间具有隧道氧化膜。 根据该结构，在漏极区域施加负电位，在编程数据时向控制栅电极施加正电位，由此通过带对频从漏极区域向浮栅电极注入电子 隧道电流在漏区引起热电子注入电流。 结果，提供了可以防止隧道氧化膜劣化并且可以小型化的非易失性半导体存储器件。

    Non-volatile semiconductor memory device
    9.
    发明授权
    Non-volatile semiconductor memory device 失效
    非易失性半导体存储器件

    公开(公告)号：US5877524A

    公开(公告)日：1999-03-02

    申请号：US596820

    申请日：1996-02-05

    申请人： Takahiro Oonakado ,  Hiroshi Onoda ,  Natsuo Ajika ,  Kiyohiko Sakakibara

    发明人： Takahiro Oonakado ,  Hiroshi Onoda ,  Natsuo Ajika ,  Kiyohiko Sakakibara

    IPC分类号： H01L21/8247 ,  H01L29/788 ,  H01L29/792

    CPC分类号： H01L29/7885

    摘要： In a non-volatile semiconductor memory device according to the present invention, a p type source region and a p type drain region are formed in the surface of an n well. A floating gate electrode and a control gate electrode are formed on a channel region with a tunnel oxide film interposed therebetween. According to this structure, a negative potential is applied to the drain region and a positive potential is applied to the control gate electrode when data is programmed, whereby electrons are injected from the drain region to the floating gate electrode by a band-to-band tunnel current induced hot electron injection current in the drain region. As a result, a non-volatile semiconductor memory device is provided which can prevent deterioration of the tunnel oxide film and which can be miniaturized.

    摘要翻译： 在根据本发明的非易失性半导体存储器件中，在n阱的表面中形成p型源极区和p型漏极区。 在沟道区域上形成浮栅电极和控制栅电极，其间具有隧道氧化膜。 根据该结构，在漏极区域施加负电位，在编程数据时向控制栅电极施加正电位，由此通过带对频从漏极区域向浮栅电极注入电子 隧道电流在漏区引起热电子注入电流。 结果，提供了可以防止隧道氧化膜劣化并且可以小型化的非易失性半导体存储器件。