利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

112 条记录 (耗时 0.026 秒)

    Nonvolatile resistive memory element with an integrated oxygen isolation structure
    1.
    发明授权
    Nonvolatile resistive memory element with an integrated oxygen isolation structure 有权
    具有集成氧隔离结构的非易失性电阻式存储元件

    公开(公告)号：US08878152B2

    公开(公告)日：2014-11-04

    申请号：US13408103

    申请日：2012-02-29

    申请人： Yun Wang ,  Tony P. Chiang ,  Imran Hashim ,  Dipankar Pramanik

    发明人： Yun Wang ,  Tony P. Chiang ,  Imran Hashim ,  Dipankar Pramanik

    IPC分类号： H01L29/02

    CPC分类号： H01L45/16 ,  H01L27/2463 ,  H01L45/10 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1675

    摘要： A nonvolatile resistive memory element includes one or more novel oxygen isolation structures that protect the resistive switching material of the memory element from oxygen migration. One such oxygen isolation structure comprises an oxygen barrier layer that isolates the resistive switching material from other portions of the resistive memory device during fabrication and/or operation of the memory device. Another such oxygen isolation structure comprises a sacrificial layer that reacts with unwanted oxygen migrating toward the resistive switching material during fabrication and/or operation of the memory device.

    摘要翻译： 非易失性电阻存储元件包括一个或多个新颖的氧隔离结构，其保护存储元件的电阻开关材料免于氧迁移。 一个这样的氧隔离结构包括氧阻隔层，其在制造和/或操作存储器件期间将电阻性开关材料与电阻式存储器件的其它部分隔离。 另一种这样的氧隔离结构包括牺牲层，其在存储器件的制造和/或操作期间与向电阻开关材料迁移的不想要的氧化反应。

    NONVOLATILE RESISTIVE MEMORY ELEMENT WITH AN INTEGRATED OXYGEN ISOLATION STRUCTURE
    2.
    发明申请
    NONVOLATILE RESISTIVE MEMORY ELEMENT WITH AN INTEGRATED OXYGEN ISOLATION STRUCTURE 有权
    具有一体化氧分离结构的非挥发性电阻记忆元件

    公开(公告)号：US20130221307A1

    公开(公告)日：2013-08-29

    申请号：US13408103

    申请日：2012-02-29

    申请人： Yun Wang ,  Tony P. Chiang ,  Imran Hashim ,  Dipankar Pramanik

    发明人： Yun Wang ,  Tony P. Chiang ,  Imran Hashim ,  Dipankar Pramanik

    IPC分类号： H01L45/00

    CPC分类号： H01L45/16 ,  H01L27/2463 ,  H01L45/10 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1675

    摘要： A nonvolatile resistive memory element includes one or more novel oxygen isolation structures that protect the resistive switching material of the memory element from oxygen migration. One such oxygen isolation structure comprises an oxygen barrier layer that isolates the resistive switching material from other portions of the resistive memory device during fabrication and/or operation of the memory device. Another such oxygen isolation structure comprises a sacrificial layer that reacts with unwanted oxygen migrating toward the resistive switching material during fabrication and/or operation of the memory device.

    摘要翻译： 非易失性电阻存储元件包括一个或多个新颖的氧隔离结构，其保护存储元件的电阻开关材料免于氧迁移。 一个这样的氧隔离结构包括氧阻隔层，其在制造和/或操作存储器件期间将电阻性开关材料与电阻式存储器件的其它部分隔离。 另一种这样的氧隔离结构包括牺牲层，其在存储器件的制造和/或操作期间与向电阻开关材料迁移的不想要的氧化反应。

    Atomic layer deposition of hafnium and zirconium oxides for memory applications
    4.
    发明授权
    Atomic layer deposition of hafnium and zirconium oxides for memory applications 有权
    用于记忆应用的铪和锆氧化物的原子层沉积

    公开(公告)号：US08546275B2

    公开(公告)日：2013-10-01

    申请号：US13236481

    申请日：2011-09-19

    申请人： Yun Wang ,  Vidyut Gopal ,  Imran Hashim ,  Dipankar Pramanik ,  Tony Chiang

    发明人： Yun Wang ,  Vidyut Gopal ,  Imran Hashim ,  Dipankar Pramanik ,  Tony Chiang

    IPC分类号： H01L21/31 ,  H01L21/469

    CPC分类号： H01L45/146 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1616

    摘要： Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack having a metal oxide buffer layer disposed on or over a metal oxide bulk layer. The metal oxide bulk layer contains a metal-rich oxide material and the metal oxide buffer layer contains a metal-poor oxide material. The metal oxide bulk layer is less electrically resistive than the metal oxide buffer layer since the metal oxide bulk layer is less oxidized or more metallic than the metal oxide buffer layer. In one example, the metal oxide bulk layer contains a metal-rich hafnium oxide material and the metal oxide buffer layer contains a metal-poor zirconium oxide material.

    摘要翻译： 本发明的实施例一般涉及用于制造这种存储器件的非易失性存储器件和方法。 用于形成改进的存储器件（例如ReRAM单元）的方法提供优化的原子层沉积（ALD）工艺，用于形成金属氧化物膜堆叠，其具有设置在金属氧化物本体层上或其上的金属氧化物缓冲层。 金属氧化物本体层含有富金属氧化物材料，金属氧化物缓冲层含有贫金属氧化物。 由于金属氧化物本体层比金属氧化物缓冲层氧化较少或更金属，所以金属氧化物本体层的电阻小于金属氧化物缓冲层的电阻。 在一个实例中，金属氧化物本体层含有富金属氧化铪材料，金属氧化物缓冲层含有贫金属氧化锆材料。

    ATOMIC LAYER DEPOSITION OF HAFNIUM AND ZIRCONIUM OXIDES FOR MEMORY APPLICATIONS
    7.
    发明申请
    ATOMIC LAYER DEPOSITION OF HAFNIUM AND ZIRCONIUM OXIDES FOR MEMORY APPLICATIONS 有权
    用于存储器应用的铪和氧化锆的原子层沉积

    公开(公告)号：US20130071984A1

    公开(公告)日：2013-03-21

    申请号：US13236481

    申请日：2011-09-19

    申请人： Yun Wang ,  Vidyut Gopal ,  Imran Hashim ,  Dipankar Pramanik ,  Tony Chiang

    发明人： Yun Wang ,  Vidyut Gopal ,  Imran Hashim ,  Dipankar Pramanik ,  Tony Chiang

    IPC分类号： H01L45/00

    CPC分类号： H01L45/146 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1616

    摘要： Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack having a metal oxide buffer layer disposed on or over a metal oxide bulk layer. The metal oxide bulk layer contains a metal-rich oxide material and the metal oxide buffer layer contains a metal-poor oxide material. The metal oxide bulk layer is less electrically resistive than the metal oxide buffer layer since the metal oxide bulk layer is less oxidized or more metallic than the metal oxide buffer layer. In one example, the metal oxide bulk layer contains a metal-rich hafnium oxide material and the metal oxide buffer layer contains a metal-poor zirconium oxide material.

    摘要翻译： 本发明的实施例一般涉及用于制造这种存储器件的非易失性存储器件和方法。 用于形成改进的存储器件（例如ReRAM单元）的方法提供优化的原子层沉积（ALD）工艺，用于形成金属氧化物膜堆叠，其具有设置在金属氧化物本体层上或其上的金属氧化物缓冲层。 金属氧化物本体层含有富金属氧化物材料，金属氧化物缓冲层含有贫金属氧化物。 由于金属氧化物本体层比金属氧化物缓冲层氧化较少或更金属，所以金属氧化物本体层的电阻小于金属氧化物缓冲层的电阻。 在一个实例中，金属氧化物本体层含有富金属氧化铪材料，金属氧化物缓冲层含有贫金属氧化锆材料。

    ATOMIC LAYER DEPOSITION OF METAL OXIDE MATERIALS FOR MEMORY APPLICATIONS
    8.
    发明申请
    ATOMIC LAYER DEPOSITION OF METAL OXIDE MATERIALS FOR MEMORY APPLICATIONS 有权
    用于存储器应用的金属氧化物材料的原子层沉积

    公开(公告)号：US20130056702A1

    公开(公告)日：2013-03-07

    申请号：US13612000

    申请日：2012-09-12

    申请人： Yun Wang ,  Vidyut Gopal ,  Imran Hashim ,  Dipankar Pramanik ,  Tony Chiang

    发明人： Yun Wang ,  Vidyut Gopal ,  Imran Hashim ,  Dipankar Pramanik ,  Tony Chiang

    IPC分类号： H01L45/00 ,  B82Y10/00 ,  B82Y99/00

    CPC分类号： H01L45/145 ,  C23C16/40 ,  C23C16/45525 ,  H01L21/02175 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/02194 ,  H01L21/022 ,  H01L21/0228 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616

    摘要： Embodiments of the invention generally relate to nonvolatile memory devices, such as a ReRAM cells, and methods for manufacturing such memory devices, which includes optimized, atomic layer deposition (ALD) processes for forming metal oxide film stacks. The metal oxide film stacks contain a metal oxide coupling layer disposed on a metal oxide host layer, each layer having different grain structures/sizes. The interface disposed between the metal oxide layers facilitates oxygen vacancy movement. In many examples, the interface is a misaligned grain interface containing numerous grain boundaries extending parallel to the electrode interfaces, in contrast to the grains in the bulk film extending perpendicular to the electrode interfaces. As a result, oxygen vacancies are trapped and released during switching without significant loss of vacancies. Therefore, the metal oxide film stacks have improved switching performance and reliability during memory cell applications compared to traditional hafnium oxide based stacks of previous memory cells.

    摘要翻译： 本发明的实施例一般涉及非易失性存储器件，例如ReRAM单元，以及用于制造这种存储器件的方法，其包括用于形成金属氧化物膜堆叠的优化的原子层沉积（ALD）工艺。 金属氧化物膜堆叠包含设置在金属氧化物主体层上的金属氧化物耦合层，每个层具有不同的晶粒结构/尺寸。 设置在金属氧化物层之间的界面有助于氧空位移动。 在许多示例中，与垂直于电极界面延伸的体膜中的晶粒相反，界面是不对准的晶界，其包含平行于电极界面延伸的许多晶界。 因此，氧空缺在切换期间被捕获和释放，而空位明显损失。 因此，与以前的存储单元的传统的基于氧化铪的堆叠相比，金属氧化物膜堆叠在存储单元应用中具有改进的开关性能和可靠性。

    Atomic layer deposition of metal oxide materials for memory applications
    9.
    发明授权
    Atomic layer deposition of metal oxide materials for memory applications 有权
    用于记忆应用的金属氧化物材料的原子层沉积

    公开(公告)号：US08288297B1

    公开(公告)日：2012-10-16

    申请号：US13224021

    申请日：2011-09-01

    申请人： Yun Wang ,  Vidyut Gopal ,  Imran Hashim ,  Dipankar Pramanik ,  Tony Chiag

    发明人： Yun Wang ,  Vidyut Gopal ,  Imran Hashim ,  Dipankar Pramanik ,  Tony Chiag

    IPC分类号： H01L21/31 ,  H01L21/469

    CPC分类号： H01L45/145 ,  C23C16/40 ,  C23C16/45525 ,  H01L21/02175 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/02194 ,  H01L21/022 ,  H01L21/0228 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616

    摘要： Embodiments of the invention generally relate to nonvolatile memory devices, such as a ReRAM cells, and methods for manufacturing such memory devices, which includes optimized, atomic layer deposition (ALD) processes for forming metal oxide film stacks. The metal oxide film stacks contain a metal oxide coupling layer disposed on a metal oxide host layer, each layer having different grain structures/sizes. The interface disposed between the metal oxide layers facilitates oxygen vacancy movement. In many examples, the interface is a misaligned grain interface containing numerous grain boundaries extending parallel to the electrode interfaces, in contrast to the grains in the bulk film extending perpendicular to the electrode interfaces. As a result, oxygen vacancies are trapped and released during switching without significant loss of vacancies. Therefore, the metal oxide film stacks have improved switching performance and reliability during memory cell applications compared to traditional hafnium oxide based stacks of previous memory cells.

    摘要翻译： 本发明的实施例一般涉及非易失性存储器件，例如ReRAM单元，以及用于制造这种存储器件的方法，其包括用于形成金属氧化物膜堆叠的优化的原子层沉积（ALD）工艺。 金属氧化物膜堆叠包含设置在金属氧化物主体层上的金属氧化物耦合层，每个层具有不同的晶粒结构/尺寸。 设置在金属氧化物层之间的界面有助于氧空位移动。 在许多示例中，与垂直于电极界面延伸的体膜中的晶粒相反，界面是不对齐的晶粒界面，其包含平行于电极界面延伸的许多晶界。 因此，氧空缺在切换期间被捕获和释放，而空位明显损失。 因此，与以前的存储单元的传统的基于氧化铪的堆叠相比，金属氧化物膜堆叠在存储单元应用中具有改进的开关性能和可靠性。

    Creating an embedded reram memory from a high-K metal gate transistor structure
    10.
    发明授权
    Creating an embedded reram memory from a high-K metal gate transistor structure 有权
    从高K金属栅极晶体管结构创建嵌入式reram存储器

    公开(公告)号：US08803124B2

    公开(公告)日：2014-08-12

    申请号：US13407997

    申请日：2012-02-29

    申请人： Dipankar Pramanik ,  Tony P. Chiang ,  David Lazovsky

    发明人： Dipankar Pramanik ,  Tony P. Chiang ,  David Lazovsky

    IPC分类号： H01L47/00

    CPC分类号： H01L45/1658 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1683

    摘要： An embodiment of the present invention sets forth an embedded resistive memory cell that includes a first stack of deposited layers, a second stack of deposited layers, a first electrode disposed under a first portion of the first stack, and a second electrode disposed under a second portion of the first stack and extending from under the second portion of the first stack to under the second stack. The second electrode is disposed proximate to the first electrode within the embedded resistive memory cell. The first stack of deposited layers includes a dielectric layer, a high-k dielectric layer disposed above the dielectric layer, and a metal layer disposed above the high-k dielectric layer. The second stack of deposited layers includes a high-k dielectric layer formed simultaneously with the high-k dielectric layer included in the first stack, and a metal layer disposed above the high-k dielectric layer.

    摘要翻译： 本发明的实施例提出了一种嵌入式电阻式存储单元，其包括沉积层的第一堆叠，沉积层的第二堆叠，设置在第一堆叠的第一部分下方的第一电极和设置在第二堆叠下的第二电极的第二电极 第一堆叠的部分并且从第一堆叠的第二部分下方延伸到第二堆叠下方。 第二电极设置在嵌入式电阻式存储单元内靠近第一电极。 第一堆沉积层包括介电层，设置在电介质层上方的高k电介质层和设置在高k电介质层上方的金属层。 第二层沉积层包括与包含在第一堆叠中的高k电介质层同时形成的高k电介质层和设置在高k电介质层上方的金属层。