摘要:
A stacked semiconductor device and a method for fabricating the stacked semiconductor device are disclosed. The stacked semiconductor device includes a first insulating interlayer having an opening that partially exposes a substrate, wherein the substrate includes single crystalline silicon, and a first seed pattern that fills the opening, wherein the first seed pattern has an upper portion disposed over the opening, and the upper portion is tapered away from the substrate. The stacked semiconductor device further includes a second insulating interlayer formed on the first insulating interlayer, wherein a trench that exposes the upper portion of the first seed pattern penetrates the second insulating interlayer, and a first single crystalline silicon structure that fills the trench.
摘要:
In a semiconductor device and method of manufacturing the semiconductor device, a punch-through prevention film pattern and a channel film pattern are formed on an insulation layer. The punch-through prevention pattern and the insulation layer may include nitride and oxide, respectively. The punch-through prevention pattern is located under the channel pattern.
摘要:
In a semiconductor device and method of manufacturing the semiconductor device, a punch-through prevention film pattern and a channel film pattern are formed on an insulation layer. The punch-through prevention pattern and the insulation layer may include nitride and oxide, respectively. The punch-through prevention pattern is located under the channel pattern.
摘要:
A stacked semiconductor device and a method for fabricating the stacked semiconductor device are disclosed. The stacked semiconductor device includes a first insulating interlayer having an opening that partially exposes a substrate, wherein the substrate includes single crystalline silicon, and a first seed pattern that fills the opening, wherein the first seed pattern has an upper portion disposed over the opening, and the upper portion is tapered away from the substrate. The stacked semiconductor device further includes a second insulating interlayer formed on the first insulating interlayer, wherein a trench that exposes the upper portion of the first seed pattern penetrates the second insulating interlayer, and a first single crystalline silicon structure that fills the trench.
摘要:
A stacked semiconductor device and a method for fabricating the stacked semiconductor device are disclosed. The stacked semiconductor device includes a first insulating interlayer having an opening that partially exposes a substrate, wherein the substrate includes single crystalline silicon, and a first seed pattern that fills the opening, wherein the first seed pattern has an upper portion disposed over the opening, and the upper portion is tapered away from the substrate. The stacked semiconductor device further includes a second insulating interlayer formed on the first insulating interlayer, wherein a trench that exposes the upper portion of the first seed pattern penetrates the second insulating interlayer, and a first single crystalline silicon structure that fills the trench.
摘要:
Example embodiments relate to a semiconductor memory device including a channel layer pattern on a substrate, the channel layer pattern having a sidewall and an upper face, a spacer on the sidewall of the channel layer pattern, and a gate electrode covering the sidewall of the channel layer pattern, the spacer and the upper face of the channel layer pattern.
摘要:
A method of fabricating a semiconductor device using a self-aligned metal shunt process is disclosed. The method can include sequentially forming a lower conductive pattern and a sacrificial pattern on a semiconductor substrate. An interlayer dielectric layer is formed to cover the sacrificial pattern. The interlayer dielectric layer is patterned to form a preliminary trench that exposes the top surface of the sacrificial pattern. The exposed sacrificial pattern is removed to form a trench that expose the top surface of the lower conductive pattern. An upper conductive pattern is formed to fill the trench.
摘要:
The present invention provides a TFT array panel having a transmissive region and a reflective region. A transmissive electrode is disposed in the transmissive region. The first reflective electrode connected to the transmissive electrode is disposed on the reflective region. The second reflective electrode separated from the transmissive electrode and the first reflective region is formed in the reflective region. A first conductor is connected to at least one of the transmissive electrode and the first reflective electrode. A second conductor is connected to the second reflective electrode. At least one of the transmissive electrode, the first reflective electrode and the first conductor overlaps at least one of the second reflective electrode and the second conductor.
摘要:
In a display apparatus, a light generating part generates a first light in response to a driving signal, and a first driving part outputs a panel driving signal. A display panel receives the first light from the light generating part and a second light externally provided, and displays an image in response to the panel driving signal. A light sensing part is disposed in the display panel so as to output a sensing signal corresponding a light amount of the second light. A second driving part compares the sensing signal with a predetermined reference value, and outputs a driving signal in accordance with the compared result. Thus, the display apparatus may reduce an electrical power consumed to drive the display apparatus.
摘要:
A light generating part generates a first light based on a first control signal. A first driving part outputs a panel driving signal. A display panel receives the first light or a second light that is provided from an exterior to display an image based on the panel driving signal. A sensing part outputs a sensing signal based on the second light. A second driving part compares a reference voltage range with the sensing signal to output the first control signal. The reference voltage range is determined by a first reference voltage and a second reference voltage. Therefore, the light generating part is turned on/off based on the second light to decrease the power consumption of the light generating part, and an operation of the light generating part is stabilized.