Linear polishing for improving substrate uniformity
    2.
    发明授权
    Linear polishing for improving substrate uniformity 失效
    线性抛光,提高基体均匀性

    公开(公告)号:US06726545B2

    公开(公告)日:2004-04-27

    申请号:US10134821

    申请日:2002-04-26

    IPC分类号: B24B100

    摘要: A linear polishing apparatus for polishing a semiconductor substrate including a novel polishing belt arrangement with at least two polishing belts forming a continuous loop. Each belt having an outside polishing surface and an inside smooth surface. The belts are spaced alongside each other sharing a common axis at each end. The belts are looped around a pair of rollers making up a driver roller at one end and a driven roller at the other end. A platen member interposes each belt and is placed between the pairs of rollers. The platen provides a polishing plane and supporting surface for the polishing belts. The polishing plane includes a plurality of holes communicating with an elongated plenum chamber underlying the plane. The chamber supplies a compressed gas to impart an upward pressure against the polishing belts. The driver rollers are coupled to separate motors to independently drive and control at least said two of the polishing belts.

    摘要翻译: 一种用于抛光包括具有形成连续环的至少两个抛光带的新型抛光带装置的半导体衬底的线性抛光装置。 每个带具有外部抛光表面和内部光滑表面。 皮带沿着彼此间隔开,在每一端共享公共轴线。 皮带环绕一对辊组成一端的驱动辊和另一端的从动辊。 压板构件插入每个带并且放置在成对的辊之间。 压板提供抛光平面和抛光带的支撑表面。 抛光平面包括与平面下方的细长的增压室连通的多个孔。 该室供应压缩气体以向抛光带施加向上的压力。 驱动辊连接到单独的马达以独立地驱动和控制至少所述两个抛光带。

    High K artificial lattices for capacitor applications to use in CU or AL BEOL
    3.
    发明授权
    High K artificial lattices for capacitor applications to use in CU or AL BEOL 有权
    用于电容器应用的高K人造晶格用于CU或AL BEOL

    公开(公告)号:US06830971B2

    公开(公告)日:2004-12-14

    申请号:US10286627

    申请日:2002-11-02

    IPC分类号: H01L218242

    摘要: A process of fabricating high dielectric constant MIM capacitors. The high dielectric constant MIM capacitors are for both RF and analog circuit applications. For the high dielectric constant MIM capacitors, the metal is comprised of copper electrodes in a dual damascene process. The dielectric constant versus the total thickness of super lattices is controlled by the number of artificial layers. Dielectric constants near 900 can be achieved for 250 Angstrom thick super lattices. MBE, molecular beam epitaxy or ALCVD, atomic layer CVD techniques are employed for the layer growth processes.

    摘要翻译: 制造高介电常数MIM电容器的工艺。 高介电常数MIM电容器适用于RF和模拟电路应用。 对于高介电常数MIM电容器,金属由双重镶嵌工艺中的铜电极组成。 超级晶格的介电常数与总厚度的关系由人造层的数量来控制。 接近900的介电常数可以达到250埃厚的超晶格。 MBE,分子束外延或ALCVD,原子层CVD技术用于层生长过程。

    STI scheme to prevent fox recess during pre-CMP HF dip
    4.
    发明授权
    STI scheme to prevent fox recess during pre-CMP HF dip 失效
    STI方案,以防止在前CMP HF浸渍期间的狐狸凹陷

    公开(公告)号:US06673695B1

    公开(公告)日:2004-01-06

    申请号:US10062657

    申请日:2002-02-01

    IPC分类号: H01L2176

    CPC分类号: H01L21/76229 H01L21/76224

    摘要: A new method is provided for the creation of STI regions. STI trenches are created in the surface of a substrate following conventional processing. A layer of STI oxide is deposited and, using an exposure mask that is a reverse mask of the mask that is used to create the STI pattern, impurity implants are performed into the surface of the deposited layer of STI oxide. In view of these processing conditions, the layer of STI oxide overlying the patterned layer of etch stop material is exposed to the impurity implants. This exposure alters the etch characteristics of the deposited layer of STI oxide where this STI oxide overlies the patterned layer of etch stop material. The etch rate of the impurity exposed STI oxide is increased by the impurity implantation, resulting in an etch overlying the patterned etch stop layer that proceeds considerably faster than the etch of the STI oxide that is deposited overlying the created STI trenches. With the significantly faster etch of the STI oxide where this oxide has been exposed to impurity implantation, the STI oxide removal can be equalized between the STI oxide that overlies the patterned etch stop layer and the oxide that has been deposited over the STI trenches.

    摘要翻译: 为创建STI区域提供了一种新方法。 在常规处理之后,在衬底的表面中产生STI沟槽。 沉积一层STI氧化物,并且使用作为用于产生STI图案的掩模的反掩模的曝光掩模,将杂质植入物进行到STI氧化物沉积层的表面。 鉴于这些处理条件,覆盖图案化的蚀刻停止材料层的STI氧化物层暴露于杂质注入。 该曝光改变STI氧化物沉积层的蚀刻特性,其中该STI氧化物覆盖在图案化的蚀刻停止材料层上。 通过杂质注入,杂质暴露的STI氧化物的蚀刻速率增加,导致覆盖图案化的蚀刻停止层的蚀刻显着快于沉积在所创建的STI沟槽上的STI氧化物的蚀刻。 通过对这种氧化物暴露于杂质注入的STI氧化物的显着更快的蚀刻,可以在覆盖图案化蚀刻停止层的STI氧化物和已经沉积在STI沟槽上的氧化物之间均衡STI氧化物去除。

    High K artificial lattices for capacitor applications to use in Cu or Al BEOL
    5.
    发明授权
    High K artificial lattices for capacitor applications to use in Cu or Al BEOL 有权
    用于电容器应用的高K人造晶格用于Cu或Al BEOL

    公开(公告)号:US07095073B2

    公开(公告)日:2006-08-22

    申请号:US10972551

    申请日:2004-10-25

    IPC分类号: H01L29/76

    摘要: An improved and new process of fabricating high dielectric constant MIM capacitors. These high dielectric constant MIM capacitor met all of the stringent requirements needed for both for both RF and analog circuit applications. For the high dielectric constant MIM capacitor, the metal is comprised of copper electrodes in a dual damascene process. The dielectric constant versus the total thickness of super lattices is controlled by the number of layers either 4/4, 2/2, and 1/1 artificial layers. Hence thickness of the film can be easily controlled. Enhancement of dielectric constant is because of interface. Dielectric constants near 900 can be easily achieved for 250 Angstrom thick super lattices. MBE, molecular beam epitaxy or ALCVD, atomic layer CVD techniques is used for this type layer growth process.

    摘要翻译: 一种制造高介电常数MIM电容器的改进和新工艺。 这些高介电常数MIM电容器满足RF和模拟电路应用两者所需的所有严格要求。 对于高介电常数MIM电容器,金属在双镶嵌工艺中由铜电极组成。 超级晶格的介电常数与总体厚度的关系由4/4,2/2和1/1人造层的层数控制。 因此,可以容易地控制膜的厚度。 介电常数的增强是由于界面。 接近900的介电常数可以很容易地达到250埃厚的超晶格。 MBE,分子束外延或ALCVD,原子层CVD技术用于这种类型的层生长过程。

    Multiple step CMP polishing
    6.
    发明授权

    公开(公告)号:US06663472B2

    公开(公告)日:2003-12-16

    申请号:US10062656

    申请日:2002-02-01

    IPC分类号: B24B508

    CPC分类号: B24B37/26 B24B57/02

    摘要: An improved chemical mechanical polishing apparatus for planarizing semiconductor surface materials. The single rotating polishing platen with an attached pad of conventional CMP processes is replaced with two controlled independently driven, concentric and coplanar, polishing platens. The two co-planar polishing platens allows for separate adjustable options to the CMP polishing process. The options are provided by having pads of different material compositions and hardness. Moreover, an annular space is provided between the platens to introduce the usage of two slurry formulations, one to each pad, on the same CMP tool. The annular space between platens forming a drain path for catching and containing slurry waste.

    Method and system for dynamically assigning IP addresses in wireless networks

    公开(公告)号:US07016353B2

    公开(公告)日:2006-03-21

    申请号:US09880530

    申请日:2001-06-13

    IPC分类号: H04L12/28

    摘要: A method is provided for IP-based wireless networks to support dynamic assignment of IP addresses to wireless mobile stations without broadcasting messages over the air and without modifications to standard IP for dynamic IP address assignment. When a mobile station enters a new cell, it sends a request to the base station for a new IP address. At the base station, DHCP proxy servers intercept and process broadcast DHCP messages so they are transmitted only to the address server and are blocked from being sent to the other base stations in the wired IP Network for broadcast to other mobile stations. When the address server creates a server-to-client message with the requested address and places it on the wired IP Network, DHCP proxy servers at the base stations convert the broadcast DHCP messages to unicast messages for transport over the air to only those mobile stations that are currently requesting new IP addresses or verifying their current IP addresses. The conversion is based on information contained in DHCP messages which passed through the base stations.

    High K artificial lattices for capacitor applications to use in Cu or Al BEOL
    8.
    发明申请
    High K artificial lattices for capacitor applications to use in Cu or Al BEOL 有权
    用于电容器应用的高K人造晶格用于Cu或Al BEOL

    公开(公告)号:US20050118780A1

    公开(公告)日:2005-06-02

    申请号:US10972551

    申请日:2004-10-25

    摘要: An improved and new process of fabricating high dielectric constant MIM capacitors. These high dielectric constant MIM capacitor met all of the stringent requirements needed for both for both RF and analog circuit applications. For the high dielectric constant MIM capacitor, the metal is comprised of copper electrodes in a dual damascene process. The dielectric constant versus the total thickness of super lattices is controlled by the number of layers either 4/4, 2/2, and 1/1 artificial layers. Hence thickness of the film can be easily controlled. Enhancement of dielectric constant is because of interface. Dielectric constants near 900 can be easily achieved for 250 Angstrom thick super lattices. MBE, molecular beam epitaxy or ALCVD, atomic layer CVD techniques is used for this type layer growth process

    摘要翻译: 一种制造高介电常数MIM电容器的改进和新工艺。 这些高介电常数MIM电容器满足RF和模拟电路应用两者所需的所有严格要求。 对于高介电常数MIM电容器,金属由双重镶嵌工艺中的铜电极组成。 超级晶格的介电常数与总体厚度的关系由4/4,2/2和1/1人造层的层数控制。 因此,可以容易地控制膜的厚度。 介电常数的增强是由于界面。 接近900的介电常数可以很容易地达到250埃厚的超晶格。 MBE,分子束外延或ALCVD,原子层CVD技术用于这种类型的层生长过程

    Methods and systems for adjusting sectors across coverage cells
    9.
    发明授权
    Methods and systems for adjusting sectors across coverage cells 有权
    调整跨覆盖单元扇区的方法和系统

    公开(公告)号:US06708036B2

    公开(公告)日:2004-03-16

    申请号:US09884649

    申请日:2001-06-19

    IPC分类号: H04Q720

    CPC分类号: H04W16/14 H04W16/06

    摘要: Methods and systems are provided for adjusting sectors across coverage cells using base stations interconnected by a packet network. A plurality of wireless devices monitor the pilot channel signal strength of their respective serving cell. The serving cells then collect measurements from the wireless devices and calculate the boundaries of their respective coverage areas. The serving cells then transmit their calculations to their neighboringing cells. Upon receipt, the neighboring cells use the calculations to adjust the coverage of their sectors.

    摘要翻译: 提供的方法和系统用于使用通过分组网络互连的基站来调整跨覆盖小区的扇区。 多个无线设备监视其各自服务小区的导频信道信号强度。 服务小区然后从无线设备收集测量并计算它们各自覆盖区域的边界。 然后,服务小区将它们的计算发送到它们的相邻小区。 收到后,相邻的小区使用计算来调整其扇区的覆盖范围。

    Pre STI-CMP planarization scheme
    10.
    发明授权
    Pre STI-CMP planarization scheme 有权
    预STI-CMP平坦化方案

    公开(公告)号:US06664190B2

    公开(公告)日:2003-12-16

    申请号:US09951916

    申请日:2001-09-14

    IPC分类号: H01L21311

    CPC分类号: H01L21/76229 H01L21/31053

    摘要: A new method of forming shallow trench isolations using a reverse mask process is described. A polish stop layer is deposited on the surface of a substrate. An etch stop layer is deposited overlying the polish stop layer. A plurality of isolation trenches is etched through the etch stop layer and the polish stop layer into the substrate whereby narrow active areas and wide active areas of the substrate are left between the isolation trenches. An oxide layer is deposited over the etch stop layer and within the isolation trenches. The oxide layer is covered with a mask in the narrow active areas and in the isolation trenches and etched away in the wide active areas stopping at the etch stop layer. Thereafter, the mask is removed and the etch stop layer is polished away to the polish stop layer whereby the oxide layer in the isolation trenches is planarized.

    摘要翻译: 描述了使用反掩模工艺形成浅沟槽隔离的新方法。 抛光停止层沉积在基底的表面上。 沉积在抛光停止层上的蚀刻停止层。 通过蚀刻停止层和抛光停止层将多个隔离沟槽蚀刻到衬底中,由此衬底的有源区域和宽的有源区域留在隔离沟槽之间。 氧化物层沉积在蚀刻停止层上方和隔离沟槽内。 在狭窄的有源区域和隔离沟槽中用掩模覆盖氧化物层,并在停止在蚀刻停止层处的宽有效区域中被蚀刻掉。 此后,去除掩模,并将蚀刻停止层抛光到抛光停止层,由此隔离沟槽中的氧化物层被平坦化。