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公开(公告)号:US20180151533A1
公开(公告)日:2018-05-31
申请号:US15568130
申请日:2016-05-31
发明人: Yutaka YONEDA , Junji FUJINO , Kazuyoshi SHIGE , Yoichi HIRONAKA
IPC分类号: H01L23/00
CPC分类号: H01L24/81 , H01L24/05 , H01L24/11 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/37 , H01L24/40 , H01L24/77 , H01L24/84 , H01L2224/04034 , H01L2224/05557 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/0568 , H01L2224/291 , H01L2224/32227 , H01L2224/37147 , H01L2224/40227 , H01L2224/40996 , H01L2224/73263 , H01L2224/77353 , H01L2224/81191 , H01L2224/81205 , H01L2224/83205 , H01L2224/84205 , H01L2224/84345 , H01L2224/84365 , H01L2224/84385 , H01L2224/84395 , H01L2224/84424 , H01L2224/92142 , H01L2224/84 , H01L2924/014 , H01L2924/00014 , H01L2924/00012
摘要: An object of the invention is to provide: a manufacturing method for a highly reliable power semiconductor device which prevents breakage of an conductor pattern and an insulating layer, and has bonding strength higher than that by the conventional bonding between the electrode terminal and the conductor pattern; and that power semiconductor device. Breakage of the conductor pattern and the insulating layer is prevented due to inclusion of: a step of laying an electrode terminal on a protrusion provided on a conductor pattern placed on a circuit-face side of a ceramic board so that a center portion of a surface to be bonded of the electrode terminal makes contact with a head portion of the protrusion; a step of pressurizing and ultrasonically vibrating a surface opposite to the surface to be bonded, of the electrode terminal, using an ultrasonic horn, to thereby bond the electrode terminal to the conductor pattern.