公开(公告)号：US20180151533A1

公开(公告)日：2018-05-31

申请号：US15568130

申请日：2016-05-31

申请人： Mitsubishi Electric Corporation

发明人： Yutaka YONEDA ,  Junji FUJINO ,  Kazuyoshi SHIGE ,  Yoichi HIRONAKA

IPC分类号： H01L23/00

CPC分类号： H01L24/81 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/77 ,  H01L24/84 ,  H01L2224/04034 ,  H01L2224/05557 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/0568 ,  H01L2224/291 ,  H01L2224/32227 ,  H01L2224/37147 ,  H01L2224/40227 ,  H01L2224/40996 ,  H01L2224/73263 ,  H01L2224/77353 ,  H01L2224/81191 ,  H01L2224/81205 ,  H01L2224/83205 ,  H01L2224/84205 ,  H01L2224/84345 ,  H01L2224/84365 ,  H01L2224/84385 ,  H01L2224/84395 ,  H01L2224/84424 ,  H01L2224/92142 ,  H01L2224/84 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00012

摘要： An object of the invention is to provide: a manufacturing method for a highly reliable power semiconductor device which prevents breakage of an conductor pattern and an insulating layer, and has bonding strength higher than that by the conventional bonding between the electrode terminal and the conductor pattern; and that power semiconductor device. Breakage of the conductor pattern and the insulating layer is prevented due to inclusion of: a step of laying an electrode terminal on a protrusion provided on a conductor pattern placed on a circuit-face side of a ceramic board so that a center portion of a surface to be bonded of the electrode terminal makes contact with a head portion of the protrusion; a step of pressurizing and ultrasonically vibrating a surface opposite to the surface to be bonded, of the electrode terminal, using an ultrasonic horn, to thereby bond the electrode terminal to the conductor pattern.

公开(公告)号：US09402311B2

公开(公告)日：2016-07-26

申请号：US14435686

申请日：2013-10-25

申请人： NSK Ltd.

发明人： Takashi Sunaga ,  Noboru Kaneko ,  Osamu Miyoshi

IPC分类号： H05K7/00 ,  H05K1/09 ,  H01L25/07 ,  H01L25/18 ,  H01L23/373 ,  H01L23/498 ,  H01L23/495 ,  H05K1/02 ,  H05K1/05 ,  H05K1/18 ,  H01L23/00

CPC分类号： H05K1/09 ,  H01L23/142 ,  H01L23/3735 ,  H01L23/49582 ,  H01L23/49811 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/35 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L24/92 ,  H01L25/07 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/05553 ,  H01L2224/0603 ,  H01L2224/291 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/32227 ,  H01L2224/32238 ,  H01L2224/33181 ,  H01L2224/352 ,  H01L2224/35847 ,  H01L2224/3701 ,  H01L2224/37013 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40225 ,  H01L2224/40227 ,  H01L2224/40475 ,  H01L2224/40499 ,  H01L2224/4103 ,  H01L2224/4112 ,  H01L2224/48 ,  H01L2224/73263 ,  H01L2224/77272 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/8321 ,  H01L2224/83424 ,  H01L2224/83447 ,  H01L2224/83801 ,  H01L2224/83815 ,  H01L2224/84424 ,  H01L2224/84447 ,  H01L2224/84801 ,  H01L2224/84815 ,  H01L2224/85 ,  H01L2224/9221 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/351 ,  H05K1/0271 ,  H05K1/05 ,  H05K1/181 ,  H05K3/3431 ,  H05K2201/10166 ,  H05K2201/1028 ,  H05K2201/1031 ,  H05K2201/10409 ,  H05K2201/10946 ,  H05K2201/10962 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00015 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2224/84 ,  H01L2224/33 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor module includes a copper connector jointing an electrode formed on a top surface of a bare-chip transistor and a wiring pattern out of plural wiring patterns via a solder. The copper connector includes an electrode jointing portion jointed to the electrode of the bare-chip transistor and a substrate jointing portion arranged to face the electrode-jointing portion and jointed to the wiring pattern. The width W1 of the electrode jointing portion in a direction perpendicular to one direction is smaller than the width W2 of the substrate jointing portion in the direction perpendicular to the one direction.

摘要翻译： 半导体模块包括通过焊料将形成在裸芯片晶体管的顶表面上的电极和多个布线图案中的布线图案连接的铜连接器。 铜连接器包括连接到裸芯片晶体管的电极的电极接合部分和布置成面对电极接合部分并且接合到布线图案的基板接合部分。 电极接合部在与一个方向垂直的方向上的宽度W1小于基板接合部在垂直于该一个方向的方向上的宽度W2。

公开(公告)号：US20160181221A1

公开(公告)日：2016-06-23

申请号：US14910355

申请日：2014-10-06

申请人： NSK LTD.

发明人： Takashi SUNAGA ,  Noboru KANEKO ,  Osamu MIYOSHI ,  Ryoichi SUZUKI

IPC分类号： H01L23/00 ,  H01L23/498 ,  H01L23/492 ,  H01L29/78 ,  H01L29/739

CPC分类号： H01L24/41 ,  H01L23/3735 ,  H01L23/492 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/35 ,  H01L24/37 ,  H01L24/40 ,  H01L24/83 ,  H01L24/84 ,  H01L24/92 ,  H01L25/07 ,  H01L25/072 ,  H01L25/18 ,  H01L29/7393 ,  H01L29/78 ,  H01L2224/05553 ,  H01L2224/0603 ,  H01L2224/2732 ,  H01L2224/29101 ,  H01L2224/32227 ,  H01L2224/32238 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/352 ,  H01L2224/35847 ,  H01L2224/3701 ,  H01L2224/37011 ,  H01L2224/37013 ,  H01L2224/37124 ,  H01L2224/37139 ,  H01L2224/37144 ,  H01L2224/37147 ,  H01L2224/37611 ,  H01L2224/4001 ,  H01L2224/40095 ,  H01L2224/40227 ,  H01L2224/40475 ,  H01L2224/40499 ,  H01L2224/4099 ,  H01L2224/4112 ,  H01L2224/73263 ,  H01L2224/83192 ,  H01L2224/8321 ,  H01L2224/83424 ,  H01L2224/83447 ,  H01L2224/83801 ,  H01L2224/83815 ,  H01L2224/84138 ,  H01L2224/8421 ,  H01L2224/84424 ,  H01L2224/84447 ,  H01L2224/84801 ,  H01L2224/84815 ,  H01L2224/9221 ,  H01L2924/00015 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15724 ,  H01L2924/19105 ,  H01L2924/35121 ,  H01L2924/365 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/291 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/48 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/84 ,  H01L2924/01029 ,  H01L2924/013 ,  H01L2924/00013

摘要： To provide a semiconductor module that has high reliability of electric connection by a solder and is inexpensive. A joint surface of an electrode jointing portion that is opposed to a surface to be jointed of a gate electrode of a bare-chip FET and a joint surface of a substrate jointing portion that is opposed to a surface to be jointed of another wiring pattern include an outgas releasing mechanism that makes outgas generated from a molten solder during solder jointing of a metal plate connector be released from solders interposed between the joint surfaces and the surfaces to be jointed.

摘要翻译： 提供通过焊料具有高可靠性的电连接并且便宜的半导体模块。 电极接合部的与裸芯片FET的栅电极接合的面相对的基板接合部的接合面与与其他布线图案的被接合面相对的基板接合部的接合面包含 在金属板连接器的焊接期间使从熔融焊料产生的废气从放置在接合面和待接合面之间的焊料脱离的脱气释放机构。

公开(公告)号：US20150270199A1

公开(公告)日：2015-09-24

申请号：US14435690

申请日：2013-10-25

申请人： NSK LTD.

发明人： Takashi Sunaga ,  Noboru Kaneko ,  Osamu Miyoshi

IPC分类号： H01L23/495

CPC分类号： H01L23/49551 ,  B62D5/0406 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/35 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L24/92 ,  H01L25/07 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/29101 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/352 ,  H01L2224/3701 ,  H01L2224/37011 ,  H01L2224/37013 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40106 ,  H01L2224/40159 ,  H01L2224/40225 ,  H01L2224/4103 ,  H01L2224/41175 ,  H01L2224/73263 ,  H01L2224/77272 ,  H01L2224/83192 ,  H01L2224/8321 ,  H01L2224/83424 ,  H01L2224/83447 ,  H01L2224/83801 ,  H01L2224/83815 ,  H01L2224/84095 ,  H01L2224/84424 ,  H01L2224/84447 ,  H01L2224/84801 ,  H01L2224/84815 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2924/014 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/15724 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/1305 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A semiconductor module is provided for shortening a manufacturing tact time, reducing manufacturing costs and for ensuring reliability of a bonding portion. The semiconductor module includes a substrate formed of a metal, an insulating layer formed on the substrate, a plurality of wiring patterns formed on the insulating layer, a bare-chip transistor mounted on one wiring pattern via a solder, and copper connectors that connect electrodes formed on the bear-chip transistor and other wiring patterns via a solder. The copper connectors have a bridge shape, have a width-reduced portion formed in the vicinity of the bonding face to the electrodes, and have a stress-reducing portion formed on the bonding face bonded to the electrode.

摘要翻译： 提供了一种半导体模块，用于缩短制造节拍时间，降低制造成本并确保结合部的可靠性。 半导体模块包括由金属形成的基板，形成在基板上的绝缘层，形成在绝缘层上的多个布线图案，通过焊料安装在一个布线图案上的裸芯片晶体管和连接电极的铜连接器 通过焊料形成在承载芯片晶体管和其它布线图案上。 铜连接器具有桥接形状，在与电极的接合面附近形成有宽度减小部，并且在与电极接合的接合面上形成有应力减小部。

公开(公告)号：US09911679B2

公开(公告)日：2018-03-06

申请号：US15425614

申请日：2017-02-06

申请人： Infineon Techonologies Americas Corp.

发明人： Eung San Cho

IPC分类号： H01L23/367 ,  H05K1/18 ,  H01L25/18 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01F27/24 ,  H01F1/03

CPC分类号： H01L23/3675 ,  H01F1/0306 ,  H01F27/24 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/5383 ,  H01L23/645 ,  H01L24/31 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/2919 ,  H01L2224/32013 ,  H01L2224/32245 ,  H01L2224/32265 ,  H01L2224/37124 ,  H01L2224/37144 ,  H01L2224/37147 ,  H01L2224/40245 ,  H01L2224/41173 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48108 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/49173 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83424 ,  H01L2224/83447 ,  H01L2224/84424 ,  H01L2224/84447 ,  H01L2224/84801 ,  H01L2224/8484 ,  H01L2224/8485 ,  H01L2224/85424 ,  H01L2224/85447 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/13055 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/14252 ,  H01L2924/1426 ,  H01L2924/1427 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/19011 ,  H01L2924/19042 ,  H01L2924/19102 ,  H05K1/0209 ,  H05K1/165 ,  H05K1/181 ,  H05K1/184 ,  H05K1/185 ,  H05K2201/1003 ,  H05K2201/10166 ,  H01L2924/00014

摘要： A semiconductor package includes a semiconductor die comprising a control transistor and a sync transistor, an integrated output inductor comprising a winding around a core, and coupled to the semiconductor die. The winding comprises a plurality of conductive clips situated above a printed circuit board (PCB) and connected to a plurality of conductive segments in the PCB. The control transistor and the sync transistor are configured as a half-bridge. The integrated output inductor is coupled to a switched node of the half-bridge. At least one of the plurality of conductive clips includes a partially etched portion and a non-etched portion. The semiconductor die is attached to the integrated output inductor by a die attach material. The semiconductor die and the integrated output inductor are encapsulated in a molding compound.

公开(公告)号：US09620475B2

公开(公告)日：2017-04-11

申请号：US14546854

申请日：2014-11-18

申请人： Infineon Technologies Americas Corp.

发明人： Eung San Cho

IPC分类号： H01L29/15 ,  H01L23/00 ,  H01L23/433 ,  H01L23/495 ,  H01L23/31

CPC分类号： H01L24/73 ,  H01L23/3121 ,  H01L23/4334 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/84 ,  H01L24/85 ,  H01L24/92 ,  H01L2224/2732 ,  H01L2224/27334 ,  H01L2224/27436 ,  H01L2224/291 ,  H01L2224/2929 ,  H01L2224/29294 ,  H01L2224/29295 ,  H01L2224/293 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/37124 ,  H01L2224/37144 ,  H01L2224/37147 ,  H01L2224/40245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48245 ,  H01L2224/73213 ,  H01L2224/73215 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/83191 ,  H01L2224/83424 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2224/84424 ,  H01L2224/84444 ,  H01L2224/84447 ,  H01L2224/84801 ,  H01L2224/8484 ,  H01L2224/8485 ,  H01L2224/85424 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/92 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/27 ,  H01L2924/00012

摘要： In one implementation, a method of fabricating a power semiconductor package is disclosed. The method includes providing a conductive carrier array including a plurality of power modules held together with connecting bars, where each of the plurality of power modules includes a control transistor, a sync transistor, and a driver IC. The method further includes overlying on the conductive carrier array a heat spreader array including a plurality of power electrode heat spreaders such that each of the plurality of power electrode heat spreaders couples a drain of the sync transistor to a source of the control transistor in each power module.

公开(公告)号：US20150162303A1

公开(公告)日：2015-06-11

申请号：US14546854

申请日：2014-11-18

申请人： International Rectifier Corporation

发明人： Eung San Cho

IPC分类号： H01L23/00 ,  H01L27/06 ,  H01L23/34 ,  H01L27/088

CPC分类号： H01L24/73 ,  H01L23/3121 ,  H01L23/4334 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/84 ,  H01L24/85 ,  H01L24/92 ,  H01L2224/2732 ,  H01L2224/27334 ,  H01L2224/27436 ,  H01L2224/291 ,  H01L2224/2929 ,  H01L2224/29294 ,  H01L2224/29295 ,  H01L2224/293 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/37124 ,  H01L2224/37144 ,  H01L2224/37147 ,  H01L2224/40245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48245 ,  H01L2224/73213 ,  H01L2224/73215 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/83191 ,  H01L2224/83424 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2224/84424 ,  H01L2224/84444 ,  H01L2224/84447 ,  H01L2224/84801 ,  H01L2224/8484 ,  H01L2224/8485 ,  H01L2224/85424 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/92 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/27 ,  H01L2924/00012

摘要： In one implementation, a method of fabricating a power semiconductor package is disclosed. The method includes providing a conductive carrier array including a plurality of power modules held together with connecting bars, where each of the plurality of power modules includes a control transistor, a sync transistor, and a driver IC. The method further includes overlying on the conductive carrier array a heat spreader array including a plurality of power electrode heat spreaders such that each of the plurality of power electrode heat spreaders couples a drain of the sync transistor to a source of the control transistor in each power module.

摘要翻译： 在一个实施方式中，公开了一种制造功率半导体封装的方法。 该方法包括提供包括与连接条保持在一起的多个功率模块的导电载体阵列，其中多个功率模块中的每一个包括控制晶体管，同步晶体管和驱动器IC。 该方法还包括在导电载体阵列上覆盖散热器阵列，散热器阵列包括多个功率电极散热器，使得多个功率电极散热器中的每一个在每个功率中将同步晶体管的漏极耦合到控制晶体管的源极 模块。

公开(公告)号：US20150076570A1

公开(公告)日：2015-03-19

申请号：US14127187

申请日：2013-05-27

申请人： NSK LTD.

发明人： Takashi Sunaga ,  Noboru Kaneko ,  Osamu Miyoshi

IPC分类号： H01L23/00 ,  H01L29/78

CPC分类号： H01L24/43 ,  H01L23/3735 ,  H01L23/49811 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/35 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/75 ,  H01L24/77 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L24/92 ,  H01L25/07 ,  H01L25/072 ,  H01L25/18 ,  H01L29/78 ,  H01L2224/05553 ,  H01L2224/0603 ,  H01L2224/291 ,  H01L2224/29101 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/32227 ,  H01L2224/32238 ,  H01L2224/33181 ,  H01L2224/352 ,  H01L2224/35847 ,  H01L2224/3701 ,  H01L2224/37011 ,  H01L2224/37013 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40227 ,  H01L2224/40475 ,  H01L2224/40499 ,  H01L2224/4103 ,  H01L2224/4112 ,  H01L2224/41175 ,  H01L2224/43848 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48472 ,  H01L2224/494 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/75272 ,  H01L2224/77272 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/8321 ,  H01L2224/83424 ,  H01L2224/83447 ,  H01L2224/83801 ,  H01L2224/83815 ,  H01L2224/84424 ,  H01L2224/84447 ,  H01L2224/84801 ,  H01L2224/84815 ,  H01L2224/85 ,  H01L2224/85815 ,  H01L2224/9221 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15724 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/3701 ,  H05K1/181 ,  H05K2201/10166 ,  H05K2201/1031 ,  H05K2201/10409 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/83 ,  H01L2224/84 ,  H01L2224/33 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/48227

摘要： There is provided a semiconductor module and a method for manufacturing the same which make it possible to joint the electrode of the bare-chip transistor and the wiring pattern on the substrate by solder mounting operation, in the same process of solder mounting operation for mounting the bare-chip transistor or other surface mounting devices on the wiring patterns on the substrate. A semiconductor module includes: a plurality of wiring patterns formed on an insulating layer; a bare-chip transistor mounted on one wiring pattern out of the plurality of wiring patterns via a solder; and a copper connector constituted of a copper plate for jointing an electrode formed on a top surface of the bare-chip transistor and another wiring pattern out of the plurality of wiring patterns via a solder.

摘要翻译： 提供了一种半导体模块及其制造方法，其可以通过焊接安装操作将裸芯片晶体管的电极和布线图案与基板上的布线图案相连接，在相同的焊接安装操作过程中， 裸芯片晶体管或其他表面安装器件在基板上的布线图案上。 半导体模块包括：形成在绝缘层上的多个布线图案; 通过焊料在多个布线图案中安装在一个布线图案上的裸芯片晶体管; 以及铜连接器，其由用于通过焊料将形成在裸芯片晶体管的顶表面上的电极和多个布线图案中的另一布线图案连接的铜板构成。

公开(公告)号：US09565768B2

公开(公告)日：2017-02-07

申请号：US15013719

申请日：2016-02-02

申请人： Infineon Technologies Americas Corp.

发明人： Eung San Cho

IPC分类号： H05K1/18 ,  H01L23/64 ,  H01L23/538 ,  H05K1/16 ,  H01L23/00 ,  H01L23/13

CPC分类号： H01L23/3675 ,  H01F1/0306 ,  H01F27/24 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/5383 ,  H01L23/645 ,  H01L24/31 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/2919 ,  H01L2224/32013 ,  H01L2224/32245 ,  H01L2224/32265 ,  H01L2224/37124 ,  H01L2224/37144 ,  H01L2224/37147 ,  H01L2224/40245 ,  H01L2224/41173 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48108 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/49173 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83424 ,  H01L2224/83447 ,  H01L2224/84424 ,  H01L2224/84447 ,  H01L2224/84801 ,  H01L2224/8484 ,  H01L2224/8485 ,  H01L2224/85424 ,  H01L2224/85447 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/13055 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/14252 ,  H01L2924/1426 ,  H01L2924/1427 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/19011 ,  H01L2924/19042 ,  H01L2924/19102 ,  H05K1/0209 ,  H05K1/165 ,  H05K1/181 ,  H05K1/184 ,  H05K1/185 ,  H05K2201/1003 ,  H05K2201/10166 ,  H01L2924/00014

摘要： A semiconductor package includes a semiconductor die comprising a control transistor and a sync transistor, an integrated output inductor comprising a winding 1 around a core, and coupled to the semiconductor die. The winding comprises a plurality of conductive clips situated above a printed circuit board (PCB) and connected to a plurality of conductive segments in the PCB. The control transistor and the sync transistor are configured as a half-bridge. The integrated output inductor is coupled to a switched node of the half-bridge. At least one of the plurality of conductive clips includes a partially etched portion and a non-etched portion. The semiconductor die is attached to the integrated output inductor by a die attach material. The semiconductor die and the integrated output inductor are encapsulated in a molding compound.

摘要翻译： 半导体封装包括包括控制晶体管和同步晶体管的半导体管芯，集成输出电感器，其包括围绕芯的绕组1，并且耦合到半导体管芯。 绕组包括位于印刷电路板（PCB）上方并连接到PCB中的多个导电段的多个导电夹。 控制晶体管和同步晶体管被配置为半桥。 集成输出电感器耦合到半桥的开关节点。 多个导电夹中的至少一个包括部分蚀刻部分和非蚀刻部分。 半导体管芯通过管芯附着材料附接到集成输出电感器。 半导体管芯和集成输出电感器被封装在模塑料中。

公开(公告)号：US20160286655A1

公开(公告)日：2016-09-29

申请号：US15013719

申请日：2016-02-02

申请人： Infineon Technologies Americas Corp.

发明人： Eung San Cho

IPC分类号： H05K1/18

CPC分类号： H01L23/3675 ,  H01F1/0306 ,  H01F27/24 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/5383 ,  H01L23/645 ,  H01L24/31 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/2919 ,  H01L2224/32013 ,  H01L2224/32245 ,  H01L2224/32265 ,  H01L2224/37124 ,  H01L2224/37144 ,  H01L2224/37147 ,  H01L2224/40245 ,  H01L2224/41173 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48108 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/49173 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83424 ,  H01L2224/83447 ,  H01L2224/84424 ,  H01L2224/84447 ,  H01L2224/84801 ,  H01L2224/8484 ,  H01L2224/8485 ,  H01L2224/85424 ,  H01L2224/85447 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/13055 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/14252 ,  H01L2924/1426 ,  H01L2924/1427 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/19011 ,  H01L2924/19042 ,  H01L2924/19102 ,  H05K1/0209 ,  H05K1/165 ,  H05K1/181 ,  H05K1/184 ,  H05K1/185 ,  H05K2201/1003 ,  H05K2201/10166 ,  H01L2924/00014

摘要： A semiconductor package includes a semiconductor die comprising a control transistor and a sync transistor, an integrated output inductor comprising a winding 1 around a core, and coupled to the semiconductor die. The winding comprises a plurality of conductive clips situated above a printed circuit board (PCB) and connected to a plurality of conductive segments in the PCB. The control transistor and the sync transistor are configured as a half-bridge. The integrated output inductor is coupled to a switched node of the half-bridge. At least one of the plurality of conductive clips includes a partially etched portion and a non-etched portion. The semiconductor die is attached to the integrated output inductor by a die attach material. The semiconductor die and the integrated output inductor are encapsulated in a molding compound.

摘要翻译： 半导体封装包括包括控制晶体管和同步晶体管的半导体管芯，集成输出电感器，其包括围绕芯的绕组1，并且耦合到半导体管芯。 绕组包括位于印刷电路板（PCB）上方并连接到PCB中的多个导电段的多个导电夹。 控制晶体管和同步晶体管被配置为半桥。 集成输出电感器耦合到半桥的开关节点。 多个导电夹中的至少一个包括部分蚀刻部分和非蚀刻部分。 半导体管芯通过管芯附着材料附接到集成输出电感器。 半导体管芯和集成输出电感器被封装在模塑料中。