公开(公告)号：US09614699B2

公开(公告)日：2017-04-04

申请号：US15066611

申请日：2016-03-10

申请人： KING FAHD UNIVERSITY OF PETROLEUM AND MINERALS

发明人： Naveed Iqbal ,  Azzedine Zerguine

IPC分类号： H04L25/03 ,  H03H17/02 ,  H04L27/01 ,  G06F7/501 ,  G06F17/16 ,  H04B7/0413

CPC分类号： H04L25/03057 ,  G06F7/501 ,  G06F17/16 ,  G06N3/006 ,  H03H17/0277 ,  H04B7/0413 ,  H04B7/0854 ,  H04L25/03108 ,  H04L2025/037 ,  H04L2025/03713 ,  H04L2025/03732

摘要： Methods and apparatuses are provided for channel equalization in a communication system. The method includes initializing, using processing circuitry, filter coefficients of an adaptive decision feedback equalizer randomly in a predetermined search space. Further, the method includes updating, using the processing circuitry, the filter coefficients. The filter coefficients are updated using a least mean square recursion when the filter coefficients are stagnant. The filter coefficients are updated using a particle swarm optimization procedure when the filter coefficients are not stagnant. Further, the updating step is repeated until a predetermined stopping criteria is met. Further, the method includes, filtering, using the processing circuitry, a received signal using the filter coefficients.

公开(公告)号：US07161979B2

公开(公告)日：2007-01-09

申请号：US09863487

申请日：2001-05-23

申请人： Jens Wildhagen

发明人： Jens Wildhagen

IPC分类号： H04L7/30 ,  H04L27/20

CPC分类号： H03H17/0292 ,  H03H17/0277 ,  H03H2218/04

摘要： A polyphase filter of order x·N that builds N allpass filters of order x·N has a structure of an allpass filter of order x comprising delay elements with a delay of 1 and at least one multiplier, wherein all delay elements with a delay of 1 are replaced by delay elements with a delay of N and the sampling rate of fS′=fs/N with fs being the sampling rate of the input signal. Preferably the multiplier included in the structure of the allpass filter of order x comprises N-time multiplex multiplication coefficients that are used in a predetermined order.

摘要翻译： 构建阶数为xN的N个全通滤波器的阶数xN的多相滤波器具有包括延迟为1的延迟元件和至少一个乘法器的阶数x的全通滤波器的结构，其中具有延迟1的所有延迟元件被替换为 具有延迟N的延迟元件和fS'= fs / N的采样率，fs是输入信号的采样率。 优选地，包括在阶数x的全通滤波器的结构中的乘法器包括以预定顺序使用的N次多路复用乘法系数。

公开(公告)号：US4782324A

公开(公告)日：1988-11-01

申请号：US47203

申请日：1987-05-06

申请人： Marcos A. Underwood

发明人： Marcos A. Underwood

IPC分类号： H03M1/66 ,  G06J1/00 ,  H03H17/00 ,  H03H17/02 ,  H03H17/04 ,  H03M1/00 ,  H03M1/12

CPC分类号： H03H17/0252 ,  G06J1/00 ,  H03H17/0277 ,  H03H17/0444 ,  H03M1/661

摘要： A method and apparatus for converting a digital signal into a band-limited analog signal with variable bandwidths, a high level of performance, high spurious frequency rejection, and simple implementation, employing polyphase interpolating digital filters, a fixed-sampling rate digital to analog converter, and a fixed-frequency analog low-pass filter.

摘要翻译： 一种用于将数字信号转换成具有可变带宽，高性能，高寄生频率抑制和简单实现的带限模拟信号的方法和装置，其使用多相内插数字滤波器，固定采样率数模转换器 ，和固定频率模拟低通滤波器。

公开(公告)号：US09037625B2

公开(公告)日：2015-05-19

申请号：US13441501

申请日：2012-04-06

申请人： Mark Alan Sturza ,  Donald Leimer

发明人： Mark Alan Sturza ,  Donald Leimer

IPC分类号： H03H17/02 ,  H03H17/06

CPC分类号： H03H17/0279 ,  H03H17/0277 ,  H03H17/0664

摘要： A method is provided for decimating a digital signal by a factor of M and matching it to a desired channel bandwidth. The method applies the digital signal input samples to a (M−1) stage tapped delay line, downsamples the input samples and the output samples of each tapped delay line stage by a factor of M, and applies each of the M downsampled sample value streams to M allpass IIR filters, respectively. The M allpass IIR filtered sample streams are then summed and scaled by a factor of 1/M. The result can then be filtered by a digital channel filter.

摘要翻译： 提供了一种用于将数字信号抽取为因子M并将其与所需信道带宽匹配的方法。 该方法将数字信号输入采样应用于（M-1）级抽头延迟线，将每个抽头延迟线级的输入采样和输出采样下降一个因子M，并将每个M下采样的采样值流 到M allpass IIR滤波器。 然后将M allpass IIR滤波后的样本流相加并按比例乘以1 / M。 然后可以通过数字通道滤波器对结果进行滤波。

公开(公告)号：US08176107B2

公开(公告)日：2012-05-08

申请号：US11611542

申请日：2006-12-15

申请人： Mark Alan Sturza ,  Donald Leimer

发明人： Mark Alan Sturza ,  Donald Leimer

IPC分类号： G06F17/17

CPC分类号： H03H17/0279 ,  H03H17/0277 ,  H03H17/0664

摘要： A method is provided for decimating a digital signal by a factor of M and matching it to a desired channel bandwidth. The method applies the digital signal input samples to a (M-1) stage tapped delay line, downsamples the input samples and the output samples of each tapped delay line stage by a factor of M, and applies each of the M downsampled sample value streams to M allpass IIR filters, respectively. The M allpass IIR filtered sample streams are then summed and scaled by a factor of 1/M. The result can then be filtered by a digital channel filter.

摘要翻译： 提供了一种用于将数字信号抽取为因子M并将其与所需信道带宽匹配的方法。 该方法将数字信号输入采样应用于（M-1）级抽头延迟线，将每个抽头延迟线级的输入采样和输出采样下降一个因子M，并将每个M下采样的采样值流 到M allpass IIR滤波器。 然后将M allpass IIR滤波后的样本流相加并按比例乘以1 / M。 然后可以通过数字通道滤波器对结果进行滤波。

公开(公告)号：US07498957B2

公开(公告)日：2009-03-03

申请号：US11631401

申请日：2005-06-23

申请人： Frans Victor Felix De Buys

发明人： Frans Victor Felix De Buys

IPC分类号： H03M7/00

CPC分类号： H03H17/0219 ,  H03H17/0275 ,  H03H17/0277 ,  H03H17/0628 ,  H03H17/0685

摘要： A method and apparatus are described for asynchronous sample rate conversion, in particular those which use an interpolating filter, especially a polyphase interpolating filter (FB4). The input and output signals have jitter but the polyphase branch signals have no or reduced jitter due to the operation of a jitter removing means such as a phase locked loop. The jitter is reduced only in the polyphase branch signals. Various methods are described for reducing the jitter.

摘要翻译： 描述了用于异步采样率转换的方法和装置，特别是使用内插滤波器，尤其是多相内插滤波器（FB4）的方法和装置。 输入和输出信号具有抖动，但是由于诸如锁相环之类的抖动消除装置的操作，多相分支信号没有或减少的抖动。 抖动仅在多相分支信号中降低。 描述了减少抖动的各种方法。

公开(公告)号：US20080043889A1

公开(公告)日：2008-02-21

申请号：US11465605

申请日：2006-08-18

申请人： Andreas Menkhoff

发明人： Andreas Menkhoff

IPC分类号： H04B1/10

CPC分类号： H03H17/0277 ,  H03H17/0275 ,  H03H17/0276

摘要： The structure of a digital filter is provided through exponentiation of a polyphase digital filter. This exponentiation may be accomplished by determining an expression for the polyphase digital filter in terms of its polyphase components, and raising the expression for the polyphase digital filter to a power. The polyphase components are then arranged in a structure based on this exponentiated expression.

摘要翻译： 通过多相数字滤波器的取幂来提供数字滤波器的结构。 该取幂可以通过根据多相数据分量确定多相数字滤波器的表达式，并将多相数字滤波器的表达式提高到功率来实现。 然后将多相分量以基于该取幂表达式的结构排列。

公开(公告)号：US20170048088A1

公开(公告)日：2017-02-16

申请号：US15066611

申请日：2016-03-10

申请人： KING FAHD UNIVERSITY OF PETROLEUM AND MINERALS

发明人： Naveed IQBAL ,  Azzedine Zerguine

IPC分类号： H04L25/03 ,  H04B7/04 ,  G06F17/16 ,  H03H17/02 ,  G06F7/501

CPC分类号： H04L25/03057 ,  G06F7/501 ,  G06F17/16 ,  G06N3/006 ,  H03H17/0277 ,  H04B7/0413 ,  H04B7/0854 ,  H04L25/03108 ,  H04L2025/037 ,  H04L2025/03713 ,  H04L2025/03732

摘要： Methods and apparatuses are provided for channel equalization in a communication system. The method includes initializing, using processing circuitry, filter coefficients of an adaptive decision feedback equalizer randomly in a predetermined search space. Further, the method includes updating, using the processing circuitry, the filter coefficients. The filter coefficients are updated using a least mean square recursion when the filter coefficients are stagnant. The filter coefficients are updated using a particle swarm optimization procedure when the filter coefficients are not stagnant. Further, the updating step is repeated until a predetermined stopping criteria is met. Further, the method includes, filtering, using the processing circuitry, a received signal using the filter coefficients.

摘要翻译： 在通信系统中提供了用于信道均衡的方法和装置。 该方法包括在预定的搜索空间中随机地使用处理电路初始化自适应判决反馈均衡器的滤波器系数。 此外，该方法包括使用处理电路来更新滤波器系数。 当滤波器系数停滞时，使用最小均方递归更新滤波器系数。 当滤波器系数不停滞时，使用粒子群优化程序来更新滤波器系数。 此外，重复更新步骤，直到满足预定的停止标准。 此外，该方法包括使用处理电路对使用滤波器系数的接收信号进行滤波。

公开(公告)号：US08725785B1

公开(公告)日：2014-05-13

申请号：US12117555

申请日：2008-05-08

申请人： Osama S. Haddadin ,  Brad T. Hansen ,  Ryan Hinton

发明人： Osama S. Haddadin ,  Brad T. Hansen ,  Ryan Hinton

IPC分类号： G06F17/10

CPC分类号： H03H17/04 ,  H03H17/0275 ,  H03H17/0277 ,  H03H2218/06

摘要： A technique for performing parallel-input parallel-output infinite impulse response (IIR) filtering uses two parallel-input-parallel-output finite impulse response (FIR) filters. One FIR filter is used as a feed-forward filter and one FIR filter is used as a feed-back filter. The feed-back filter is coupled to delays and summers to allow the filter operations to be performed in parallel.

摘要翻译： 一种执行并行输入并行输出无限脉冲响应（IIR）滤波的技术使用两个并行输入并行输出有限脉冲响应（FIR）滤波器。 一个FIR滤波器用作前馈滤波器，一个FIR滤波器用作反馈滤波器。 反馈滤波器耦合到延迟和加法器以允许并行执行滤波器操作。

公开(公告)号：US08626809B2

公开(公告)日：2014-01-07

申请号：US12711959

申请日：2010-02-24

申请人： Jun-Seok Yang ,  Won-Cheol Lee ,  Hyung-Min Jang

发明人： Jun-Seok Yang ,  Won-Cheol Lee ,  Hyung-Min Jang

IPC分类号： G06F17/17 ,  G10L13/00

CPC分类号： H03H17/0416 ,  H03H17/0277 ,  H03H21/0012 ,  H03H2017/0222 ,  H03H2017/0477 ,  H03H2021/0089 ,  H04B7/155

摘要： A method and an apparatus for digital up-down conversion using an Infinite Impulse Response (IIR) filter are provided. The method for digital up-down conversion for frequency conversion in a mobile communication system using plural frequency converts, includes IIR-filtering, by a magnitude response IIR filter having the same magnitude response as in Finite Impulse Response (FIR) filtering, an input signal and a stable filter coefficient calculated according to a Levinson polynomial; and receiving, by the magnitude response IIR filter, the IIR filtered signal, and performing IIR filtering by a phase compensation IIR filter having a filter coefficient compensating for a non-linear phase to a linear phase.

摘要翻译： 提供了一种使用无限脉冲响应（IIR）滤波器进行数字上变换的方法和装置。 用于使用多个频率转换的移动通信系统中用于频率转换的数字上变换的方法包括通过具有与有限脉冲响应（FIR）滤波相同的幅度响应的幅度响应IIR滤波器进行IIR滤波，输入信号 和根据Levinson多项式计算的稳定滤波器系数; 并通过幅度响应IIR滤波器接收IIR滤波信号，并且通过补偿非线性相位的滤波器系数到线性相位的相位补偿IIR滤波器进行IIR滤波。