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    GYRATORY SENSING SYSTEM TO ENHANCE WEARABLE DEVICE USER EXPERIENCE VIA HMI EXTENSION
    1.
    发明申请
    GYRATORY SENSING SYSTEM TO ENHANCE WEARABLE DEVICE USER EXPERIENCE VIA HMI EXTENSION 审中-公开
    陀螺传感系统，通过人机界面扩展来增强可佩戴的设备用户体验

    公开(公告)号：WO2016204902A1

    公开(公告)日：2016-12-22

    申请号：PCT/US2016/032626

    申请日：2016-05-16

    Applicant: INTEL CORPORATION ,  YONG, Khang Choong ,  SONG, Wil Choon ,  HECK, Howard L. ,  PHUN, Su Sin Florence

    Inventor： YONG, Khang Choong ,  SONG, Wil Choon ,  HECK, Howard L. ,  PHUN, Su Sin Florence

    IPC: G06F3/01

    CPC classification number: G06F3/0362 ,  G06F1/163

    Abstract: Methods and systems may provide for a gyratory sensing system (GSS) for extending the human machine interface (HMI) of an electronic device, particularly small form factor, wearable devices. The gyratory sensing system may include a gyratory sensor and a rotatable element to engage the gyratory sensor. The rotatable element may be sized and configured to be easily manipulated by hand to extend the HMI of the electronic device such that the functions of the HMI may be more accessible. The rotatable element may include one or more rotatable components, such as a body, edge or face of a smart watch, that each may be configured to perform a function upon rotation, such as resetting, selecting, and/or activating a menu item.

    Abstract translation: 方法和系统可以提供旋转感测系统（GSS），用于扩展电子设备的人机接口（HMI），特别是小型的可穿戴设备。 旋转感测系统可以包括旋转传感器和可旋转元件以接合旋转传感器。 可旋转元件的尺寸和构造可以用手轻松操作以延伸电子设备的HMI，使得HMI的功能可以更易于访问。 可旋转元件可以包括一个或多个可旋转部件，例如智能手表的主体，边缘或面，每个可以被配置为在旋转时执行功能，例如复位，选择和/或激活菜单项。

    BANDWIDTH CONFIGURABLE IO CONNECTOR
    4.
    发明申请
    BANDWIDTH CONFIGURABLE IO CONNECTOR 审中-公开
    带宽配置IO连接器

    公开(公告)号：WO2013048508A1

    公开(公告)日：2013-04-04

    申请号：PCT/US2011/054452

    申请日：2011-09-30

    Applicant: INTEL CORPORATION ,  JAUSSI, James, E. ,  MOONEY, Stephen, R. ,  CASPER, Bryan, K. ,  HECK, Howard, L.

    Inventor： JAUSSI, James, E. ,  MOONEY, Stephen, R. ,  CASPER, Bryan, K. ,  HECK, Howard, L.

    IPC: G06F13/14 ,  G06F13/38

    CPC classification number: H04L41/0896 ,  G06F13/385 ,  Y02D10/14 ,  Y02D10/151

    Abstract: Systems and methods of interconnecting devices may include an input/output (10) interface having one or more device-side data lanes and transceiver logic to receive a bandwidth configuration command. The transceiver logic may also configure a transmit bandwidth of the one or more device- side data lanes based on the bandwidth configuration command. Additionally, the transceiver logic can configure a receive bandwidth of the one or more device- side data lanes based on the bandwidth configuration command.

    Abstract translation: 互连设备的系统和方法可以包括具有一个或多个设备侧数据通道的输入/输出（10）接口和用于接收带宽配置命令的收发机逻辑。 收发器逻辑还可以基于带宽配置命令来配置一个或多个设备侧数据通道的发送带宽。 此外，收发器逻辑可以基于带宽配置命令来配置一个或多个设备侧数据通道的接收带宽。

    WIDTH SCALABLE CONNECTOR FOR HIGH BANDWIDTH IO INTERFACES
    5.
    发明申请
    WIDTH SCALABLE CONNECTOR FOR HIGH BANDWIDTH IO INTERFACES 审中-公开
    宽带宽接口的宽度可调连接器

    公开(公告)号：WO2013085495A1

    公开(公告)日：2013-06-13

    申请号：PCT/US2011/063566

    申请日：2011-12-06

    Applicant: INTEL CORPORATION ,  JAUSSI, James E. ,  MOONEY, Stephen R. ,  HECK, Howard L. ,  PEDERSON, Bruce E

    Inventor： JAUSSI, James E. ,  MOONEY, Stephen R. ,  HECK, Howard L. ,  PEDERSON, Bruce E

    IPC: H01R12/71 ,  H01R13/646

    CPC classification number: H03K19/0008 ,  H01R12/722 ,  H01R12/727 ,  H01R13/6658 ,  H01R24/60 ,  H01R25/006 ,  H03K19/0175

    Abstract: Disclosed is a scalable input/output interface that has multiple bays and includes a housing surrounding a plurality of pairs of substrates. A first substrate of the pair of substrates may have a first contact surface and a second substrate of the pair of substrates may have a second contact surface that opposes the first contact surface, wherein each substrate has a connection edge. At least one integrated buffer can be coupled to either the first side or the second side of each substrate. A plurality of rows of contacts can be coupled to the opposing surfaces of each substrate of the pair of substrates, wherein each row of contacts can be stacked substantially parallel to the connection edge. Each connection edge can also be coupled to a separate integrated buffer.

    Abstract translation: 公开了具有多个托架并且包括围绕多对基板的壳体的可伸缩输入/输出接口。 一对基板中的第一基板可以具有第一接触表面，并且该对基板的第二基板可以具有与第一接触表面相对的第二接触表面，其中每个基板具有连接边缘。 至少一个集成缓冲器可以耦合到每个衬底的第一侧或第二侧。 可以将多排触点耦合到一对基板的每个基板的相对表面，其中每排触点可以基本上平行于连接边缘堆叠。 每个连接边缘也可以耦合到单独的集成缓冲器。

    INTERCHANGEABLE POWER AND SIGNAL CONTACTS FOR IO CONNECTORS
    6.
    发明申请
    INTERCHANGEABLE POWER AND SIGNAL CONTACTS FOR IO CONNECTORS 审中-公开
    IO连接器的可互换电源和信号触点

    公开(公告)号：WO2013058730A1

    公开(公告)日：2013-04-25

    申请号：PCT/US2011/056581

    申请日：2011-10-17

    Applicant: INTEL CORPORATION ,  MOONEY, Stephen R. ,  HECK, Howard L ,  JAUSSI, James E. ,  HADY, Frank T. ,  CASPER, Bryan K.

    Inventor： MOONEY, Stephen R. ,  HECK, Howard L ,  JAUSSI, James E. ,  HADY, Frank T. ,  CASPER, Bryan K.

    IPC: G06F13/14 ,  G06F1/00

    CPC classification number: G06F13/385 ,  G06F1/266 ,  H01H9/54 ,  H01R13/6658 ,  Y10T307/74

    Abstract: Systems and methods of interconnecting devices may include an input/output (IO) connector assembly having a voltage regulator, one or more signaling circuits, a first set of contacts, a second set of contacts connected to the one or more signaling circuits, and logic to receive a configuration command. The logic may also connect the first set of contacts to the voltage regulator if the configuration command corresponds to a first protocol. If the configuration command corresponds to a second protocol, on the other hand, the logic can connect the first set of contacts to the one or more signaling circuits.

    Abstract translation: 互连设备的系统和方法可以包括具有电压调节器，一个或多个信令电路，第一组触点，连接到一个或多个信号电路的第二组触点和逻辑电路的输入/输出（IO）连接器组件 接收配置命令。 如果配置命令对应于第一协议，逻辑还可以将第一组触点连接到电压调节器。 如果配置命令对应于第二协议，另一方面，逻辑可以将第一组联系人连接到一个或多个信令电路。

    HOST CONTROLLED IO POWER MANAGEMENT
    7.
    发明申请
    HOST CONTROLLED IO POWER MANAGEMENT 审中-公开
    主机控制IO电源管理

    公开(公告)号：WO2013058729A1

    公开(公告)日：2013-04-25

    申请号：PCT/US2011/056574

    申请日：2011-10-17

    Applicant: INTEL CORPORATION ,  JAUSSI, James E. ,  MOONEY, Stephen R. ,  HECK, Howard L ,  CASPER, Bryan K. ,  HADY, Frank T.

    Inventor： JAUSSI, James E. ,  MOONEY, Stephen R. ,  HECK, Howard L ,  CASPER, Bryan K. ,  HADY, Frank T.

    IPC: G06F13/14 ,  G06F1/26

    CPC classification number: G06F1/26 ,  G06F1/266 ,  G06F1/3203

    Abstract: Systems and methods of interconnecting devices may include an input/output (IO) connector having a buffer with an integrated voltage regulator. The integrated voltage regulator may include a first supply output and a second supply output, wherein the IO connector includes an IO power contact coupled to the first supply output. The IO connector may also include a logic power contact coupled to the second supply output. In one example, a host device may issue power management commands to the buffer in order to scale the second supply output independently of the first supply output.

    Abstract translation: 互连设备的系统和方法可以包括具有集成稳压器的缓冲器的输入/输出（IO）连接器。 集成电压调节器可以包括第一电源输出和第二电源输出，其中IO连接器包括耦合到第一电源输出的IO电源触点。 IO连接器还可以包括耦合到第二电源输出的逻辑电源触点。 在一个示例中，主机设备可以向缓冲器发布功率管理命令，以便与第一电源输出独立地缩放第二电源输出。

    RATE SCALABLE CONNECTOR FOR HIGH BANDWIDTH CONSUMER APPLICATIONS
    8.
    发明申请
    RATE SCALABLE CONNECTOR FOR HIGH BANDWIDTH CONSUMER APPLICATIONS 审中-公开
    用于高带宽消费者应用的速率可调连接器

    公开(公告)号：WO2013089704A1

    公开(公告)日：2013-06-20

    申请号：PCT/US2011/064927

    申请日：2011-12-14

    Applicant: INTEL CORPORATION ,  JAUSSI, James E. ,  MOONEY, Stephen R. ,  HECK, Howard L. ,  PEDERSON, Bruce E.

    Inventor： JAUSSI, James E. ,  MOONEY, Stephen R. ,  HECK, Howard L. ,  PEDERSON, Bruce E.

    IPC: H01R12/71 ,  H01R13/629

    CPC classification number: H01R24/64 ,  H01R12/721 ,  H01R13/66 ,  H01R13/6658 ,  H01R24/28 ,  H01R24/62 ,  H01R2107/00

    Abstract: Methods and systems may include an input/output (IO) interface that has an integrated buffer, a housing and a substrate disposed within the housing. The substrate may include a first side, a second side and a connection edge. The integrated buffer can be coupled to at least one of the first side and the second side of the substrate. A plurality of rows of contacts may be coupled to the first side of the substrate. Each row of contacts can be stacked substantially parallel to the connection edge. The substrate may have power outputs coupled thereto and the integrated buffer can include a voltage regulator that has a supply output coupled to the power outputs.

    Abstract translation: 方法和系统可以包括具有集成缓冲器的输入/输出（IO）接口，壳体和设置在壳体内的基板。 衬底可以包括第一侧，第二侧和连接边缘。 集成缓冲器可以耦合到衬底的第一侧和第二侧中的至少一个。 多个触点列可以耦合到衬底的第一侧。 每排触点可以基本上平行于连接边缘堆叠。 衬底可以具有耦合到其上的功率输出，并且集成缓冲器可以包括具有耦合到功率输出的电源输出的电压调节器。

    RE-DRIVER POWER MANAGEMENT
    10.
    发明申请
    RE-DRIVER POWER MANAGEMENT 审中-公开
    再驱动电源管理

    公开(公告)号：WO2014099524A1

    公开(公告)日：2014-06-26

    申请号：PCT/US2013/074284

    申请日：2013-12-11

    Applicant: INTEL CORPORATION ,  CHEN, Huimin ,  HECK, Howard L.

    Inventor： CHEN, Huimin ,  HECK, Howard L.

    IPC: G06F1/26 ,  G06F1/32

    CPC classification number: G06F1/3253 ,  G06F13/4004 ,  G06F13/4086 ,  Y02B70/126 ,  Y02D10/151

    Abstract: The present disclosure provides techniques for increasing the power efficiency of re-drivers by providing a technique for a re-driver to recognize a variety of power states. A message generator may be located in a host device and may encode a signal indicating a change in a power state. The message may be transmitted to a message decoder located in a re-driver. The message decoder may decode the message and the re-driver may enter a power state in response to the decoded message.

    Abstract translation: 本公开提供了通过提供用于重新驱动程序识别各种功率状态的技术来提高重新驱动器的功率效率的技术。 消息发生器可以位于主机设备中，并且可以编码指示功率状态改变的信号。 消息可以被发送到位于重新驱动器中的消息解码器。 消息解码器可以对消息进行解码，并且重新驱动器可以响应于解码的消息而进入功率状态。

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