Abstract:
Printed circuit boards (PCBs) are configured with an athermalized mounting suitable for securing and positioning and the PCBs within an inertial measurement unit (IMU). The PCBs include integrated circuit (IC) components, such as accelerometers and/or gyroscopes, which require relative positional stability within the IMU environment in order to provide accurate results. The athermalized mounting configuration of the PCB enables the PCBs to experience thermal expansion within the IMU without causing significant displacement of the IC relative to the IMU environment.
Abstract:
An apparatus for securing a printed wiring assembly (PWA) within an enclosure of a downhole tool includes an elongate base, an elongate cover, and at least one bracket member coupled to the downhole tool. The base is for supporting electrical components that may include electronics, circuitry, conductive strips, and batteries thereon. The cover extends in a longitudinal direction and extends over the central portion of the base. At least one end of the base is uncovered by the cover. The cover includes at least one lateral recess that extends in a direction generally perpendicular to the longitudinal direction. The bracket member has a portion extending into the lateral recess and is configured to engage the cover and secure the cover within the enclosure.
Abstract:
A power electronics assembly for an electric motor controller is disclosed herein. The power electronics assembly comprises a first circuit board,a second circuit board spaced from the first circuit board by a stand-off distance,an electrically insulating housing held between the first circuit board and the second circuit board, a plurality of conductors, and a restraint adapted to hold the electrically insulating housing to the first circuit. The electrically insulating housing comprises a plurality of channels. The plurality of conductors are each arranged to provide a conduction path through a corresponding one of the plurality of channels and are each trapped inbetween the electrically insulating housing and the first circuit board and biased into electrical contact with an electrical conductor of the first circuit board.
Abstract:
A dielectric tape suitable for use in an electronic device is provided. A dielectric slip composition comprises an organic vehicle and a dielectric glass composition comprising at least about 20 wt% and no more than about 50 wt% silicon dioxide, based upon 100% total weight of the glass composition, at least about 10 wt% and no more than about 50 wt% alkali metal oxides, based upon 100% total weight of the glass composition, and at least about 1 wt% and no more than about 10 wt% of at least one transition metal oxide. A method of forming an electronic device is also provided. The method includes the steps of applying at least one dielectric tape to at least one non-planar surface of a substrate, and subjecting the at least one dielectric tape to one or more thermal treatment steps to form a dielectric layer.
Title translation:热膨胀调节剂,热膨胀树脂组合物,绝热材料,密封剂和导电性浆料,含有热固性树脂组合物的硬化剂,硬化型热固性树脂组合物获得的硬化材料,具有该热固性树脂组合物的基材, 使用本实用新型固化树脂组合物对其基材进行预处理的方法,其中所述制备树脂组合物的成员被硬化,热膨胀速率调节方法,以及通过使用调整方法制造的成员
Abstract:
Embodiments disclosed include a multilayer substrate for semiconductor packaging. The substrate may include a first layer with a first side with an xy-plane and individual locations on the first side have a first side distance below the first side xy-plane, and a second side with a second side xy-plane and individual locations on the second side may have a second side distance below the second side xy-plane; and a second layer with a first side coupled to the second side of the first layer and a second side opposite the first side of the second layer, wherein a thickness of the second layer at the individual locations on the second layer may be comprised of the first side distance plus the second side distance. Other embodiments may be described and/or claimed.
Abstract:
A device includes a stress relief region between at least two stress domains of a substrate (e.g., of a semiconductor die or other integrated circuit). The stress relief region includes a conductive structure electrically coupling circuitries of the stress domains between which the conductive structure is disposed.