HIGH VOLTAGE SILICON CARBIDE DEVICES HAVING BI-DIRECTIONAL BLOCKING CAPABILITIES AND METHODS OF FABRICATING THE SAME
    3.
    发明申请
    HIGH VOLTAGE SILICON CARBIDE DEVICES HAVING BI-DIRECTIONAL BLOCKING CAPABILITIES AND METHODS OF FABRICATING THE SAME 审中-公开
    具有双向阻断能力的高电压碳化硅器件及其制造方法

    公开(公告)号:WO2006124183A3

    公开(公告)日:2007-05-18

    申请号:PCT/US2006014673

    申请日:2006-04-19

    Abstract: High voltage silicon carbide (SiC) devices, for example, thyristors, are provided. A first SiC layer having a first conductivity type is provided on a first surface of a voltage blocking SiC substrate having a second conductivity type. A first region of SiC is provided on the first SiC layer and has the second conductivity type. A second region of SiC is provided in the first SiC layer, has the first conductivity type and is adjacent to the first region of SiC. A second SiC layer having the first conductivity type is provided on a second surface of the voltage blocking SiC substrate. A third region of SiC is provided on the second SiC layer and has the second conductivity type. A fourth region of SiC is provided in the second SiC layer, has the first conductivity type and is adjacent to the third region of SiC. First and second contacts are provided on the first and third regions of SiC, respectively. Related methods of fabricating high voltage SiC devices are also provided.

    Abstract translation: 提供高压碳化硅(SiC)器件,例如晶闸管。 具有第一导电类型的第一SiC层设置在具有第二导电类型的压电SiC衬底的第一表面上。 SiC的第一区域设置在第一SiC层上并具有第二导电类型。 SiC的第二区域设置在第一SiC层中,具有第一导电类型并且与SiC的第一区域相邻。 具有第一导电类型的第二SiC层设置在压电SiC衬底的第二表面上。 SiC的第三区域设置在第二SiC层上并具有第二导电类型。 SiC的第四区域设置在第二SiC层中,具有第一导电类型并且与SiC的第三区域相邻。 第一和第二触点分别设置在SiC的第一和第三区域上。 还提供了制造高电压SiC器件的相关方法。

    SILICON CARBIDE DEVICE AND METHOD OF FABRICATING THE SAME
    5.
    发明申请
    SILICON CARBIDE DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开
    硅碳化硅器件及其制造方法

    公开(公告)号:WO2006124107A1

    公开(公告)日:2006-11-23

    申请号:PCT/US2006/009256

    申请日:2006-03-15

    CPC classification number: H01L29/74 H01L29/0661 H01L29/1608

    Abstract: High voltage silicon carbide (SiC) devices, for example, thyristors, are provided. A first SiC layer having a first conductivity type is provided on a first surface of a voltage blocking SiC substrate having a second conductivity type. A first region of SiC is provided on the first SiC layer and has the second conductivity type. A second region of SiC is provided in the first SiC layer. The second region of SiC has the first conductivity type and is adjacent to the first region of SiC. A second SiC layer having the first conductivity type is provided on a second surface, opposite the first surface, of the voltage blocking SiC substrate. First, second and third contacts are provided on the first region of SiC, the second region of SiC and the second SiC layer, respectively. Related methods of fabricating high voltage SiC devices are also provided.

    Abstract translation: 提供高压碳化硅(SiC)器件,例如晶闸管。 具有第一导电类型的第一SiC层设置在具有第二导电类型的压电SiC衬底的第一表面上。 SiC的第一区域设置在第一SiC层上并具有第二导电类型。 SiC的第二区域设置在第一SiC层中。 SiC的第二区域具有第一导电类型并且与SiC的第一区域相邻。 具有第一导电类型的第二SiC层设置在压电SiC衬底的与第一表面相对的第二表面上。 首先,分别在SiC的第一区域,SiC的第二区域和第二SiC层上设置第二和第三触点。 还提供了制造高电压SiC器件的相关方法。

    METHOD FOR PRODUCING SEMI-INSULATING RESISTIVITY IN HIGH PURITY SILICON CARBIDE CRYSTALS
    9.
    发明申请
    METHOD FOR PRODUCING SEMI-INSULATING RESISTIVITY IN HIGH PURITY SILICON CARBIDE CRYSTALS 审中-公开
    在高纯度碳化硅晶体中生产半导体电阻率的方法

    公开(公告)号:WO2004001836A1

    公开(公告)日:2003-12-31

    申请号:PCT/US2003/018068

    申请日:2003-06-10

    CPC classification number: H01L21/324 C30B29/36 C30B33/00

    Abstract: A method is disclosed for producing high quality semi-insulating silicon carbide crystals in the absence of relevant amounts of deep level trapping elements. The invention includes the steps of heating a silicon carbide crystal having a first concentration of point defect related deep level states to a temperature above the temperatures required for CVD growth of silicon carbide from source gases, but less than the sublimation temperature of silicon carbide under the ambient conditions to thereby thermodynamically increase the number of point defects and resulting states in the crystal, and then cooling the heated crystal to approach room temperature at a sufficiently rapid rate to maintain a concentration of point defects in the cooled crystal that remains greater than the first concentration.

    Abstract translation: 公开了一种在没有相关量的深层捕获元件的情况下生产高质量半绝缘碳化硅晶体的方法。 本发明包括以下步骤:将具有与点缺陷有关的深层次状态的第一浓度的碳化硅晶体加热到高于来自源气体的碳化硅的CVD生长所需温度的温度,但小于碳化硅的升华温度 从而热力学地增加晶体中的点缺陷数量和结果状态,然后以足够快的速率将加热的晶体冷却至接近室温,以保持冷却的晶体中的点缺陷的浓度保持大于第一 浓度。

    HIGH VOLTAGE SILICON CARBIDE DEVICES HAVING BI-DIRECTIONAL BLOCKING CAPABILITIES AND METHODS OF FABRICATING THE SAME
    10.
    发明申请
    HIGH VOLTAGE SILICON CARBIDE DEVICES HAVING BI-DIRECTIONAL BLOCKING CAPABILITIES AND METHODS OF FABRICATING THE SAME 审中-公开
    具有双向阻断能力的高电压碳化硅器件及其制造方法

    公开(公告)号:WO2006124183A2

    公开(公告)日:2006-11-23

    申请号:PCT/US2006/014673

    申请日:2006-04-19

    Abstract: High voltage silicon carbide (SiC) devices, for example, thyristors, are provided. A first SiC layer having a first conductivity type is provided on a first surface of a voltage blocking SiC substrate having a second conductivity type. A first region of SiC is provided on the first SiC layer and has the second conductivity type. A second region of SiC is provided in the first SiC layer, has the first conductivity type and is adjacent to the first region of SiC. A second SiC layer having the first conductivity type is provided on a second surface of the voltage blocking SiC substrate. A third region of SiC is provided on the second SiC layer and has the second conductivity type. A fourth region of SiC is provided in the second SiC layer, has the first conductivity type and is adjacent to the third region of SiC. First and second contacts are provided on the first and third regions of SiC, respectively. Related methods of fabricating high voltage SiC devices are also provided.

    Abstract translation: 提供高压碳化硅(SiC)器件,例如晶闸管。 具有第一导电类型的第一SiC层设置在具有第二导电类型的压电SiC衬底的第一表面上。 SiC的第一区域设置在第一SiC层上并具有第二导电类型。 SiC的第二区域设置在第一SiC层中,具有第一导电类型并且与SiC的第一区域相邻。 具有第一导电类型的第二SiC层设置在压电SiC衬底的第二表面上。 SiC的第三区域设置在第二SiC层上并具有第二导电类型。 SiC的第四区域设置在第二SiC层中,具有第一导电类型并且与SiC的第三区域相邻。 第一和第二触点分别设置在SiC的第一和第三区域上。 还提供了制造高电压SiC器件的相关方法。

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