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1.
公开(公告)号:WO2021247276A2
公开(公告)日:2021-12-09
申请号:PCT/US2021/033981
申请日:2021-05-25
Applicant: CREE, INC.
Inventor: ALCORN, Terry , NAMISHIA, Daniel , RADULESCU, Fabian
IPC: H03F3/195 , H01L23/66 , H01L25/16 , H01L29/66 , H01L21/70 , H01L23/495 , H01L21/6835 , H01L21/76898 , H01L21/8258 , H01L2223/6655 , H01L2224/0401 , H01L2224/05025 , H01L2224/05644 , H01L2224/05647 , H01L2224/05657 , H01L2224/13022 , H01L2224/131 , H01L2224/13147 , H01L2224/1357 , H01L2224/16225 , H01L2224/16227 , H01L2224/48157 , H01L2224/48177 , H01L2224/48247 , H01L2224/73257 , H01L2224/94 , H01L23/481 , H01L23/4824 , H01L23/49531 , H01L23/498 , H01L23/5223 , H01L23/5227 , H01L23/5228 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/73 , H01L27/0605 , H01L27/0629 , H01L27/0694 , H01L2924/10156 , H01L2924/1421 , H01L2924/19107
Abstract: An integrated circuit device includes a radio frequency transistor amplifier die having a first surface, a second surface, a semiconductor layer structure that is between the first and second surfaces and includes a plurality of transistor cells adjacent the first surface, and terminals coupled to the transistor cells. At least one passive electronic component is provided on the second surface of the die and is electrically connected to at least one of the terminals, for example, by at least one conductive via. One or more conductive pillar structures may protrude from the first surface of the die to provide electrical connections to one or more of the terminals.
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2.
公开(公告)号:WO2020252234A1
公开(公告)日:2020-12-17
申请号:PCT/US2020/037391
申请日:2020-06-12
Applicant: CREE, INC.
Inventor: BOTHE, Kyle , JONES, Evan , NAMISHIA, Dan , HARDIMAN, Chris , RADULESCU, Fabian , ALCORN, Terry , SHEPPARD, Scott , SCHMUKLER, Bruce , FISHER, Jeremy
IPC: H01L29/778 , H01L29/66 , H01L29/20 , H03F3/195 , H03F3/24 , H01L29/417
Abstract: A power amplifier comprising a GaN-based high electron mobility transistor (HEMT) device, wherein a power added efficiency (PAE) of the power amplifier is greater than 32% at P1DB during operation of the power amplifier between 26.5 GHz and 30.5 GHz.
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公开(公告)号:WO2014200753A2
公开(公告)日:2014-12-18
申请号:PCT/US2014/040567
申请日:2014-06-02
Applicant: CREE, INC.
Inventor: SRIRAM, Saptharishi , ALCORN, Terry , RADULESCU, Fabian , SHEPPARD, Scott
IPC: H01L29/778 , H01L29/40
CPC classification number: H01L29/778 , H01L29/2003 , H01L29/402 , H01L29/407 , H01L29/7787
Abstract: A transistor device including a field plate is described. One embodiment of such a device includes a field plate separated from a semiconductor layer by a thin spacer layer. In one embodiment, the thickness of spacer layer separating the field plate from the semiconductor layers is less than the thickness of spacer layer separating the field plate from the gate. In another embodiment, the non- zero distance separating the field plate from the semiconductor layers is about 1500A or less. Devices according to the present invention can show capacitances which are less drain bias dependent, resulting in improved linearity.
Abstract translation: 描述包括场板的晶体管器件。 这种器件的一个实施例包括通过薄间隔层从半导体层分离的场板。 在一个实施例中,将场板与半导体层分离的间隔层的厚度小于将场板与栅极分离的间隔层的厚度。 在另一个实施例中,将场板与半导体层分开的非零距离为约1500A或更小。 根据本发明的器件可以显示依赖于较少漏极偏置的电容,导致改善的线性度。
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4.
公开(公告)号:WO2021076367A2
公开(公告)日:2021-04-22
申请号:PCT/US2020/054510
申请日:2020-10-07
Applicant: CREE, INC.
Inventor: JONES, Evan , ALCORN, Terry , GUO, Jia , RADULESCU, Fabian , SHEPPARD, Scott
IPC: H01L29/778 , H01L29/41 , H01L23/31 , H01L29/423 , H01L29/20 , H01L23/3171 , H01L23/3192 , H01L29/2003 , H01L29/404 , H01L29/407 , H01L29/42316 , H01L29/66462 , H01L29/7786
Abstract: A transistor includes a semiconductor layer structure (24), a source electrode (30) and a drain electrode (30) on the semiconductor layer structure, a gate (32) on a surface of the semiconductor layer structure between the source electrode and the drain electrode, and a field plate (33). The field plate includes a first portion (33a) adjacent the gate and a second portion (33b) adjacent the source or drain electrode. The second portion of the field plate is farther from the surface of the semiconductor layer structure than the first portion of the field plate, and is closer to the surface of the semiconductor layer structure than an extended portion (32a) of the gate. Related devices and fabrication methods are also discussed.
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公开(公告)号:WO2014200643A1
公开(公告)日:2014-12-18
申请号:PCT/US2014/037728
申请日:2014-05-12
Applicant: CREE, INC.
Inventor: SRIRAM, Saptharishi , ALCORN, Terry , RADULESCU, Fabian , SHEPPARD, Scott
IPC: H01L29/778 , H01L29/423 , H01L29/40
CPC classification number: H01L29/42356 , H01L29/2003 , H01L29/402 , H01L29/42316 , H01L29/778 , H01L29/7787
Abstract: A multi-stage transistor device is described. One embodiment of such a device is a dual-gate transistor, where the second stage gate is separated from a barrier layer by a thin spacer layer and is grounded through a connection to the source. In one embodiment the thin spacer layer and the second stage gate are placed in an aperture in a spacer layer. In another embodiment, the second stage gate is separated from a barrier layer by a spacer layer. The device can exhibit improved linearity and reduced complexity and cost.
Abstract translation: 描述多级晶体管器件。 这种器件的一个实施例是双栅晶体管,其中第二级栅极通过薄间隔层与阻挡层分离,并且通过与源极的连接而接地。 在一个实施例中,薄间隔层和第二级门被放置在间隔层中的孔中。 在另一个实施例中,第二级栅极通过间隔层与阻挡层分开。 该装置可以显示出改进的线性度并降低复杂性和成本。
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