公开(公告)号：WO2013003348A1

公开(公告)日：2013-01-03

申请号：PCT/US2012/044199

申请日：2012-06-26

Applicant: CREE, INC. ,  NORTH CAROLINA STATE UNIVERSITY ,  DHAR, Sarit ,  CHENG, Lin ,  RYU, Sei-Hyung ,  AGARWAL, Anant, Kumar ,  PALMOUR, John, Williams ,  MAKI, Erik ,  GURGANUS, Jason ,  LICHTENWALNER, Daniel, Jenner

Inventor： DHAR, Sarit ,  CHENG, Lin ,  RYU, Sei-Hyung ,  AGARWAL, Anant, Kumar ,  PALMOUR, John, Williams ,  MAKI, Erik ,  GURGANUS, Jason ,  LICHTENWALNER, Daniel, Jenner

IPC: H01L21/28 ,  H01L29/51 ,  H01L21/314 ,  H01L21/331 ,  H01L21/336 ,  H01L29/16

CPC classification number: H01L29/7802 ,  H01L21/02142 ,  H01L21/02164 ,  H01L21/02172 ,  H01L21/02175 ,  H01L21/022 ,  H01L21/02282 ,  H01L21/02288 ,  H01L21/02378 ,  H01L21/045 ,  H01L21/049 ,  H01L29/0619 ,  H01L29/1606 ,  H01L29/1608 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/7395 ,  H01L29/78 ,  H01L29/7813

Abstract: Embodiments of a semiconductor device having increased channel mobility and methods of manufacturing thereof are disclosed. In one embodiment, the semiconductor device includes a substrate including a channel region and a gate stack on the substrate over the channel region. The gate stack includes an alkaline earth metal. In one embodiment, the alkaline earth metal is Barium (Ba). In another embodiment, the alkaline earth metal is Strontium (Sr). The alkaline earth metal results in a substantial improvement of the channel mobility of the semiconductor device.

Abstract translation: 公开了具有增加的信道移动性的半导体器件及其制造方法的实施例。 在一个实施例中，半导体器件包括在沟道区上的衬底上包括沟道区和栅叠层的衬底。 栅极堆叠包括碱土金属。 在一个实施方案中，碱土金属是钡（Ba）。 在另一个实施方案中，碱土金属是锶（Sr）。 碱土金属导致半导体器件的沟道迁移率的显着改善。

公开(公告)号：WO2016108998A1

公开(公告)日：2016-07-07

申请号：PCT/US2015/055771

申请日：2015-10-15

Applicant: CREE, INC.

Inventor： LICHTENWALNER, Daniel, Jenner ,  CHENG, Lin ,  PALMOUR, John, Williams

IPC: H01L21/18 ,  H01L29/16 ,  H01L29/51 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/513 ,  H01L21/02236 ,  H01L21/02244 ,  H01L29/1033 ,  H01L29/1608 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/517 ,  H01L29/66068 ,  H01L29/66477 ,  H01L29/78

Abstract: A semiconductor device includes a semiconductor body and an insulated gate contact on a surface of the semiconductor body over an active channel in the semiconductor device. The insulated gate contact includes a channel mobility enhancement layer on the surface of the semiconductor body, a diffusion barrier layer over the channel mobility enhancement layer, and a dielectric layer over the diffusion barrier layer. By using the channel mobility enhancement layer in the insulated gate contact, the mobility of the semiconductor device is improved. Further, by using the diffusion barrier layer, the integrity of the gate oxide is retained, resulting in a robust semiconductor device with a low on-state resistance.

Abstract translation: 半导体器件包括在半导体器件中的有源沟道上的半导体本体的表面上的半导体本体和绝缘栅极接触。 绝缘栅极接触包括在半导体主体的表面上的沟道迁移率增强层，在沟道迁移率增强层上的扩散阻挡层，以及在扩散阻挡层上的电介质层。 通过在绝缘栅极接触中使用沟道迁移率增强层，提高了半导体器件的迁移率。 此外，通过使用扩散阻挡层，保持了栅极氧化物的完整性，导致具有低导通电阻的坚固的半导体器件。

公开(公告)号：WO2019125845A1

公开(公告)日：2019-06-27

申请号：PCT/US2018/065101

申请日：2018-12-12

Applicant: CREE, INC.

Inventor： LICHTENWALNER, Daniel, Jenner ,  VAN BRUNT, Edward, Robert

IPC: H01L29/861 ,  H01L29/872 ,  H01L29/78 ,  H01L29/36 ,  H01L29/06 ,  H01L29/08 ,  H01L29/16 ,  H01L21/336 ,  H01L21/329 ,  H01L29/10

Abstract: A vertical semiconductor device includes a substrate, a buffer layer over the substrate, and a drift layer over the buffer layer. The substrate has a first doping type and a first doping concentration. The buffer layer has the first doping type and a second doping concentration that is less than the first doping concentration. The drift layer has the first doping type and a third doping concentration that is less than the second doping concentration.

公开(公告)号：WO2021222180A1

公开(公告)日：2021-11-04

申请号：PCT/US2021/029306

申请日：2021-04-27

Applicant: CREE, INC.

Inventor： LICHTENWALNER, Daniel, Jenner

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/16 ,  H01L29/20 ,  H01L21/336 ,  H01L29/417 ,  H01L29/10 ,  H01L21/331

Abstract: A semiconductor device includes a semiconductor layer structure of a wide band-gap semiconductor material. The semiconductor layer structure includes a drift region having a first conductivity type and a well region having a second conductivity type. A plurality of segmented gate trenches extend in a first direction in the semiconductor layer structure. The segmented gate trenches include respective gate trench segments that are spaced apart from each other in the first direction with intervening regions of the semiconductor layer structure therebetween. Related devices and fabrication methods are also discussed.

公开(公告)号：WO2015050615A2

公开(公告)日：2015-04-09

申请号：PCT/US2014/046505

申请日：2014-07-14

Applicant: CREE, INC.

Inventor： LICHTENWALNER, Daniel, Jenner ,  CHENG, Lin ,  AGARWAL, Anant, Kumar ,  PALMOUR, John, Williams

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/42368 ,  H01L21/045 ,  H01L21/049 ,  H01L29/1608 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66068 ,  H01L29/7813

Abstract: The present disclosure relates to a silicon carbide (SiC) field effect device that has a gate assembly formed in a trench. The gate assembly includes a gate dielectric that is an dielectric layer, which is deposited along the inside surface of the trench and a gate dielectric formed over the gate dielectric. The trench extends into the body of the device from a top surface and has a bottom and side walls that extend from the top surface of the body to the bottom of the trench. The thickness of the dielectric layer on the bottom of the trench is approximately equal to or greater than the thickness of the dielectric layer on the side walls of the trench.

Abstract translation: 本发明涉及一种在沟槽中形成栅极组件的碳化硅（SiC）场效应器件。 栅极组件包括栅极电介质，栅极电介质是沿着沟槽的内表面沉积的电介质层和形成在栅极电介质上的栅极电介质。 沟槽从顶表面延伸到装置的主体中，并且具有从主体的顶表面延伸到沟槽底部的底壁和侧壁。 沟槽底部的电介质层的厚度大致等于或大于沟槽侧壁上的电介质层的厚度。

公开(公告)号：WO2015021154A1

公开(公告)日：2015-02-12

申请号：PCT/US2014/049941

申请日：2014-08-06

Applicant: CREE, INC.

Inventor： PALA, Vipindas ,  AGARWAL, Anant, Kumar ,  CHENG, Lin ,  LICHTENWALNER, Daniel, Jenner ,  PALMOUR, John, Williams

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/10

CPC classification number: H01L29/7802 ,  H01L29/0684 ,  H01L29/0865 ,  H01L29/0878 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/7827

Abstract: A power metal-oxide-semiconductor field-effect transistor (MOSFET) includes a substrate, a drift layer over the substrate, and a spreading layer over the drift layer. The spreading layer includes a pair of junction implants separated by a junction gate field effect (JFET) region. A gate oxide layer is on top of the spreading layer. The gate contact is on top of the gate oxide layer. Each one of the source contacts are on a portion of the spreading layer separate from the gate oxide layer and the gate contact. The drain contact is on the surface of the substrate opposite the drift layer.

Abstract translation: 功率金属氧化物半导体场效应晶体管（MOSFET）包括衬底，衬底上的漂移层以及漂移层上的扩散层。 扩展层包括由结栅场效应（JFET）区域分隔的一对结植入物。 栅极氧化层位于扩散层的顶部。 栅极接触位于栅极氧化物层的顶部。 源触点中的每一个位于扩散层的与栅极氧化物层和栅极接触分离的部分上。 漏极接触在衬底的与漂移层相对的表面上。