公开(公告)号：WO2016033232A1

公开(公告)日：2016-03-03

申请号：PCT/US2015/047023

申请日：2015-08-26

Applicant: DECA TECHNOLOGIES INC.

Inventor： BISHOP, Craig ,  DANIEL, Sabbas, A. ,  SCANLAN, Christopher, M.

IPC: H01L21/56 ,  H01L23/538

CPC classification number: H01L23/544 ,  H01L21/561 ,  H01L21/568 ,  H01L21/768 ,  H01L21/78 ,  H01L22/12 ,  H01L23/3114 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L2223/54406 ,  H01L2223/54413 ,  H01L2223/54433 ,  H01L2223/5448 ,  H01L2224/02377 ,  H01L2224/02379 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05647 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2924/13091 ,  H01L2224/11 ,  H01L2924/00 ,  H01L2224/214 ,  H01L2224/03 ,  H01L2924/00014 ,  H01L2924/01082 ,  H01L2924/014

Abstract: A method of making a semiconductor device can include providing a plurality of semiconductor die, wherein each semiconductor die comprises an active surface and a backside opposite the active surface. The method can include forming a build-up interconnect structure that extends over the active surface of each of the plurality of semiconductor die within the wafer, and forming a unique identifying mark for each of the plurality of semiconductor die as part of a layer within the build-up interconnect structure while simultaneously forming the layer of the build-up interconnect structure. The layer of the build-up interconnect structure can comprise both the unique identifying marks for each of the plurality of semiconductor die and functionality for the semiconductor device. Each unique identifying mark can convey a unique identity of its respective semiconductor die. The method can further include singulating the plurality of semiconductor die into a plurality of semiconductor devices.

Abstract translation: 制造半导体器件的方法可以包括提供多个半导体管芯，其中每个半导体管芯包括有源表面和与有源表面相对的背面。 该方法可以包括形成在晶片内的多个半导体管芯中的每一个的有源表面上延伸的积聚互连结构，并且为多个半导体管芯中的每一个形成独特的识别标记，作为该晶体管内的层的一部分 增强互连结构，同时形成积层互连结构层。 积层互连结构的层可以包括用于多个半导体管芯中的每一个的唯一识别标记和用于半导体器件的功能。 每个独特的识别标记可以传达其相应的半导体管芯的唯一身份。 该方法还可以包括将多个半导体管芯分离成多个半导体器件。