Abstract:
Die Erfindung betrifft ein Verfahren zur Kontaktierung einer Kontaktfläche (90) eines Halbleiterbauteils (50) und ein Elektronikmodul. Bei dem Verfahren zur Kontaktierung einer Kontaktfläche (90) eines Halbleiterbauteils (50), wird zunächst an die Kontaktfläche (90) eine sich in Richtung von der Kontaktfläche (90) weg verjüngende elektrisch leitfähige Schicht (200) gebracht und nachfolgend wird an der Schicht in zumindest einer Erstreckungsrichtung der Kontaktfläche angrenzend Isolationsmaterial (230) gebracht. Das Elektronikmodul ist insbesondere ein Leistungsmodul und umfasst ein Halbleiterbauteil mit einer Kontaktfläche (90) und mit einer Leiterbahn (225), wobei die Kontaktfläche (90) mittels eines solchen Verfahrens kontaktiert ist.
Abstract:
A method for forming a direct hybrid bond and a device resulting from a direct hybrid bond including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, capped by a conductive barrier, and having a first non- metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads capped by a second conductive barrier, aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads capped by conductive barriers formed by contact bonding of the first non-metallic region to the second non-metallic region.
Abstract:
It is disclosed a photoresist cleaning composition for stripping a photoresist pattern having a film thickness of 3-150 μm, which contains (a) quaternary ammonium hydroxide (b) a mixture of water-soluble organic solvents (c) at least one corrosion inhibitor and (d) water, and a method for treating a substrate therewith.
Abstract:
A method of processing an interconnection element can include providing a substrate element having front and rear opposite surfaces and electrically conductive structure, a first dielectric layer overlying the front surface and a plurality of conductive contacts at a first surface of the first dielectric layer, and a second dielectric layer overlying the rear surface and having a conductive element at a second surface of the second dielectric layer. The method can also include removing a portion of the second dielectric layer so as to reduce the thickness of the portion, and to provide a raised portion of the second dielectric layer having a first thickness and a lowered portion having a second thickness. The first thickness can be greater than the second thickness. At least a portion of the conductive element can be recessed below a height of the first thickness of the second dielectric layer.
Abstract:
A method for bonding a first semiconductor substrate to a second semiconductor substrate by direct bonding is described. The substrates are both provided on their contact surfaces with a dielectric layer, followed by a CMP step for reducing the roughness of the dielectric layer. Then a layer of SiCN is deposited onto the dielectric layer, followed by a CMP step which reduces the roughness of the SiCN layer to the order of 1 tenth of a nanometre. Then the substrates are subjected to a pre-bond annealing step and then bonded by direct bonding, possibly preceded by one or more pre- treatments of the contact surfaces, and followed by a post- bond annealing step, at a temperature of less than or equal to 250°C. It has been found that the bond strength is excellent, even at the above named annealing temperatures, which are lower than presently known in the art.
Abstract:
Curing of a passivation layer (60) is applied to the surface of a ferroelectric integrated circuit to enhance the polarization characteristics of ferroelectric structures (55). A passivation layer (60), such as a polyimide, is applied to the surface of the ferroelectric integrated circuit after fabrication of the active devices. The passivation layer (60) is cured by exposure to a high temperature, below the Curie temperature of ferroelectric material (62), for a short duration such as on the order of ten minutes. Variable frequency microwave energy may be used to effect such curing. The cured passivation layer (60) attains a tensile stress state, and as a result imparts a compressive stress upon the underlying ferroelectric material (62). Polarization may be further enhanced by polarizing the ferroelectric material (62) before the cure process.