公开(公告)号：WO2021133404A1

公开(公告)日：2021-07-01

申请号：PCT/US2019/068649

申请日：2019-12-27

Applicant: INTEL CORPORATION

Inventor： HAN, Dong-Ho ,  KULKARNI, Shantanu ,  LARSEN, Denica ,  LEE, Jaejin ,  LEE, Kwan Ho

IPC: H01Q1/52 ,  H01Q1/24

Abstract: An electronic computing device with a self-shielding antenna. An electronic computing device may include a frame, an antenna, and an antenna shielding. The frame includes a top cover and a bottom cover. Electronic components are included in a space formed between the top cover and the bottom cover. The antenna is for wireless transmission and reception and included in the frame near an edge of the frame. The antenna shielding is disposed around the antenna for providing electro-magnetic shielding from radio frequency (RE) noises generated from the electronic components included in the frame. The antenna shielding may be a metal wall disposed between the top cover and the bottom cover around the antenna. The frame may be a metallic frame and may include a cut-out in the top cover and the bottom cover above and below the antenna, and a non-metallic cover may be provided in the cut-out.

公开(公告)号：WO2006007360A1

公开(公告)日：2006-01-19

申请号：PCT/US2005/020452

申请日：2005-06-09

Applicant: INTEL CORPORATION ,  KIM, Hyunjun ,  KIM, Joong-Ho ,  HAN, Dong-Ho ,  HE, Jiangqi

Inventor： KIM, Hyunjun ,  KIM, Joong-Ho ,  HAN, Dong-Ho ,  HE, Jiangqi

IPC: H01P3/08

CPC classification number: H01P3/081 ,  H01P3/08 ,  H01P5/02

Abstract: Transmission line impedance matching is described for matching an impedance discontinuity on a transmission signal trace. The apparatus includes a transmission signal trace and a non-transmission trace. The transmission signal trace has an impedance discontinuity, a first length, and a predetermined first width. The non­transmission trace is disposed near the transmission signal trace at a region corresponding to the impedance discontinuity. The non-transmission trace has a second length that is substantially less than the first length of the transmission signal trace. Additionally, the non-transmission trace is configured to be electromagnetically coupled to the transmission signal trace in the presence of a current on the transmission signal trace to provide a matched impedance on the transmission signal trace.

Abstract translation: 描述传输线阻抗匹配以匹配传输信号迹线上的阻抗不连续性。 该装置包括发送信号跟踪和非传输迹线。 发送信号迹线具有阻抗不连续性，第一长度和预定的第一宽度。 在与阻抗不连续性相对应的区域处，将发射迹线设置在发射信号迹线附近。 非透射迹线具有基本上小于发射信号迹线的第一长度的第二长度。 此外，非传输轨迹被配置为在存在传输信号迹线上的电流的情况下电磁耦合到传输信号迹线，以在传输信号迹线上提供匹配的阻抗。

公开(公告)号：WO2018182656A1

公开(公告)日：2018-10-04

申请号：PCT/US2017/025208

申请日：2017-03-30

Applicant: INTEL CORPORATION ,  RADHAKRISHNAN, Kaladhar

Inventor： RADHAKRISHNAN, Kaladhar ,  LEE, Jaejin ,  HSU, Hao-Han ,  CHEN, Chung-Hao, J. ,  HAN, Dong-Ho

IPC: H01L23/552 ,  H01L23/522 ,  H01L23/64 ,  H01L23/66

CPC classification number: H01L23/5227 ,  H01L23/5225 ,  H01L23/552 ,  H01L23/645 ,  H01L23/66 ,  H01L2223/6666 ,  H01L2223/6677

Abstract: Semiconductor packages and a method of forming a semiconductor package are described. The semiconductor package has a foundation layer, a conductive layer formed in the foundation layer, and a magnetic layer formed between the conductive and the foundation layer. The conductive layer and the magnetic layer are coupled to form a low-profile inductor shield. The semiconductor package also has a dielectric layer formed between the magnetic and foundation layer. The foundation layer is mounted between a motherboard and a semiconductor die, where the foundation layer is attached to the motherboard with solder balls. Accordingly, the low-profile inductor shield may include a z-height that is less than a z-height of the solder balls. The low-profile inductor shield may have solder pads that are coupled to the conductive layer. The foundation layer may include at least one of voltage regulator and inductor, where the inductor is located above the low-profile inductor shield.

公开(公告)号：WO2018063262A1

公开(公告)日：2018-04-05

申请号：PCT/US2016/054556

申请日：2016-09-29

Applicant: INTEL CORPORATION

Inventor： HSU, Hao-Han ,  HAN, Dong-Ho ,  WACHTMAN, Steven C. ,  KUHLMANN, Ryan K.

IPC: H01L23/552 ,  H01L23/64 ,  H01L23/00 ,  H01L23/66

Abstract: A semiconductor package and a packaged electronic device are described. The semiconductor package has a foundation layer and a planar filtering circuit. The circuit is formed in the foundation layer to provide EMI/RFI mitigation. The circuit has one or more conductive traces that are patterned to form an equivalent circuit of inductors and capacitors. The one or more conductive traces include planar metal shapes, such as meanders, loops, inter-digital fingers, and patterned shapes, to reduce the z-height of the package. The packaged electronic device has a semiconductor die, a foundation layer, a motherboard, a package, and the circuit. The circuit removes undesirable interferences generated from the semiconductor die. The circuit has a z-height that is less than a z-height of solder balls used to attach the foundation layer to the motherboard. A method of forming a planar filtering circuit in a foundation layer is also described.

Abstract translation: 描述了半导体封装和封装的电子器件。 半导体封装具有基础层和平面滤波电路。 该电路形成在基层中以提供EMI / RFI缓解。 该电路具有一个或多个图案化的导电迹线以形成电感器和电容器的等效电路。 一个或多个导电迹线包括平面金属形状，诸如曲折线，环形，数字间指状物和图案化形状，以减小封装的z高度。 封装的电子器件具有半导体管芯，基础层，主板，封装和电路。 该电路去除了从半导体管芯产生的不希望的干扰。 该电路的z高度小于用于将基础层连接到主板的焊球的z高度。 还描述了在基础层中形成平面滤波电路的方法。

公开(公告)号：WO2022098342A1

公开(公告)日：2022-05-12

申请号：PCT/US2020/058622

申请日：2020-11-03

Applicant: INTEL CORPORATION

Inventor： THAKUR, Jayprakash ,  DEGANI, Ofir ,  KRONFELD, Ronen ,  RESHEF, Ehud ,  SUH, Seong-Youp, J. ,  SHOSHANA, Tal ,  MANN, Eytan ,  TAMRAKAR, Maruti ,  RAVI, Ashoke ,  CAMACHO PEREZ, Jose Rodrigo ,  HUUSARI, Timo Sakari ,  BOROKHOVICH, Eli ,  RUBIN, Amir ,  BENJAMIN, Ofer ,  YANG, Tae Young ,  SKINNER, Harry ,  LEE, Kwan Ho ,  LEE, Jaejin ,  HAN, Dong-Ho ,  GROSS, Shahar ,  SEGEV, Eran ,  KAMGAING, Telesphor

IPC: H04B1/50 ,  H04B1/00 ,  H04B1/44 ,  H01Q1/24

Abstract: In various aspects, a radio frequency circuit is provided. The radio frequency circuit may include a substrate that may include a radio frequency front-end to antenna (RF FE-to-Ant) connector. The RF FE-to-Ant connector may include a conductor track structure and a substrate connection structure coupled to the conductor track structure. The substrate may include radio frequency front-end circuitry monolithically integrated in the substrate. The substrate connection structure may include at least one of a solderable structure, a weldable structure, or an adherable structure. The substrate connection structure may be configured to form at least one radio frequency signal interface with an antenna circuit connection structure of a substrate-external antenna circuit. The substrate may include an edge region. The substrate connection structure may be disposed in the edge region.

公开(公告)号：WO2013191896A1

公开(公告)日：2013-12-27

申请号：PCT/US2013/044134

申请日：2013-06-04

Applicant: INTEL CORPORATION ,  HSU, Hao-Han ,  HAN, Dong-Ho ,  YANG, Songnan ,  KONANUR, Anand, S. ,  CHEN, Chung Hao Joseph

Inventor： HSU, Hao-Han ,  HAN, Dong-Ho ,  YANG, Songnan ,  KONANUR, Anand, S. ,  CHEN, Chung Hao Joseph

IPC: H01Q7/06 ,  H01Q1/24 ,  H02J17/00

CPC classification number: H01Q7/08 ,  H02J7/025 ,  H02J17/00 ,  H02J50/10 ,  H02J50/70 ,  H04B5/0037 ,  H04B5/0081

Abstract: Described herein are techniques related to near field coupling and wireless power transfers. A mobile device may include an edge-emitting antenna that offers ultra slim, all-metallic chassis packaging option with no cutout, uses lesser area, has robust mechanical strength, and provides EMI/ESD protection. In one example, an inductor coil is wrapped around a magnetic core and a pair of conductive layers is configured to interpose the magnetic core and the inductor coil between them to expose an edge of the magnetic core. The inductor coil being operable in a transmit mode to generate a magnetic field in response to a current passing through it. The edge is configured to enhance outward radiation of the magnetic field. Based on simulation results, the edge-emitting antenna occupies less space and provides an acceptable level of performance for coupling coefficients compared to conventional antenna.

Abstract translation: 这里描述了与近场耦合和无线功率传输相关的技术。 移动设备可以包括边缘发射天线，其提供超薄，全金属底盘封装选项，没有切口，使用较小的面积，具有坚固的机械强度，并提供EMI / ESD保护。 在一个示例中，电感线圈缠绕在磁芯周围，并且一对导电层被配置为将磁芯和电感线圈插入它们之间以暴露磁芯的边缘。 电感线圈可在发射模式下工作，以响应于通过它的电流而产生磁场。 边缘被配置为增强磁场的向外辐射。 基于仿真结果，与常规天线相比，边缘发射天线占用更少的空间并且提供了可接受的耦合系数的性能水平。

公开(公告)号：WO2013095326A1

公开(公告)日：2013-06-27

申请号：PCT/US2011/065785

申请日：2011-12-19

Applicant: INTEL CORPORATION ,  CHEN, Chung-Hao J. ,  HAN, Dong-Ho ,  SCHAFFER, Mike

Inventor： CHEN, Chung-Hao J. ,  HAN, Dong-Ho ,  SCHAFFER, Mike

IPC: H01F17/00 ,  H03H7/09

CPC classification number: H05K1/0237 ,  G06F1/16 ,  H01F17/0013 ,  H01F2017/0093 ,  H01P1/20327 ,  H01P1/20345 ,  H01P3/026

Abstract: Multi-pair differential lines printed circuit board common mode filters are generally described. In one embodiment, the apparatus includes a multi-layer printed circuit board, a first signal line and a second signal line forming a first differential pair on a first layer of the printed circuit board, a second differential pair on the first layer of the printed circuit board, and a common mode filter on a second layer of the printed circuit board, the common mode filter comprising an absence of a predominantly occurring dielectric material of the printed circuit board, the common mode filter spanning an area directly below at least a portion of both the first and the second differential pairs. Other embodiments are also described and claimed.

Abstract translation: 多对差分线路印刷电路板共模滤波器一般被描述。 在一个实施例中，该装置包括多层印刷电路板，第一信号线和在印刷电路板的第一层上形成第一差分对的第二信号线，在印刷电路板的第一层上的第二差分对 电路板和在印刷电路板的第二层上的共模滤波器，共模滤波器包括不存在印刷电路板的主要发生的介电材料，共模滤波器跨越至少部分的正下方的区域 的第一和第二差分对。 还描述和要求保护其他实施例。