公开(公告)号：WO03039974A2

公开(公告)日：2003-05-15

申请号：PCT/US0236032

申请日：2002-11-07

Applicant: XILINX INC

Inventor： CHEE SOON-SHIN ,  ZHANG LEILEI

IPC: H01L25/10 ,  H05K1/14 ,  H05K3/28 ,  H05K3/34 ,  B65D

CPC classification number: H01L24/97 ,  H01L25/105 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1005 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15184 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/1626 ,  H05K1/141 ,  H05K3/284 ,  H05K3/3436 ,  H05K2201/10689 ,  H05K2201/10734 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00

Abstract: A multi-package module package includes a plurality of individually packaged chips. Yield is increased over conventional multi-chip packages because the individual chips can be inexpensively and fully tested before being placed into the multi-package module package. Also, the manufacturing process is simpler because the individual chips can be more easily handled while being tested and attached to the multi-package module package. Further, a standard component surface mount process is used for package assembly. Thus, no new capital investment or process development is needed.

Abstract translation: 多封装模块封装包括多个单独封装的芯片。 产量比传统的多芯片封装增加，因为单个芯片在放入多封装模块封装之前可以经济实惠并经过充分测试。 此外，制造过程更简单，因为在测试和附接到多封装模块封装件时，可以更容易地处理各个芯片。 此外，标准组件表面贴装工艺用于封装组装。 因此，不需要新的资本投资或过程开发。

公开(公告)号：WO2012020064A1

公开(公告)日：2012-02-16

申请号：PCT/EP2011/063790

申请日：2011-08-10

Applicant: ST-ERICSSON SA ,  SLAVOV, Nedyalko

Inventor： SLAVOV, Nedyalko

IPC: H01L25/03 ,  H01L23/552 ,  H01L23/31 ,  H01L25/065 ,  H01L23/66

CPC classification number: H01L23/552 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/00 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/50 ,  H01L2223/6611 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48235 ,  H01L2224/48237 ,  H01L2224/49176 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/1626 ,  H01L2924/1815 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: An electronic device (100) comprises an integrated circuit die (130) mounted on a substrate (120). An electrical terminal (134) of the integrated circuit die (130) is coupled to an electrical terminal (124) of the substrate (120) by means of a wire (136) embedded in an electrically non-conductive moulded housing (140). The integrated circuit die (130) is also embedded in the electrically non-conductive moulded housing (140). There is an electrically conductive material (146) on a surface (142) of the moulded housing (140), and a connection means (127) for coupling the electrically conductive material (146) to a reference voltage. The electrically conductive material (146) and the substrate (120) in combination enclose the first integrated circuit die (130) and the first wire (136). There is a second integrated circuit die (150) mounted on the first electrically conductive material (146) and separated from the first wire (136) by the first electrically conductive material (146).

Abstract translation: 电子设备（100）包括安装在基板（120）上的集成电路管芯（130）。 集成电路管芯（130）的电端子（134）通过嵌入在不导电的模制壳体（140）中的线（136）耦合到衬底（120）的电端子（124）。 集成电路管芯（130）也嵌入在非导电模制外壳（140）中。 在模制外壳（140）的表面（142）上有导电材料（146）和用于将导电材料（146）耦合到参考电压的连接装置（127）。 导电材料（146）和基板（120）组合地封装第一集成电路管芯（130）和第一焊丝（136）。 存在安装在第一导电材料（146）上并通过第一导电材料（146）与第一导线（136）分离的第二集成电路管芯（150）。