US10826447B2
An apparatus of a transmitter and method are provided, the apparatus comprising a processor that calculates a supply voltage (SV) value (SVV) to provide as an SV for a power amplifier (PA) of the transmitter for transmissions during a transmission time slot (TS). When the SV
US10826441B2
Example embodiments provide a process that includes one or more of receiving an audio signal at a feedback compressor circuit, determining how much to attenuate the audio signal when a power level of the audio signal exceeds a threshold power level, combining the audio signal with an auxiliary attenuation signal from an auxiliary attenuation source and a compressed attenuation signal from the feedback compressor circuit to create a combination signal, and generating an audio output signal of the feedback compressor circuit based on the combination signal.
US10826439B2
A radio frequency (RF) amplifier circuit includes a field effect transistor (FET) (e.g., a FET belonging to a III-V FET enhancement group), where the FET includes a gate terminal coupled to an RF input node. The circuit further includes a prematch and biasing network coupled between a bias voltage node and the RF input node. The prematch and biasing network includes a nonlinear gate current blocking device configured to block a current from flowing between the bias voltage node and the RF input node.
US10826437B2
Systems and methods for communicating electromagnetic signals and/or power and, more particularly for example, to power combiners and similar systems and methods for communicating electromagnetic signals and/or power generated by amplifiers to loads, are described herein. In at least example embodiment, a power amplifier system includes first and second amplifier circuits and a power combiner circuit coupled to each of the first and second amplifier circuits and having a first microstrip transmission line component, a slotline formation, and an additional coupling component that is capable of being at least indirectly coupled to a load, where the first microstrip transmission line component and additional coupling component are electromagnetically coupled by way of the slotline formation.
US10826432B2
An oscillator circuit (10) for generating quadrature-related first and second oscillation signals having equal frequencies comprises a first oscillation circuit (VCO_I) configured to generate the first oscillation signal having a first controllable frequency, a second oscillation circuit (VCO_Q) configured to generate the second oscillation signal having a second controllable frequency; and a controller (100) configured to enable and disable oscillation of the first and second oscillation circuits (VCO_I, VCO_Q) and to control the first and second controllable frequencies, such that when the oscillation is enabled, the first and second controllable frequencies are controlled to be initially unequal and then to become equal.
US10826431B2
The present application relates to a differential Colpitts voltage-controlled oscillator (VCO) circuit, which comprises a pair of transistors with control terminals biased by a common biasing voltage and a pair of couplers arranged to cross-couple corrector/drain of the transistors and the base/gate of the differential transistors. The pair of couplers have a coupling factor kc, which used to enhance the transconductance of the transistor pair, therefore can be used for power consumption reduction and phase noise minimalization.
US10826428B1
To ensure photovoltaic (PV) panels at a PV plant constantly operate in an ideal state, an unsupervised system and method of intelligent performance evaluation and data-driven fault detection is used. The system and method enables engineers to check PV panels in time and implement timely maintenance. Monitored data are classified into three subsets: ideal period A, transition period S, and downturn period B. Based on A and B data, two regression prediction models are built which are tree-based and fit the non-continuous PV data well. Real-time measured power is compared with upper and lower reference baselines derived from the two predictive models, respectively. Using threshold ranges, the system and method achieves the instantaneous performance monitoring of PV power generation, and provides failure identification and operation and maintenance (O&M) suggestions to engineers.
US10826424B2
A cascaded inverter system is described and includes an electric machine that is electrically connected in series between first and second inverters. A controller is in communication with the first and second inverters, and includes an executable instruction set. A first dead-time compensation term and a first voltage compensation term are determined based upon an initial phase current and a switching frequency for the first inverter, and a final first duty cycle is determined based thereon. Simultaneously, a second dead-time compensation term and a second voltage compensation term are determined based upon the inverted initial phase current and a switching frequency for the second inverter, and a final second duty cycle is determined based thereon. Operation of the first and second inverters are dynamically controlled based upon the final first duty cycle and the final second duty cycle, respectively.
US10826418B2
In one embodiment, a generator includes a rotor configured to rotate in cooperation with a stator to generate electrical power. An exciter of the generator includes at least one circuit board, a stationary exciter stator, and a control circuit. The circuit board is mechanically coupled to a rotor of the generator and includes at least one coil of an electrical conductor. The stationary exciter stator is configured to induce a current in the at least one coil of the at least one circuit board. The control circuit is configured to modify the current from the at least one coil and provide the modified current to a field of the generator.
US10826414B2
An apparatus is provided for harvesting energy from mechanical vibrations with an improved power output. The apparatus comprises a frame (22), a first member (20) comprising a piezoelectric material, a cantilever beam (26) and an electrode. The first member is fixed to the frame at a first position and a second position and extends between the first and second positions. The cantilever beam has a first end fixed to the first member between the first position and the second position and a second end fixed to a proof mass (24). The electrode is fixed to the first member at a position between the first position and the second position. In another aspect, the apparatus may comprise a plurality of proof masses connected to the first member between the first and second positions in a spaced relationship to one another.
US10826412B2
A method for the activation of power semiconductors in an inverter using a microprocessor controlling a pulse width modulation (PWM). The method serves for improving the electromagnetic compatibility (EMC) and is in particular applicable in electric refrigerant compressors of motor vehicles.
US10826411B2
A controller for a power conversion circuit includes a first limiter for limiting a compensating voltage component within a compensating voltage switching level. A delay time measurement section measures an ON-delay time and an OFF-delay time, based on a binarized digital value and a PWM command value. A multiplier calculates an error voltage component average value by multiplying an average value of the ON-delay time and the OFF-delay time by a value that is obtained by dividing a direct-current power supply voltage by a half cycle of a triangular wave carrier signal. A second limiter extracts a component of the error voltage component average value that is beyond the compensating voltage switching level in absolute value. An adder sets a combined compensating voltage component to a sum of a limited compensating voltage component outputted by the first limiter and a limited error voltage component outputted by the second limiter.
US10826406B1
An alternator and a rectifier thereof are provided. The rectifier includes a rectifying transistor, a gate driving circuit and a voltage clamping circuit. The rectifying transistor generates a rectified voltage according to an input voltage and is controlled by a gate voltage. The gate driving circuit generates the gate voltage according to a difference between the rectified voltage and the input voltage. The gate driving circuit provides the gate voltage in a first time interval when the difference is less than the first predetermined threshold voltage, and makes the difference equal to the first reference voltage. The gate driving circuit adjusts the gate voltage in a second time interval and the difference is equal to the second reference voltage. In the second time interval, the voltage clamping circuit clamps the gate voltage by comparing the difference with the third reference voltage and the gate voltage with the fourth reference voltage.
US10826396B1
An automatic bandwidth control system for any switching frequency of a power converter is provided. A pulse generator outputs a preset clock signal according to a comparing signal. A control circuit controls a first switch and a second switch according to frequencies of the preset clock signal and an external clock signal. A first current mirror is connected to an input voltage source and a first terminal of the first switch. A second comparator compares an output voltage of a second reference voltage source with an output voltage of the first current mirror to output the comparing signal. A second current mirror is connected to the input voltage source, an error amplifier and a first terminal of the second switch. A transconductance gain of the error amplifier is controlled by a current of the second current mirror to adjust a bandwidth of the power converter.
US10826391B2
A power supply for a smooth power output level transitioning includes an energy storage circuit for temporarily storing electric energy for driving a load, a semiconductor switch for pulse-width modulation (PWM) switching, and a digital PWM controller. The digital PWM controller generates a driving waveform to regulate on and off status of the semiconductor switch. The driving waveform toggles between PWM periods of a first type and PWM periods of a second type, and gradually adjusts a ratio of numbers of the PWM periods of the two types over time. The toggling driving waveform achieves one or more intermediate finer power output level that cannot be realized by a single type of PWM period with an intermediate duty cycle, due to the minimum item unit of the driving waveform limited by a clock rate of the digital PWM controller.
US10826390B2
A power supply includes a transformer configured to transform a direct current (DC) voltage and supply an output voltage to a load. The power supply further includes circuitry configured to control the output voltage from the transformer, compare one of an average per unit time of the output voltage and an amplitude value of the output voltage with a threshold in a failure-free state when performing droop control of the output voltage, and determine whether a failure has occurred in at least one of the load and the transformer.
US10826383B2
In the present power conversion device, when a fault occurs in a power system (1) and DC voltage (VDC) of a capacitor (15) included in a unit converter (5) exceeds a protection level (VH), the operation of an inverter (10) is stopped. When the DC voltage (VDC) decreases to a recovery level (V1) or lower, DC voltage control of the inverter (10) is resumed to quickly decrease the DC voltage (VDC). When the DC voltage (VDC) decreases to a recovery level (V2) or lower, reactive power control of the inverter (10) is resumed. Thus, even when a fault occurs in the power system (1), the operation of the inverter (10) can be quickly resumed.
US10826380B2
A switching converter, a circuit for controlling the same and a method for controlling the same. A ripple signal correlated to an input voltage and an on-off state of a power switch of the switching converter is superimposed on a feedback signal of an output voltage, so as to achieve closed-loop control of the output voltage. A dynamic response speed of the switching converter in case of a change of the input voltage is improved, while a switching frequency is kept constant.
US10826378B2
A control device generates a voltage command value for controlling a current flowing between a three-phase AC power supply and a power converter such that a full voltage representative value representing voltage values of all power storage devices agrees with a DC voltage command value. The control device generates a zero-phase voltage command value for controlling a circulating current flowing in a delta connection such that the voltage values of the power storage devices are balanced among first to third arms. The control device combines the voltage command value and the zero-phase current command value to generate an output voltage command value for controlling an output voltage of each unit converter. The control device removes a control amount of the full voltage representative value from a computation of the zero-phase voltage command value to cause output current control and circulating current control not to interfere with each other.
US10826372B2
The magnetic gear includes a magnetic force generator (8), a driving shaft (1), a driven shaft (2) and a gear carrier (3) which are magnetically coupled in movement to one another. Only one magnetic force generator (8) is provided, which one magnetic force generator (8) has a north-south alignment that runs in the axis direction (111) of a shaft (1, 2) or parallel to this.
US10826370B2
To safely avoid a collision of two transport units in the switch area during operation of a conveyor in the form of a long stator linear motor with a switch, a collision zone is provided in the switch area, wherein the collision zone extends from the beginning of the switch in each case a length on the respective conveyor section, and to define the collision zone, the transport units are considered as two-dimensional objects and a position of the first transport unit on the first conveyor section is determined, which the first transport unit is allowed to occupy, so that the second transport unit can be moved as a two-dimensional object along the second conveyor section without collision through the switch and a distance between this first position and the beginning of the switch is determined and at least this distance is used as the first length.
US10826367B2
An electrical machine includes a stator and a rotor rotatably mounted in the stator. A spindle is guided through the electrical machine. At least one magnetic flux-conductive assembly which can be introduced into the electrical machine is provided. The magnetic flux-conductive assembly is disposed on the spindle in a linearly displaceable manner in order to vary a motor constant of the electrical machine as a result of a displacement into the electrical machine.
US10826363B2
Electrical machines, components thereof, and methods for manufacturing the same are provided. In one aspect, methods for additively manufacturing a rotor assembly for an electrical machine is provided. The method includes additively printing the rotor core and shaft of the same material composition. In another aspect, an electrical machine is provided. The electrical machine includes a stator assembly that includes a stator core having a plurality of poles with magnetic slot wedges positioned between adjacent poles to reduce tooth harmonics. The electrical machine also includes a rotor assembly having a rotor core that is formed as a solid core. In yet another aspect, a rotor assembly for an electrical machine is provided that includes slots that reduce eddy current losses in the rotor core during operation of the electrical machine.
US10826358B2
A first tubular portion and a second tubular portion extended from a main body portion of a terminal block configuring a rectifying device are inserted into a casing through hole of a rear bracket configuring a casing of a vehicle-use alternating current generator, and the rectifying device is attached to a main body portion side. The first tubular portion including a sealing portion that seals the casing through hole is inserted into the casing through hole into which a lead is not inserted, and the second tubular portion of a form enclosing the lead is inserted into the casing through hole into which the lead is inserted.
US10826343B2
An electric machine is provided which includes a rotor disk extending along a radial direction and having a rotor flange attached to or formed integrally with the rotor disk and extending substantially along the axial direction. A plurality of rotor magnets are mounted on the rotor disk and supported by the rotor flange such that the rotor flange absorbs centrifugal loads exerted on the magnets and enables high speeds of operation.
US10826342B2
A rotor for a permanent magnet generator includes a rotor body extending between a first end and a second end, having a cylindrical bore and a plurality of flats on an outer peripheral surface. Permanent magnets are positioned at the flats. An outer ring surrounds the permanent magnets and defines an outer diameter. A ratio of the outer diameter to an axial length between the first and second ends is between 3.2 and 3.4. An integrated drive generator and a method are also disclosed.
US10826330B2
Methods and systems for a complementary metal oxide semiconductor wireless power receiver may include a receiver chip with an inductor, a configurable capacitance, and a rectifier. The method may include receiving an RF signal utilizing the inductor, extracting a clock signal from the received RF signal, generating a DC voltage utilizing a rectifier circuit, sampling the DC voltage, and adjusting the configurable capacitance based on the sampled DC voltage. The rectifier circuit may include CMOS transistors and T-gate switches for coupling to the inductor. The T-gate switches may be controlled by the generated DC voltage. A signed based gradient-descent algorithm may be utilized to maximize the DC voltage. The DC voltage may be sampled utilizing a comparator powered by the DC voltage, which may adaptively configure the capacitance. The inductor may be shielded utilizing a floating shield. The DC voltage may be increased utilizing a voltage-boosting rectifier.
US10826326B2
A portable terminal is provided, including a cover member which is detachably provided at a rear surface of a main body of a terminal, a resonant antenna for a reception unit provided inside of the cover member, a reception circuit unit provided inside of the main body, and a connection unit for connecting the resonant antenna for a reception unit with the reception circuit unit. The portable terminal efficiently receives the signal power provided from a charger by arranging the resonant antenna inside of the cover member, and minimizes the thickness of the portable terminal by providing the reception circuit unit inside of the main body of the terminal.
US10826324B2
Mitigation of gratuitous conditions on an electric power delivery system is disclosed herein. Intelligent electronic devices (IEDs) may take actions on the electric power delivery system based on commands received via communications channels and based on detected electrical conditions. When a gratuitous condition (such as a cyber attack) is detected, a block command is provided to the IEDs such that the IEDs do not effect actions corresponding with commands received over a communications system. Communications may pass through a condition monitor of a communications device to detect insecurity and either block the communications or command the IED to enter interlock mode.
US10826322B2
A grid interactive uninterruptible power supply (UPS) is provided. The grid interactive UPS includes a first path including a rectifier, an inverter coupled in series with the rectifier, and a battery coupled in parallel with the inverter. The grid interactive UPS further includes a second path in parallel with the first path, wherein the grid interactive UPS is operable to supply power from the battery to a grid coupled to an input of the grid interactive UPS.
US10826318B2
A power storage apparatus includes a charge and discharge controller. To start a voltage increasing operation in a state where a smoothing capacitor is not charged, the charge and discharge controller supplies a nonrestrictive current to a voltage increasing and decreasing circuit after charging the smoothing capacitor with a restrictive current. When a second direct-current voltage is supplied to a second terminal, the charge and discharge controller charges the smoothing capacitor with an increased voltage by the voltage increasing operation after charging the smoothing capacitor with the restrictive current, reduces a potential difference between the charge voltage in the smoothing capacitor and the second direct-current voltage, and then closes a switch circuit.
US10826313B2
Power management systems for an electronic product demonstration fixture for demonstrating portable electronic devices. The product demonstration fixture may include an exhibition portion and a base portion. A portable electronic device offered for sale may be affixed to the exhibition portion. The base portion may include an electronic display, an auxiliary battery, and an auxiliary controller. The auxiliary controller may direct power from the auxiliary battery to the electronic display upon determining that a battery within the electronic display has fallen below a particular selected level. Similarly the auxiliary controller may direct power from the auxiliary battery to the portable electronic device offered for sale upon determining that a battery within the portable electronic device has fallen below a selected level.
US10826309B2
A terminal can include a battery (11), a temperature detection circuit (13), a control circuit (14) and a heating apparatus (15), wherein the control circuit detects a temperature of the battery via the temperature detection circuit, and if the temperature of the battery is detected to be less than a first threshold, the control circuit keeps a charging loop for charging the battery disconnected and controls the heating apparatus to heat the battery; and if the temperature of the battery is detected to be greater than or equal to the first threshold, the control circuit controls the charging loop to be conducted for charging the battery. A heating apparatus and a charging method for a battery are also provided.
US10826305B2
A fast charging method for a parallel battery pack is provided, including: obtaining a maximum charging current allowed by a charging trunk and a charging current required for charging a parallel battery pack; comparing the charging current required for charging the parallel battery pack with the maximum charging current allowed by the charging trunk; if the charging current required for charging the parallel battery pack is less than or equal to the maximum charging current allowed by the charging trunk, performing parallel charging on battery units; or if the charging current required for charging the parallel battery pack is greater than the maximum charging current allowed by the charging trunk, changing some or all of battery units in the parallel battery pack to a series connection, and performing series charging on the battery units. The fast charging method for a parallel battery pack can effectively shorten a charging time.
US10826296B2
A solar cell management system for increasing the efficiency and power output of a solar cell and methods for making and using the same. The management system provides an electric field across one or more solar cells. The imposed electric field exerts a force on both the electrons and holes created by light incident on the solar cell and accelerates the electron-hole pairs towards the electrodes of the solar cell. The solar cell management system considers variations in configuration of solar cells to maximize the power output of the solar cells. The accelerated electron-hole pairs have a lower likelihood of recombining within the cells' semiconductor's material. This reduction in the electron-hole recombination rate results in an overall increase in the solar cells' efficiency and greater power output.
US10826278B2
An optical device may include an array of vertical-cavity surface-emitting lasers (VCSELs) having a design wavelength, each VCSEL having an emission area. The optical device may include a first metal layer, substantially covering the array, a second metal layer substantially covering the first metal layer, and an electrical isolation layer, between the first metal layer and the second metal layer, that includes vias for electrically connecting portions of the first metal layer and portions of the second metal layer. The optical device may include a dielectric disposed over the emission area of each VCSEL. A variation in a thickness of the dielectric across at least approximately 90% of an area of the dielectric may be less than approximately 2% of the design wavelength. A depth of a well around the emission area may be equal to at least approximately 10% of a width of the emission area.
US10826276B2
A semiconductor laser including an active zone and a waveguide, wherein the active zone includes an active layer configured to generate electromagnetic radiation during operation of the semiconductor laser, the waveguide is configured to guide the electromagnetic radiation generated during operation of the semiconductor laser within the semiconductor laser, the waveguide includes a subregion formed from a compound semiconductor material, wherein a proportion of a material of the compound semiconductor material gradually increases in the entire subregion along the vertical direction toward the active zone so that a refractive index of the subregion gradually decreases toward the active zone, and the proportion is an aluminum proportion or a phosphorus proportion.
US10826269B2
A system for controlling a pulsed laser diode includes a power source configured to supply power to the pulsed laser diode and at least one driving branch between the power source and the pulsed laser diode. The at least one driving branch is configured to control power delivery from the power source to the pulsed laser diode. The at least one driving branch is connected to a cathode of the pulsed laser diode.
US10826241B2
A connector set includes: a first connector having a first housing; a second connector having a second housing; and a slide member slidably held in one of the housing. The slide member includes a slide lock mechanism to interfere with a slide restrictor formed on the one housing to restrict sliding of the slide member to a second position in a state where the first housing and the second housing are not fitted together. The slide restrictor is formed on the housing main body of the one housing.
US10826240B2
Disclosed is a high-voltage shielded connector assembly. The technical problem to be solved is that existing high-voltage connectors are large in volume, complex to assemble and machine, non-universal, and high in cost. The present invention comprises a socket protection sleeve body, a pin, a socket shielding layer fixed on the socket protection sleeve body and a fixing clip fixing the socket shielding layer, wherein the pin cooperates with the socket protection sleeve body; and the pin comprises a two-layer locking structure formed by a main locking structure and an auxiliary locking structure. After using the above-mentioned technical solution, the present invention uses a high-voltage large-current plate-end shielded connector which is made of plastic and is suitable for new energy automobiles, is low in cost, has high production efficiency, is small in volume, and is simple in wiring harness assembly and processing.
US10826232B2
A cable connector providing transmission of electric current from an electrical plug to an electrical device through an electric cable and a supply cable via electrical terminals upon achieving a contact of female terminals to male terminals and it is characterized in that it has at least one locking mechanism containing at least one female socket whereon male terminals are located, at least one male socket whereon female terminals are located and at least one tab providing interlocking of a female socket and a male socket and at least one resilient hook-whereon a tab is installed.
US10826228B2
The present invention relates to a connector which is disposed outside a case, the connector comprising: a terminal protruding at one end thereof into the case and protruding at the other end thereof out of the case; an inner housing coupled to the terminal so as to allow the terminal to protrude at the one end and the other end thereof; a pad disposed on one surface of the inner housing; and a housing completely surrounding the inner housing and the pad, wherein the housing comprises: a protrusion portion protruding from one surface of the case; and a mounting portion having a terminal groove in which the other protruding end of the terminal is placed.
US10826227B2
The connector system of the present invention includes a crimp housing and a floating block. A passage extending in a longitudinal direction is formed in the crimp housing. The floating block is disposed in the passage of the crimp housing and has an interior passage extending in the longitudinal direction for receiving a back post of a connector. The floating block may make limited three-dimensional movements with respect to the crimp housing. The connectors seated in the connector system of the present invention may be independently moved with respect to each other thereby properly aligning with an adapter.
US10826218B2
A thermally insulating electrical contact probe including a mounting plate having a tubular pin guide defining a pin pass-through, a cover coupled to the mounting plate and having a neck portion enclosing the pin guide, and an insulating pin having a shank portion disposed within the pin pass-through and defining a conductor pass-through, a flange portion extending radially outwardly from the shank portion above a top of the pin guide, and a pocket portion extending from the flange portion and defining a pocket. The electrical contact probe may further include a spring disposed intermediate the flange portion and the mounting plate, the spring biasing the flange portion away from the mounting plate, an electrical contact pad disposed within the pocket, and an electrical conductor coupled to the electrical contact pad and extending through the conductor pass-through.
US10826216B2
The invention relates to an outer conductor arrangement (4) for a coaxial connector (2). According to the invention, the outer conductor arrangement (4) is of two-part design, comprising a contact component (6) for electrical and mechanical connection to an outer conductor of a mating connector and comprising a connection component (8b) for electrical and mechanical connection to an outer conductor of a coaxial cable, wherein the contact component (6) and the connection component (8b) are electrically and mechanically connected to one another at a contact section (12b), wherein a compensation section (26) for compensation of a component difference in the region of the contact section (12b) is arranged between the contact component (6) and the connection component (8b).
US10826213B2
An electrical connector has an insulative elongated housing retaining a plurality of contacts therein. The housing includes an upper wall, a lower wall and a rear wall to commonly form a receiving slot. The upper wall forms a plurality of upper passageways and the lower wall forms a plurality of lower passageways to receiving the corresponding upper contacts and lower contacts therein. Each contact includes a mating section extending into the mating space and a mounting leg extending outside of the housing. The housing forms a plurality of cavities in the upper wall, the lower wall and the rear wall to relative evenly adjust the thickness of the different positions in the cross-section of the housing so as to evenly molding the housing without improper deformation/warpage when the housing is solidified after molding.
US10826198B2
Provided are a circuit and method for adjusting the frequency band of an antenna, and an electronic device. The circuit includes: an antenna signal main feed-point connected to a radio frequency link; an antenna signal ground feed-point connected to a ground terminal; and a tuning device. The tuning device is electrically connected to the antenna signal main feed-point and/or the antenna signal ground feed-point, and is configured to adjust a resonance of a frequency in a radio frequency signal. The tuning device comprises a switch group and a tuning element.
US10826186B2
A notch radiator apparatus includes: a planar circuit board having a plurality of different planar layers; a balun cavity formed between two ground layers of the planar circuit board that are separated by a laminated layer; a conductive notch formed horizontally in a plane parallel to the planar circuit board by two three dimensional (3D) structures formed on a top surface of the circuit board; a stripline signal feed folded within planar circuit board layers; and a plated hole formed vertically in a plane perpendicular to the planar circuit board and extending from the stripline signal feed. The stripline signal feed electromagnetically transfer radio frequency (RF) energy into or out of the antenna notch radiator apparatus.
US10826184B2
Systems and methods are provided for Planar Ultrawideband Modular Antenna (PUMA) arrays that use slots as primary radiating mechanisms. Slot-based PUMA arrays in accordance with an embodiment of the present disclosure can achieve approximately the same performance as dipole-based PUMA arrays. Systems and methods according to embodiments of the present disclosure enable wideband slot-based antenna arrays that can be planar printed using etched metallic traces and plated through vias, have a single input per unit cell, and have unit cells that are coupled to radiating slot(s) that are continuous across multiple unit cells.
US10826182B2
A single piece of sheet metal antenna as well as a method and system for providing the antenna are provided. The single piece of sheet metal antenna includes a reflector/shield portion formed of a lower surface that extends in a horizontal direction and includes a through-hole, an antenna portion formed of an upper surface that extends in the horizontal direction and a vertically extending side that is joined between the upper surface and the lower surface, and a feed point formed of a through-hole flap attached and extending from the upper surface down and through the through-hole of the lower surface.
US10826181B2
A hybrid patch antenna assembly is provided including an antenna element board having first and second layers separated by a dielectric and a radio board coupled to the antenna element board by at least two legs of a ladder line and separated from the antenna element board by a predetermined distance such that the antenna element board is suspended above the radio board.
US10826161B2
An antenna module includes a base frame and a conductive pattern disposed on the base frame, wherein the conductive pattern includes a first conductor layer disposed on the base frame, a second conductor layer disposed on the first conductor layer, and a third conductor layer disposed on the second conductor layer. A surface of the conductive pattern has an areal roughness expressed by an arithmetical mean height (Sa) ranging from 4.7 μm to 5.7 μm and a maximum height (Sz) ranging from 40 μm to 55 μm. In addition, a method of manufacturing the antenna module is also disclosed. It includes manufacturing a base frame having a radiator region and forming a radiator in the radiator region, wherein the forming of the radiator includes forming a first conductor layer on an uneven portion of the base frame, forming a second conductor layer on the first conductor layer, and forming a third conductor layer on the second conductor layer.
US10826151B2
A directional coupler circuit includes a signal line disposed between a first terminal and a second terminal; a coupling line comprising a first end terminal and a second end terminal, and disposed to be coupled to the signal line; a switching circuit connecting the first end terminal and a coupling port to each other to extract a first coupling signal in a first coupling mode, and connecting the second end terminal and the coupling port to extract a second coupling signal in a second coupling mode; and a phase compensating circuit configured to compensate for a phase difference between the coupling port and a first isolation port in the first coupling mode, or compensate for a phase difference between the coupling port and a second isolation port in the second coupling mode.
US10826148B2
A ridge waveguide (10) according to the present invention includes a ridge part (11), the ridge part (11) being in contact with both a side (14) in a long-side direction and a side (15) in a short-side direction in a cross-sectional shape of the ridge waveguide. Further, an array antenna apparatus according to the present invention includes a feeder circuit formed by a ridge waveguide (10) including a ridge part (11), the ridge part (11) being in contact with both a side (14) in a long-side direction and a side (15) in a short-side direction in a cross-sectional shape of the ridge waveguide. In this way, it is possible to provide a ridge waveguide that can be easily manufactured.
US10826144B2
An electrochemical cell system is configured to utilize an oxidant reduction electrode module containing an oxidant reduction electrode mounted to a housing to form a gaseous oxidant space therein that is immersed into the ionically conductive medium. A fuel electrode is spaced from the oxidant reduction electrode, such that the ionically conductive medium may conduct ions between the fuel and oxidant reduction electrodes to support electrochemical reactions at the fuel and oxidant reduction electrodes. A gaseous oxidant channel extending through the gaseous oxidant space provides a supply of oxidant to the oxidant reduction electrode, such that the fuel electrode and the oxidant reduction electrode are configured to, during discharge, oxidize the metal fuel at the fuel electrode and reduce the oxidant at the oxidant reduction electrode, to generate a discharge potential difference therebetween for application to a load.
US10826140B2
Provided are systems for vehicle energy storage having parallel cooling comprising a plurality of modules. Each module may comprise two half modules coupled together. Each half module can include a plurality of battery cells. A current carrier of each half module may be electrically coupled to the cells. The cells may be disposed between the current carrier and a plate. Each half module can have the cells, current carrier, and blast plate disposed in an enclosure. The enclosure can have a coolant sub-system for circulating coolant in parallel to the plurality of cells such that each of the battery cells is at approximately the same predetermined temperature. The modules may be disposed in a tray. A coolant system may be provided for circulating coolant across the plurality of modules in parallel such that each of the modules can be maintained at approximately the same predetermined temperature.
US10826134B2
The present disclosure relates to a battery module comprising: a plurality of single cells arranged in sequence; a sampling circuit board disposed opposite to a top of the single cells and provided with a conductive hole and a conductive sleeve disposed in the conductive hole; and a busbar having a connecting plate and a conductive post extending from the connecting plate, and the connecting plate being connected to the single cells, wherein the busbar is electrically connected to the sampling circuit board by insertion of the conductive post into the conductive sleeve. The battery module according to embodiments of the present disclosure includes a busbar and a sampling circuit board electrically connected with each other, which have a stable and reliable connection and a high impact resistance ability, thereby improving an operational reliability and safety of the battery module.
US10826133B2
An apparatus and method of keeping an energy storage cell at or above a target temperature, includes receiving at a processing circuit, an analog voltage that is proportional to a temperature of the energy storage cell, converting, at the processing circuit, the analog voltage to a pulse-width-modulated signal having a duty cycle that is proportional to the analog voltage, and driving a switch, with the pulse-width-modulated signal, between conductive and non-conductive states to modulate a voltage passing across (or a current flowing through) a heating element in series with the switch, the heating element being in thermal communication with the energy storage cell, wherein the duty cycle of the pulse-width-modulated signal is adjusted to maintain the temperature of the energy storage cell at or above the target temperature.
US10826131B2
The embodiments of present application provides an electrode assembly and a battery comprising a first current collector including a first end portion, a first bending segment, a first starting segment therebetween; a second current collector including a second end portion, a second bending segment, a second starting segment therebetween; the first and second bending segments are regions where the first and second current collectors are bent for the first time respectively, and a first and second electrode tabs are respectively arranged on the first and second starting segments, a distance between the first electrode tab and the first end portion is smaller than a distance between the first electrode tab and the first bending segment, a distance between the second electrode tab and the second end portion is greater than a distance between the second electrode tab and the second bending segment.
US10826128B2
A galvanic element is provided having a solid-state cell stack containing a multiplicity of electrochemical solid-state cells stacked along a longitudinal axis in a housing. Each of the electrochemical solid-state cells has a stack including at least one anode layer, at least one cathode layer and at least one solid electrolyte layer arranged between the anode layer and the cathode layer. At least one of the electrochemical solid-state cells includes an elastically deformable compensation element, which at least partly compensates for a change in volume along the longitudinal axis of the stacked electrochemical solid-state cells. A method for producing such galvanic elements is also provided. Advantageous applications are found in vehicles and mobile devices including such galvanic elements.
US10826125B2
The invention relates to a mono-nuclei cationized magnesium salt, a preparation method and applications thereof. The mono-nuclei cationized magnesium salt has a chemical formula of MgRnMX4-mYm, wherein R is a non-aqueous solvent molecule, M includes Al3+ and/or B3+, X and Y respectively include halide ion and halogenoid ion, n is any one integer selected in the range of 0˜6, and m is any one integer selected in the range of 0-4. The mono-nuclei cationized magnesium salt provided by the invention has a simple structure and excellent electrochemical properties, and the preparation method thereof features low cost, integrated synthesis, accessible raw materials, simple preparation process, and simple scaled production. The provided mono-nuclei cationized magnesium salt is used as the electrolyte of the rechargeable batteries, the generated electrolyte solution has a high ionic conductivity, a high reversible magnesium deposition-dissolution efficiency, excellent circulating performance and a high anode oxidation deposition potential. For example, when the electrolyte solution is applied to the magnesium batteries, the initial discharging capacity of the batteries can reach over 700 mAh/g, and the cycle number is greater than 20.
US10826120B2
The present invention discloses a Lithium ion battery and an electrolyte thereof, the electrolyte comprising an organic solvent, a lithium salt and an additive. The additive comprises additive (A) cyclic fluoro carbonate, additive (B) cyclic phosphazene (B), and additive (C) cyclic sulfate. The additive B cyclic phosphazene has the following general structural formula: Compared with the prior art, the electrolyte of the present invention may form a stable CEI and SEI film on the surface of positive and negative electrodes, protect the interface between positive and negative electrodes, improve the acidic atmosphere of Lithium ion battery electrolyte, and reduce the damage effect of HF on the interface between positive and negative electrodes, thereby improving cycle life, high temperature storage performance, and safety performance of lithium-ion battery.
US10826119B2
An electrochemical cell includes solid-state, printable anode layer, cathode layer and non-aqueous gel electrolyte layer coupled to the anode layer and cathode layer. The electrolyte layer provides physical separation between the anode layer and the cathode layer, and comprises a composition configured to provide ionic communication between the anode layer and cathode layer by facilitating transmission of multivalent ions between the anode layer and the cathode layer.
US10826105B2
An apparatus for separating battery plates comprising a work surface for receiving a stack of battery plates, and an alignment mechanism for aligning the battery plates on the work surface. The work surface is movable between a first position in which it is angled with respect to a horizontal plane and a second position in which it is substantially aligned with the horizontal plane. When the work surface moves between the first and second position adjacent battery plates of the stack are displaced relative to each other.
US10826104B2
A method for integrating a fuel cell unit into a vehicle structural component, includes determining an available receiving space in an interior structural component of the vehicle, providing two casing parts assembleable to a closed casing, providing a fuel cell having an anode, a cathode and an electrolyte, assembling the casing parts and the fuel cell to form the fuel cell unit, and inserting the fuel cell unit into the receiving space. A casing part is additively manufactured such that the fuel cell unit precisely fits into the receiving space. A casing part includes an exterior fuel inlet and an interior fuel distributor for leading a fuel from the inlet to a fuel outlet couplable with the fuel cell. A casing part includes an exterior oxidant inlet and an interior oxidant distributor for leading an oxidant from the inlet to an oxidant outlet couplable with the fuel cell.
US10826103B2
A fuel cell includes (1) a stack including (a) an assembly of overlaid electrochemical generators, which are disposed along a stack axis, and (b) end plates axially clasping the assembly, and (2) at least one holding winding. Each holding winding includes at least one taut wire wound around the stack in a plurality of turns. Each holding winding surrounds the stack and bears on the end plates. Each taut wire is formed of at least one layer or sheet, and ends of each taut wire are fixed on at least one of the end plates.
US10826099B2
A proton exchange composite membrane (PECM) and a method of synthesizing the membrane are disclosed. The PECM may include a PBI membrane doped with an acid, an imidazolium-based dicationic ionic liquid, and a mesoporous material. This PECM can be used as an improved high-temperature polymer electrolyte membrane (HT-PEM) fuel cell. The disclosed fuel cell can provide improved proton conductivity, acid uptake, and thermal stability.
US10826097B2
A fuel cell includes a power generating body including a membrane electrode assembly, a resin frame placed around the power generating body, and a pair of separators laminated on the resin frame so as to sandwich the power generating body and the resin frame. The resin frame has a resin-frame-side manifold in which reaction gas flows in a direction passing through the resin frame, an opening that holds the power generating body, and a gas introduction channel formed through the resin frame between the resin-frame-side manifold and the opening. Each separator has a separator-side manifold through which the reaction gas flows, and which is provided at a position corresponding to the resin-frame-side manifold in a lamination direction, and the gas introduction channel has a gas introduction part that extends into the separator-side manifold, when viewed in the lamination direction.
US10826090B2
A method for controlling a fuel cell system is a method for controlling a fuel cell system including a solid oxide fuel cell which generates a power upon receiving supplies of an anode gas and a cathode gas. The method for controlling the fuel cell system includes; as a stop control of the fuel cell, stopping a supply of the anode gas while continuing a supply of the cathode gas to the fuel cell, and shutting off a discharge side of an anode of the fuel cell; and carrying out an additional control to supply the anode gas to the fuel cell during the stop control and/or an additional control to decrease the flow rate of the cathode gas during the stop control.
US10826084B2
A fuel cell includes: a membrane electrode assembly; and a separator disposed on one side of the membrane electrode assembly, wherein the separator includes flow path grooves through which reactant gas flows between the separator and the membrane electrode assembly, the flow path grooves include: wavy grooves wavily extending in a first direction and arranged in a second direction orthogonal to the first direction; and a linear groove linearly extending in the first direction, the wavy grooves include: a first wavy groove located closest to the linear groove among the wavy grooves; and a second wavy groove located opposite to the linear groove with respect to the first wavy groove, and amplitude of the first wavy groove is smaller than that of the second wavy groove.
US10826081B2
Provided is a method for conveying a separator that ensures stably conveying a separator material without leaving an indentation or the like. The conveyance method conveys a separator material for use in a single cell of a fuel cell. A hydrogen gas and an air are supplied for the fuel cell to generate electricity. The separator material has a rectangular shape in a plan view of the separator material, and the separator material has both sides on which a pair of through-holes are formed at proximity of a pair of hydrogen distribution ports through which a hydrogen gas flows. The conveyance method includes, when the separator material is conveyed, inserting a conveyance pin into each of the through-holes formed on the separator material, and in a state where the conveyance pin is inserted in each of the through-holes, conveying the separator material while pulling the separator material in a direction in which the conveyance pins mutually separate.
US10826079B2
Provided is a separator for a fuel cell that can suppress a decrease in the power generation performance of the fuel cell by reducing the contact resistance of the separator. Specifically, provided is a separator for a fuel cell, the separator being adapted to be in contact with a MEGA (power generation portion) including a membrane electrode assembly of the fuel cell so as to separate the MEGA from a MEGA of an adjacent fuel cell, the separator including a metal substrate made of metal; and a tin oxide film covering a surface of the metal substrate on the side of the MEGA. The tin oxide film is made of tin oxide containing 1 to 10 atom % of aluminum.
US10826063B2
The present invention may improve the lifetime characteristics of a lithium secondary battery, and particularly, may provide a non-aqueous electrolyte solution or cathode including a phosphate-based compound which may exhibit stable and excellent lifetime characteristics at high temperature and high voltage regardless of the moisture content or the presence of a pressing process of the electrode.
US10826062B2
A primary battery includes a cathode having a non-stoichiometric metal oxide including transition metals Ni, Mn, Co, or a combination of metal atoms, an alkali metal, and hydrogen; an anode; a separator between the cathode and the anode; and an alkaline electrolyte.
US10826060B2
An alkaline electrochemical cell, preferably a zinc/air cell which includes a container; a negative electrode, a positive electrode, wherein said negative electrode and said positive electrode are disposed within the container, a separator located between the negative electrode and the positive electrode, and an alkaline electrolyte, wherein the negative electrode comprises zinc, and a branched chain fluorosurfactant. The fluorosurfactant is preferably a sulfotricarballylate surfactant with multiple fluorinated end groups.
US10826055B2
A turnover apparatus includes a first turnover portion, a second turnover portion, and a third turnover portion each including a convexly curved outer surface. An electrode foil is turned over as the electrode foil is transported along the outer surface of each of the first turnover portion, the second turnover portion, and the third turnover portion in this order. The first turnover portion, the second turnover portion, and the third turnover portion are integrally fixed. Each of the outer surfaces of the first turnover portion, the second turnover portion, and the third turnover portion defines a part of each side of a virtual triangle.
US10826053B2
A positive electrode for a rechargeable lithium battery, includes a current collector including pores on a surface thereof; and a positive active material layer on the current collector and including a positive active material, the positive active material including a lithium metal compound including primary particles and secondary particles including agglomerations of the primary particles, an average diameter of the pores of the current collector being greater than an average particle diameter (D50) of the primary particles and less than an average particle diameter (D50) of the secondary particles.
US10826052B1
Provided are an electrolytic copper foil, an electrode comprising the same, and a lithium ion cell comprising the same. The electrolytic copper foil comprises first and second chromium layers each containing 15 μg/dm2 to 50 μg/dm2 of chromium, and has a resistivity of 1.72 μΩ*cm to 2.25 μΩ*cm. First and second surfaces thereof each have a contact angle of 15 to 50 degrees with oxalic acid, the first surface has a lightness of 17.5 to 40 and the second surface has a lightness of 38 to 60. With these characteristics, the electrolytic copper foil has good weatherability and good adhesion strength with the active materials, thereby improving the cycle life of the lithium ion cell comprising the same.
US10826050B1
The present invention relates, in part, to methods of preparing a safety battery. Methods can include dispensing a safety ink formulation between the two poles of a battery. Upon exposure to moisture, the formulation provides an electrical connection between two poles, thus minimizing electrical discharge and/or reducing the formation of electrochemically generated ions at the pole(s).
US10826042B2
Provided are current carriers for vehicle energy-storage systems comprising: a positive power plane; a negative power plane; a dielectric isolation layer disposed between the positive power plane and the negative power plane; a plurality of positive contacts formed in the positive power plane, the positive contacts being for electrical coupling to a respective cathode terminal of each battery cell of a plurality of battery cells; and a plurality of negative contacts formed in the negative power plane, the negative contacts being for electrical coupling to a respective anode terminal of each battery cell of the plurality of battery cells.
US10826037B2
A vehicle-mounted battery apparatus to be mounted in a vehicle includes: a battery pack, the battery pack including a battery cell, the battery cell including a gas exhaust portion configured to discharge internal gas; a smoke exhaust duct connected to the battery pack and configured to discharge gas to an outside of the vehicle; and a check valve disposed in the smoke exhaust duct and configured to block flow of gas from the outside of the vehicle toward the battery pack. The check valve includes: a valve seat disposed in the smoke exhaust duct and having a hole; a valve body configured to be seated on the valve seat to cover the hole; and a shock absorbing member disposed between the valve body and the valve seat to alleviate impact of the valve body against the valve seat.
US10826030B2
A package structure of electronic modules includes two substrates and a sealing frame. The sealing frame comprises two first silicone frames, a second silicone frame and two crystalline interfaces. The sealing frame is disposed between and within the two substrates to form a space thereof. The sealing frame serves as an excellent moisture barrier of the package structure due to the intrinsic properties of silicone. Meanwhile, the silicone can withstand the corrosion of the polar solvents and/or the plasticizers. A manufacturing method of the package structure is disclosed in this invention as well.
US10826029B2
An energy storage device includes: an electrode assembly; a case accommodating the electrode assembly; a lid plate structure including a lid plate of the case, a current collector electrically connected to a tab provided at the electrode assembly, and an insulating member disposed between the lid plate and the current collector; and a first spacer disposed between an end provided with the tab of the electrode assembly and the lid plate and having a locked portion locked to part of the lid structure.
US10826027B2
An organic light-emitting diode (OLED) component includes a substrate; a pixel defining layer and a plurality of first electrodes over the substrate; an insulating layer correspondingly disposed over the pixel defining layer; a first light-emitting layer over each first electrode; and a charge generation layer over the first light-emitting layer. The plurality of first electrodes are physically separated from one another by the pixel defining layer. The insulating layer is configured to facilitate manufacturing of the OLED component, such that after formation of the charge generation layer without a mask, portions thereof positionally corresponding to any two adjacent first electrodes are physically separated by the insulating layer. The OLED component can be a white light organic light-emitting diode (WOLED) component including at least one other light-emitting layer in addition to the first light-emitting layer.
US10826026B2
A method for manufacturing a display device including forming a lower electrode on a substrate; depositing a first insulation layer thereon; forming a semiconductor layer that overlaps the lower electrode thereon; depositing a second insulation layer thereon; forming a gate electrode and an etching prevention layer that overlap the semiconductor layer thereon; depositing a third insulation layer thereon; forming a first conductor that overlaps the gate electrode thereon; depositing a fourth insulation layer thereon; forming a photosensitive film patterns thereon by depositing a photosensitive film and exposing and developing the photosensitive film such that portions of the photosensitive film are removed in a first area, a second area, and a third area; etching the third insulation layer using the patterns as an etching mask; etching the etching prevention layer by using the patterns as an etching mask; and etching the first insulation layer using the patterns as an etching mask.
US10826024B2
An organic light emitting diode lighting apparatus can include a substrate having an emitting area and first and second non-emitting areas; an auxiliary electrode in the first non-emitting area on the substrate; an overcoating layer in the emitting area on the substrate, the overcoating layer having a microlens including a plurality of convex portions and a plurality of concave portions; a first electrode on the auxiliary electrode and the overcoating layer, the first electrode including at least one open portion exposing the overcoating layer in the second non-emitting area; a gas blocking pattern covering the at least one open portion; and a light emitting layer and a second electrode disposed on the first electrode and the gas blocking pattern.
US10826021B2
An organic electroluminescence device according to one aspect of the disclosure includes a base material including a recessed portion on an upper face, and a light emitting element including a reflective layer, a filling layer having optical transparency, a first electrode having optical transparency, an organic layer including at least a light emitting layer, and a second electrode having optical transparency. The reflective layer is disposed at least on a surface of the recessed portion. The filling layer is disposed at an inside of the recessed portion with the reflective layer interposed between the recessed portion and the filling layer. The first electrode is disposed at least on an upper-layer side of the filling layer. The organic layer is disposed on an upper layer of the first electrode. The second electrode is disposed on an upper-layer side of the organic layer. The organic electroluminescence device includes a display region that is divided into a plurality of unit regions. The plurality of unit regions each having the light emitting element has a light emitting area and a transmissive area that are partitioned.
US10826017B2
The present disclosure provides a packaging assembly and a preparation method thereof, and a display device. The packaging assembly may include at least one of packaging unit; the at least one of packaging unit including a first inorganic layer, a second inorganic layer, and an organic layer sequentially stacked, wherein a material of the first inorganic layer and a material of the second inorganic layer are different. Holes inside the layers may be reduced, and a density of the layers may be increased. An effect of blocking the water vapor may be higher than that of a single layer, and a packaging effect may be better.
US10826009B2
A quantum dot light-emitting diode and a display apparatus comprising the quantum dot light-emitting diode are provided. The quantum dot light-emitting diode comprises an anode, a hole injecting layer, a hole transporting layer, a quantum dot light-emitting layer, an electron transporting layer and a cathode from bottom to top, wherein the materials of the quantum dot light-emitting layer contain quantum dots and CuSCN nano-particles. By blending quantum dots and CuSCN nano-particles into a membrane to prepare a quantum dot light-emitting layer, a hole trap state on the surface of the quantum dots is passivated, and the transporting effect of a hole is improved, so that the injection of holes in the quantum dot light-emitting diode and that of electrons achieve balance, and thus the light-emitting efficiency and stability are improved.
US10826008B2
A display device according to the present invention includes a substrate, and a plurality of pixels arranged in the substrate, wherein each of the plurality of pixels includes a light emitting element, a first transistor, a second transistor, a first insulation layer and a second insulation layer, the first transistor includes a first semiconductor layer, the second transistor includes a second semiconductor layer, the first insulation layer is arranged across the plurality of pixels between the first semiconductor layer and the second semiconductor layer, the second insulation layer is arranged between the first insulation layer and the second semiconductor layer, the first semiconductor layer is arranged on the substrate side sandwiching the first insulation layer with respect to the second semiconductor layer, the first insulation layer includes a silicon oxide layer; and the second insulation layer includes an aluminum oxide layer.
US10825988B2
A light-emitting material, a method for producing the light-emitting material and a display apparatus are provided. An average particle size of the light-emitting material is 0.1 μm to 30 μm, and an average distance between outermost quantum dots of a particle of the light-emitting material and a surface of the particle of the light-emitting material is 0.5 nm to 25 nm, or a minimum distance between the outermost quantum dots of a particle of the light-emitting material and the surface of the particle of the light-emitting material is 0.1 nm to 20 nm.
US10825987B2
Methods, systems, and devices for fabrication of memory cells are described. An electrode layer may have an initial thickness variation after being formed. The electrode layer may be smoothened prior to forming additional layers of a memory cell, thus decreasing the thickness variation. The subsequent layer fabricated may have a thickness variation that may be dependent on the thickness variation of the electrode layer. By decreasing the thickness variation of the electrode layer prior to forming the subsequent layer, the subsequent layer may also have a decreased thickness variation. The decreased thickness variation of the subsequent layer may impact the electrical behavior of memory cells formed from the subsequent layer. In some cases, the decreased thickness variation of the subsequent layer may allow for more predictable voltage thresholds for such memory cells, thus increasing the read windows for the memory cells.
US10825976B2
A thermoelectric device (20) and a method for manufacturing and using the same are disclosed. The thermoelectric device (20) includes a hot shoe (24) and a cold shoe (28) disposed about the hot shoe. A heat conducting member (32) formed of a thermoelectric material extends between the hot shoe (24) and the cold shoe (28) and generates electricity in response to a temperature difference therebetween. The hot shoe (24) is heated and expands at a greater rate than the cold shoe (28) does during operation. The structural and spatial relationship of the hot shoe (24) and the cold shoe (28) maintains the thermoelectric material of the heat conducting member (32) in compression during operation of the thermoelectric device (20).
US10825961B2
A method of producing an optoelectronic component includes providing a carrier, generating a plurality of recesses in the carrier, applying a plurality of drops of a cover material to the carrier, introducing an optoelectronic semiconductor chip including a semiconductor body and contact elements on an underside of the semiconductor body into at least some of the drops, and curing the drops of the cover material into cover bodies, wherein at least some of the drops are completely surrounded by recesses in the carrier, and the recesses in the carrier are a stop edge for the cover material during introduction of the optoelectronic semiconductor chip.
US10825952B2
An optoelectronic device includes a semiconductor substrate and a monolithic array of light-emitting elements formed on the substrate. The light-emitting elements include a first plurality of first emitters, configured to emit respective first beams of light with a first angular divergence, at respective first positions in the array, and a second plurality of second emitters, configured to emit respective second beams of light with a second angular divergence that is at least 50% greater than the first angular divergence, at respective second positions in the array.
US10825944B2
A device for converting electromagnetic radiation into electricity comprises an expander that includes a conical shape having an axis and a curved surface that is configured to reflect electromagnetic radiation away from the axis to expand a beam of the electromagnetic radiation; and one or more energy conversion components configured to receive a beam of electromagnetic radiation expanded by the expander, and to generate electricity from the expanded beam of electromagnetic radiation. With the expander's curved surface, a beam of electromagnetic radiation that is highly concentrated—has a large radiation flux—may be converted into a beam that has a larger cross-sectional area. Moreover, one can configure, if desired, the curved surface to provide a substantially uniform distribution of radiation across the expanded cross-sectional area. With such an expanded beam the one or more energy conversion components can efficiently convert some of the electromagnetic radiation into electricity.
US10825934B2
A vertical memory device may include a conductive pattern structure, a pad structure, a plurality of channel structures, a plurality of first dummy structures and a plurality of second dummy structures. The conductive pattern structure may be in a first region of a substrate, and may extend in a first direction. The pad structure may be in a second region of the substrate adjacent to each of opposite sides of the first region of the substrate, and may contact a side of the conductive pattern structure. The channel structures may extend through the conductive pattern structure, and may be regularly arranged on the substrate. The first dummy structures may extend through the conductive pattern structure, and may be disposed in a portion of the first region of the substrate adjacent to the second region thereof. The second dummy structures may extend through the pad structure on the substrate. Each of the channel structures may have a first width in the first direction, and each of the first dummy structures may have a second width in the first direction greater than the first width.
US10825928B2
A transistor circuit includes a transistor having a gate terminal and first and second conduction terminals, a first circuit configured to convert an AC input signal of the transistor circuit to a gate bias voltage and to apply the gate bias voltage to the gate terminal of the transistor, a second circuit configured to convert the AC input signal of the transistor circuit to a control voltage, and a switching circuit configured to apply a first voltage to the first conduction terminal of the transistor in response to the control voltage.
US10825919B2
A method of fabricating semiconductor devices is provided. The method includes forming a fin structure on a substrate, in which the fin structure includes a fin stack of alternating first and second semiconductor layers and forming recesses in the fin stack at source and drain regions. The method also includes etching the second semiconductor layers to form recessed second semiconductor layers, and forming third semiconductor layers on sidewalls of the recessed second semiconductor layers. The method further includes epitaxially growing source and drain structures in the recesses, removing the recessed second semiconductor layers to form spaces between the first semiconductor layers, and oxidizing the third semiconductor layers to form inner spacers. In addition, the method includes forming a gate structure to fill the spaces and to surround the first semiconductor layers.
US10825912B2
Systems and methods are described herein to include an epitaxial metal layer between a rare earth oxide and a semiconductor layer. Systems and methods are described to grow a layered structure, comprising a substrate, a first rare earth oxide layer epitaxially grown over the substrate, a first metal layer epitaxially grown over the rare earth oxide layer, and a first semiconductor layer epitaxially grown over the first metal layer.
US10825911B1
A transistor comprising a substrate, a gate electrode, a gate layer, a source electrode, a drain electrode, and semiconducting particles. The gate layer includes a dielectric material. A portion of the gate layer is sandwiched within the gap between the source electrode and the drain electrode. The gate layer also includes a plurality of semiconducting particles, and these semiconducting particles bridge the gap between the source electrode and the drain electrode. The major axis of each semiconducting particle is oriented in a direction normal to the device. In some embodiments, the particles are flake shaped. In some embodiments, the particles are dichalcogenide chemicals.
US10825903B2
Assuming that one or more defects satisfying relations of Formula 1 and Formula 2 are first defects, and one or more defects satisfying relations of Formula 3 and Formula 2 are second defects, where an off angle is θ°, the thickness of a silicon carbide layer in a direction perpendicular to a second main surface is W μm, the width of each of the one or more defects in a direction obtained by projecting a direction parallel to an off direction onto the second main surface is L μm, and the width of each of the one or more defects in a direction perpendicular to the off direction and parallel to the second main surface is Y μm, a value obtained by dividing the number of the second defects by the sum of the number of the first defects and the number of the second defects is greater than 0.5.
US10825899B2
A method of fabricating a semiconductor device includes forming a fin structure on a substrate, forming a channel layer on a sidewall and a top surface of the fin structure, and forming a gate stack over the channel layer. The channel layer includes a two-dimensional (2D) material. The gate stack includes a ferroelectric layer.
US10825894B2
Provided are MIM capacitor and method of manufacturing the same. The MIM capacitor includes a first electrode, a second electrode, a third electrode, a first insulating layer, a second insulating layer, and a first spacer. The first electrode and the third electrode are electrically connected to each other. The first insulating layer is between the first electrode and the second electrode. The second insulating layer is between the second electrode and the third electrode. The first spacer is located between a sidewall of the first electrode and the first insulating layer.
US10825892B2
A method includes forming a capacitor, which includes depositing a bottom electrode layer, depositing a capacitor insulator layer over the bottom electrode layer, depositing a top electrode layer over the capacitor insulator layer, and depositing a dielectric layer over the top electrode layer. The dielectric layer is etched using a process gas until the top electrode layer is exposed. In the etching of the dielectric layer, the dielectric layer has a first etching rate, and the top electrode layer has a second etching rate, and a ratio of the first etching rate to the second etching rate is higher than about 5.0.
US10825887B2
The present invention discloses a flexible display panel, a flexible display device and a method of manufacturing the flexible display panel, the metal patterns of the bent region of the flexible display panel of the present invention has a double-layer structure, and the second metal layer pattern is designed with a wavy pattern, which can reduce the stress on the metal layer patterns during pad bending process, decrease the breakage probability of metal layer patterns in the bent region of the flexible display, and ensure the resistance stability of the metal layer patterns. Furthermore, the connection portion between the first metal layer pattern and the second metal layer pattern can improve the reliability, reduce the abnormal probability of display caused by the pattern breakage, and ensure normal signal transmission.
US10825885B2
A display apparatus includes: a substrate including a display area and a peripheral area adjacent to the display area; a first and a second organic insulating layer each on the substrate; in the display area: a thin film transistor on the substrate; a driving voltage line connected to the thin film transistor and between the first and second organic insulating layers; and a display device connected to the thin film transistor, the first organic insulating layer and the second organic insulating layer being between the display device and the thin film transistor; and in the peripheral area, a common power supply wiring on the substrate and through which a common voltage is supplied to the display device in the display area. The common power supply wiring in the peripheral area and the driving voltage line in the display area are respectively portions of a same first material layer on the substrate.
US10825884B2
A display panel and a display device are provided. The display panel includes a base substrate; a plurality of gate lines extending in a row direction and a plurality of data lines extending in a column direction arranged on the base substrate, and the plurality of gate lines and the plurality of data lines intersect in an insulation manner to define a plurality of pixel circuit regions including a plurality of pixel circuits; a plurality of sub-pixel regions arranged on the base substrate, and each of the plurality of sub-pixel regions includes a light-emitting element, a corresponding one of the plurality of pixel circuits provides a driving signal to the light-emitting element, and the light-emitting element includes an anode, a light-emitting layer and a cathode which are sequentially stacked at a side of the base substrate; and a plurality of light-emitting control signal lines arranged on the base substrate.
US10825881B2
An array substrate, including a pattern recognition layer, a light-shielding layer, and a plurality of light-emitting devices. The pattern recognition layer is disposed on a side of the light-shielding layer away from the plurality of light-emitting devices. The light-shielding layer shields at least one of the multi-primary colored lights emitted by the light-emitting devices. The light-shielding layer has a plurality of imaging holes located in the display area. The orthographic projections of the plurality of imaging holes and the plurality of light-emitting devices on the plate surface of the base substrate are independent from each other. The pattern recognition layer includes a plurality of sensor units. The orthographic projections of the plurality of imaging holes on the plate surface of the base substrate are located in the orthographic projections of the plurality of the sensor units on the plate surface of the base substrate in a one-to-one correspondence manner.
US10825877B2
Provided is an electroluminescence display device including, on a substrate, a plurality of pixels having a light emitting layer made of an electroluminescent material obtained by adding a dopant to a host material, and a bank that separates the adjacent pixels and has been subjected to bleaching processing, in which within the plane of the substrate, the concentration of the dopant in the light emitting layer is distributed and the intensity of the bleaching processing performed on the bank is distributed.
US10825874B2
A display device has a first region and a second region, the display device including a substrate, a display portion on the substrate, a first base layer on the display portion and corresponding to the first region, a plurality of first optical functional particles inside the first base layer at a first concentration and having chromatic color, a second base layer on the display portion and corresponding to the second region, and a plurality of second optical functional particles inside the second base layer at a second concentration that is higher than the first concentration and having chromatic color.
US10825873B2
Disclosed are an organic light emitting display having a touch sensor, which may achieve process simplification and cost reduction, and a method of fabricating the same. The organic light emitting display includes a compensation film having a flat surface and formed to cover dams forming a boundary with an organic encapsulation layer and the compensation film has a planarized surface between a region above the dams and a boundary region between the dams and the organic encapsulation layer (144) and may prevent cut and short-circuit of routing lines cutting across the same. Further, touch sensors are disposed on an encapsulation unit including the organic encapsulation layer and thus a separate attachment process is not required, thereby simplifying the overall process and reducing manufacturing costs of the organic light emitting display.
US10825857B2
Provided are a pixel of an uncooled infrared focal plane detector and a preparation method therefor. The pixel includes a structure of three layers sequentially located on a semiconductor substrate from bottom to top. The first layer is a bridge structure including a metal reflection layer, an insulation dielectric layer, a first supporting layer, a first support layer protection layer, a first metal electrode layer and a first silicon nitride dielectric layer. The second layer is a thermal conversion structure including a second support layer, a second support layer protection layer, a thermal sensitive layer, a thermal sensitive layer production layer, a second metal electrode layer and a second silicon nitride dielectric layer. The third layer is an absorption structure including a third support layer, an absorption layer and an absorption layer protection layer.
US10825855B2
Bending a flexible x-ray detector to image a curved structure or object will distort the object appearance when compared to an image captured by a flat/rigid detector. An image distortion of this type can be corrected when the shape (relative bend position) of the x-ray detector is known. Incorporating strain sensors on the flexible x-ray detector makes it possible to record the local bend of the flexible x-ray detector when an image is taken. This shape information can be used to either label or correct for the image distortions created by bending the x-ray detector to assist users more accustomed to viewing images produced by flat/rigid x-ray detectors.
US10825851B2
A sensor package structure includes a substrate, a sensor chip disposed on the substrate, a plurality of metal wires electrically connecting the substrate and the sensor chip, a glass cover disposed on the sensor chip, and an adhesive layer connecting the glass cover to the substrate. The substrate is made of a material having a coefficient of thermal expansion (CTE) that is less than 10 ppm/° C. The glass cover includes a board body and an annular supporting body connected to the board body. The annular supporting body of the glass cover is fixed onto the substrate through the adhesive layer, so that the glass cover and the substrate jointly surround an enclosed accommodating space. The sensor chip and the metal wires are arranged in the accommodating space, and the sensing region of the sensor chip faces the light-permeable portion of the board body.
US10825844B2
A transistor array substrate includes a substrate (having a first trench), a gate electrode (in the first trench), an insulating film, a gate line, a data line, a source electrode, and a drain electrode. The insulating film includes second, third, fourth, fifth, and sixth trenches. The gate line is in the second trench and is not parallel to the data line. The data line includes a first section and a second section that are separated by the gate line and respectively in the third and fourth trenches. The source electrode and the drain electrode are respectively in the fifth and sixth trenches. The source electrode is electrically connected to the data line. The gate electrode is electrically connected to the gate line.
US10825841B2
A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.
US10825834B1
A 3-dimensional vertical memory string array includes high-speed ferroelectric field-effect transistor (FET) cells that are low-cost, low-power, or high-density and suitable for SCM applications. The memory circuits of the present invention provide random-access capabilities. The memory string may be formed above a planar surface of substrate and include a vertical gate electrode extending lengthwise along a vertical direction relative to the planar surface and may include (i) a ferroelectric layer over the gate electrode, (ii) a gate oxide layer; (iii) a channel layer provided over the gate oxide layer; and (iv) conductive semiconductor regions embedded in and isolated from each other by an oxide layer, wherein the gate electrode, the ferroelectric layer, the gate oxide layer, the channel layer and each adjacent pair of semiconductor regions from a storage transistor of the memory string, and wherein the adjacent pair of semiconductor regions serve as source and drain regions of the storage transistor.
US10825829B2
A semiconductor memory device includes wirings arranged in parallel along a first direction, the wirings including first and second wirings that are adjacent and a third wiring adjacent to the second wiring, a first pillar between the first and second wirings and a second pillar between the second and third wirings, the first and second pillars each extending in a second direction crossing the first direction toward the semiconductor substrate, and first and second bit lines connected to the first and second pillars, respectively. A first voltage is applied to the second wiring during a program operation on a first memory cell at an intersection of the second wiring and the first pillar, and a second voltage higher than the first voltage is applied to the second wiring during a program operation on a second memory cell at an intersection of the second wiring and the second pillar.
US10825823B1
The present disclosure provides a semiconductor chip. The semiconductor chip includes a substrate, a main device, a one-time-programmable (OTP) device and a decoupling capacitor array. The substrate includes a first region and a second region. The main device is in the first region, the OTP device and the decoupling capacitor array are in the second region, and the decoupling capacitor array overlies the OTP device.
US10825811B2
A method, FET structure and gate cut structure are disclosed. The method forms a gate cut opening in a dummy gate in a gate material layer, the gate cut opening extending into a space separating a semiconductor structures on a substrate under the gate material layer. A source/drain region is formed on the semiconductor structure(s), and a gate cut isolation is formed in the gate cut opening. The gate cut isolation may include an oxide body. During forming of a contact, a mask has a portion covering an upper end of the gate cut isolation to protect it. The gate cut structure includes a gate cut isolation including a nitride liner contacting the end of the first metal gate conductor and the end of the second metal gate conductor, and an oxide body inside the nitride liner.
US10825807B2
An electrostatic protection circuit, an array substrate, a display panel and a display device are disclosed. The electrostatic protection circuit is located within a peripheral region of an array substrate and includes: a first ground wire provided in a same layer as a source electrode and a drain electrode of a thin film transistor located within a display region of the array substrate; and a second ground wire provided in a same layer as a gate electrode of the thin film transistor, wherein, the first ground wire forms a first loop with a printed circuit board provided within the peripheral region, the first loop surrounds the display region; the second ground wire forms a second loop with the printed circuit board, and the second loop surrounds the display region.
US10825797B2
A device includes a semiconductor die. The semiconductor die has formed thereon a plurality of multi-phase voltage regulator modules of the same design formed on a common semiconductor substrate.
US10825793B2
This invention relates to a method for bonding of a first contact surface of a first substrate to a second contact surface of a second substrate with the following steps, especially the following sequence: forming a reservoir in a surface layer on the first contact surface, the first surface layer consisting at least largely of a native oxide material, at least partial filling of the reservoir with a first educt or a first group of educts, the first contact surface making contact with the second contact surface for formation of a prebond connection, forming a permanent bond between the first and second contact surface, at least partially strengthened by the reaction of the first educt with a second educt contained in a reaction layer of the second substrate.
US10825790B2
[Object] To provide a semiconductor protective film capable of suppressing a warpage of a semiconductor chip without impairing productivity and reliability, a semiconductor device including this, and a composite sheet.[Solving Means] A semiconductor protective film 10 according to an embodiment of the present invention includes a protective layer 11 formed of a non-conductive inorganic material and an adhesive layer 12 provided on one surface of the protective layer 11. The protective layer 11 includes at least a vitreous material and is typically formed of plate glass. Accordingly, a warpage of a semiconductor element as a protection target can be suppressed effectively.
US10825789B1
One embodiment of a packaged semiconductor device includes: a redistributed layer (RDL) structure formed over an active side of a semiconductor die embedded in mold compound, the RDL structure includes a plurality of solder ball pads that in turn includes: a set of first solder ball pads located on a front side of the packaged semiconductor device within a footprint of the semiconductor die, and a set of second solder ball pads located on the front side of the packaged semiconductor device outside of the footprint of the semiconductor die, each first solder ball pad includes a first center portion having a first diameter measured between opposite outer edges of the first center portion, each second solder ball pad includes a second center portion having a second diameter measured between opposite outer edges of the second center portion, and the first diameter is smaller than the second diameter.
US10825786B2
A method for fabricating a chip scale package, comprising: providing a wafer; applying a polymer resin on at least part of a first surface of the wafer and to one or more sides of the wafer; and applying a compression mold on at least part of a second surface of the wafer and to one or more sides of the wafer, said first and second surfaces opposing each other.
US10825779B2
A 3D semiconductor device and structure, the device including: a first die including first transistors and first interconnect, overlaid by a second die including second transistors and second interconnect, where the first die has a first die area and the second die has a second die area, where the first die area is at least 10% larger than the second die area, where the second die is aligned to the first die with less than 400 nm alignment error, where second die includes an array of memory cells, and where the first die includes decoders for the array.
US10825776B2
A semiconductor package includes a first plate having a through hole therein, at least one interconnection layer disposed on a first surface of the first plate, and at least one semiconductor chip disposed on the at least one interconnection layer in a space defined by the through hole and electrically connected to the least one interconnection layer. The package further includes a second plate disposed on the at least one semiconductor chip and a second surface of the first plate on a side of the first plate opposite the first surface, and at least one conductive pad disposed on the second surface of the first plate and electrically connected to the at least one interconnection layer.
US10825773B2
A package structure includes an insulating encapsulation, at least one semiconductor die, a redistribution circuit structure, and first reinforcement structures. The at least one semiconductor die is encapsulated in the insulating encapsulation. The redistribution circuit structure is located on the insulating encapsulation and electrically connected to the at least one semiconductor die. The first reinforcement structures are embedded in the redistribution circuit structure. A shape of the package structure includes a polygonal shape on a vertical projection along a stacking direction of the insulating encapsulation and the redistribution circuit structure, and the first reinforcement structures are located on and extended along diagonal lines of the package structure.
US10825764B2
A semiconductor device has a first semiconductor die and second semiconductor die with a conductive layer formed over the first semiconductor die and second semiconductor die. The second semiconductor die is disposed adjacent to the first semiconductor die with a side surface and the conductive layer of the first semiconductor die contacting a side surface and the conductive layer of the second semiconductor die. An interconnect, such as a conductive material, is formed across a junction between the conductive layers of the first and second semiconductor die. The conductive layer may extend down the side surface of the first semiconductor die and further down the side surface of the second semiconductor die. An extension of the side surface of the first semiconductor die can interlock with a recess of the side surface of the second semiconductor die. The conductive layer extends over the extension and into the recess.
US10825763B2
A power module of double-faced cooling includes: an upper substrate; a lower substrate on which a plurality of semiconductor chips are disposed; and a first spacer disposed between the upper substrate and the lower substrate, electrically connecting the upper substrate and the lower substrate to each other, and disposed on the lower substrate to be equally distanced from each of the semiconductor chips. Power is supplied to the semiconductor chips on the lower substrate through the upper substrate and the first spacer.
US10825757B2
Various example embodiments concern an integrated circuit (IC) package having a clip with a protruding tough-shaped finger portion. The clip can be used in various IC packages including, for example, soft-soldered compact power packages such as rectifiers with specified surge current capability. Such embodiments can be implemented to allow for a visual inspection capability of the soldering area for connecting a lead frame, via the clip, to a surface of the IC package die, while still providing sufficient thermal mass to limit the temperature increase during forward surge current loads. This results in a simple to manufacture design without compromising too much on performance.
US10825756B2
According to one embodiment, a semiconductor device includes a semiconductor chip, and a die pad. The die pad has a first surface. The semiconductor chip is bonded on the first surface using a paste including a metal particle. A concave structure is provided in the first surface. The concave structure is positioned directly under each of a plurality of sides of the semiconductor chip and extends along each of the plurality of sides.
US10825751B2
In semiconductor device, a substrate unit includes an insulating substrate, a first conductor substrate and a second conductor substrate which are disposed on one main surface of the insulating substrate and spaced apart from each other, and a third conductor substrate which is disposed on the other main surface opposite to the one main surface of the insulating substrate. A terminal is connected to a surface of a semiconductor element opposite to the first conductor substrate. The terminal extends from a region above the semiconductor element to a region above the second conductor substrate while being connected to the second conductor substrate. At least a part of the terminal, the substrate unit and the semiconductor element is sealed by a resin. The third conductor substrate is exposed from the resin.
US10825741B2
One illustrative IC product disclosed herein includes an isolation structure that separates a fin into a first fin portion and a second fin portion, an epi semiconductor material positioned on the first fin portion in a source/drain region of a transistor device, wherein a lateral gap is present between a first sidewall of the epi semiconductor material and a second sidewall of the SDB isolation structure, and a conductive source/drain structure that is conductively coupled to the epi semiconductor material, wherein a gap portion of the conductive source/drain structure is positioned in the gap and physically contacts the first sidewall and the second sidewall.
US10825735B2
A semiconductor structure and a method for fabricating the semiconductor structure are provided. The method includes providing a substrate. The substrate includes an active region and a blank region disposed adjacent to the active region. The method also includes forming a fin material layer on the substrate. Further, the method includes forming a plurality of fins on the active region, and a plurality of dummy fins on the blank region by etching the fin material layer. A spacing between a fin and an adjacent dummy fin is greater than a spacing between adjacent fins.
US10825733B2
Multiple wide bandgap semiconductor wafers, each having active circuitry and an epitaxially formed backside drain contact layer, may be constructed from a single bulk semiconductor substrate by: forming foundational layers on the top of the bulk substrate via epitaxy; forming active circuitry atop the foundational layers; laser treating the backside of the bulk substrate to create a cleave line in one of the foundational layers; and exfoliating a semiconductor wafer from the bulk substrate, where the exfoliated semiconductor wafer contains the active circuits and at least a portion of the foundational layers. Wafers containing the foundational layers without complete active devices may be produced in a similar manner. The foundational layers may comprise a drain contact layer and a drift layer, and may additionally include a buffer layer between the drain contact layer and the drift layer.
US10825728B2
A method is provided for producing at least one electrical via in a substrate, the method comprising: producing a protective layer over a component structure which has been produced or is present on a front side of the substrate; forming at least one contact hole which extends from a surface of a backside of the substrate to a contact surface of the component structure; forming a metal-containing and thus conductive lining in the at least one contact hole creating a hollow electrically conductive structure in the at least one contact hole; and applying a passivation layer over the backside of the substrate, the passivation layer spanning over the hollow electrically conductive structure for forming the at least one electrical via. Also provided is a micro-technical component comprising at least one electrical via.
US10825726B2
A method and structure of forming an interconnect structure with a sidewall image transfer process such as self-aligned double patterning to reduce capacitance and resistance. In these methods and structures, the spacer is a metal.
US10825724B2
A semiconductor device and method of formation are provided. The semiconductor device comprises a silicide layer over a substrate, a metal plug in an opening defined by a dielectric layer over the substrate, a first metal layer between the metal plug and the dielectric layer and between the metal plug and the silicide layer, a second metal layer over the first metal layer, and an amorphous layer between the first metal layer and the second metal layer.
US10825721B2
A semiconductor device structure is provided. The semiconductor device structure includes a gate stack formed over a semiconductor substrate, a source/drain contact structure laterally adjacent to the gate stack, and a gate spacer formed between the gate stack and the source/drain contact structure. The semiconductor device structure also includes a first insulating capping feature covering the upper surface of the gate stack, a second insulating capping feature covering the upper surface of the source/drain contact structure, and an insulating layer covering the upper surfaces of the first insulating capping feature and the second insulating capping feature. The second insulating capping feature includes a material that is different from the material of the first insulating capping feature. The semiconductor device structure also includes a via structure passing through the insulating layer and the first insulating capping feature and electrically connected to the gate stack.
US10825717B1
A method for reducing transistor sensitivity to shallow trench isolation defects (STI) includes filling a trench formed in a substrate of a semiconductor device, at least partially, with a first oxide, the trench defines an STI and includes a defect extending from the substrate. A mask defines a planar area within the isolation region including a first lateral distance between an edge of the mask and an edge of the isolation region. The first oxide is at least partially removed beneath the planar area with an oxide etch to expose a top portion of the defect. The top portion of the defect is removed with a semiconductor etch. After removing the top portion of the defect, the trench is at least partially filled with a second oxide. A field plate of a split-gate transistor is formed over the STI.
US10825716B2
An embodiment of a method for manufacturing a semiconductor device includes: providing a monocrystalline semiconductor substrate having a first side; forming a plurality of recess structures in the semiconductor substrate at the first side; filling the recess structures with a dielectric material to form dielectric islands in the recess structures; forming a semiconductor layer on the first side of the semiconductor substrate to cover the dielectric islands; and subjecting the semiconductor layer to heat treatment and recrystallizing the semiconductor layer to form a recrystallized semiconductor layer, so that a crystal structure of the recrystallized semiconductor layer adapts to a crystal structure of the semiconductor substrate, and so that the semiconductor substrate and the semiconductor layer together form a compound wafer with the dielectric islands at least partially buried in the semiconductor material of the compound wafer.
US10825715B2
Structures and processes for improving radiation hardness and eliminating latch-up in integrated circuits are provided. An example process includes forming a first doped buried layer, a first well, and a second well, and using a first mask, forming a second doped buried layer only in a first region above the first doped buried layer and between at least the first well and the second well, where the first mask is configured to control spacing between the wells and the doped buried layers. The process further includes using a second mask, forming a vertical conductor located only in a second region above the first region and between at least the first well and the second well, where the vertical conductor is doped to provide a low resistance link between the second doped buried layer and at least a top surface of the substrate.
US10825711B2
The sheet for semiconductor processing of the present invention includes a base, an unevenness-absorbing layer provided on one surface of the base, and a pressure sensitive adhesive layer provided on the unevenness-absorbing layer, wherein the pressure sensitive adhesive layer is composed of an energy ray-curable pressure sensitive adhesive, and a stress at rupture of the pressure sensitive adhesive layer after energy ray curing is 10 MPa or more.
US10825704B1
A chip transferring machine includes a chip carrier, a chip transferring module, and a chip carrier substrate. The chip carrier carries a plurality of chips. The chip transferring module includes at least one conveyor belt having an adhesive surface. The chip carrier substrate carries the plurality of chips. The chip carrier, the chip transferring module, and the chip carrier substrate are disposed on a same production line, and the chip carrier and the chip carrier substrate are disposed under or above the adhesive surface of the conveyor belt.
US10825703B2
A particle detection device includes a chuck stage on which a wafer is configured to be seated, first and second adsorption holes shaped as closed concentric curves passing through the chuck stage, a first adsorption module connected to the first adsorption hole under the chuck stage and configured to provide a vacuum pressure, a second adsorption module connected to the second adsorption hole under the chuck stage and configured to provide a vacuum pressure, a pressure gauge configured to measure vacuum pressures of the first and second adsorption holes and a detection module configured to receive the vacuum pressures of the first and second adsorption holes from the pressure gauge and detect whether the wafer is fixed or not and whether particle is present or not, based on the received vacuum pressures. The first and second adsorption modules sequentially provide the vacuum pressure to the first and second adsorption holes.
US10825700B2
The invention provides a plasma processing apparatus which includes a processing chamber, a radio frequency power source to supply a radio frequency power for plasma generation, a sample stage equipped with an electrostatic chuck electrode of a sample, a DC power source to apply a DC voltage to the electrode, and a control unit to change the DC voltage from a predetermined value to almost 0 V when a predetermined time elapses since the supplying of the radio frequency power is stopped. The predetermined value is a predetermined value indicating that a potential of the sample when the DC voltage is almost 0 V becomes almost 0 V. The predetermined time is a time defined on the basis of a time when charged particles generated by the plasma processing disappear or a time when an afterglow discharge disappears.
US10825699B2
Disclosed are a standby port and a substrate processing apparatus having the same. The standby port exhausts fumes generated when a processing liquid is discharged into the standby port before the supply of the processing liquid onto a substrate, thereby preventing pollution of a chamber atmosphere.
US10825697B2
There is installed a configuration that includes a process container; a heater chamber exhaust duct configured to discharge an air that has cooled a space at which a heater is installed; a gas box exhaust duct configured to suck and discharge an atmosphere in a gas box; a scavenger exhaust duct configured to suck and discharge an atmosphere in a scavenger; a local exhaust duct configured to suck and discharge an atmosphere in a local exhaust port installed in a transfer chamber; an exhaust damper valve including an opening degree variable mechanism installed in at least one selected from the group of the heater chamber exhaust duct, the gas box exhaust duct, the scavenger exhaust duct, and the local exhaust duct; and a controller configured to remotely control an opening degree of the exhaust damper valve.
US10825695B2
A method of manufacturing a light emitting device includes mounting an element set on a support substrate. The element set includes an element substrate and a plurality of light emitting elements on the element substrate. Each of the light emitting elements includes a semiconductor layered body having a surface and a pair of electrodes formed on the semiconductor layered body surface. A light reflecting member is provided between the element set and the support substrate. The element substrate is removed from the plurality of light emitting elements.
US10825693B2
An embodiment method of forming a package-on-package (PoP) device includes temporarily mounting a substrate on a carrier, stacking a first die on the substrate, at least one of the die and the substrate having a coefficient of thermal expansion mismatch relative to the carrier, and stacking a second die on the first die. The substrate may be formed from one of an organic substrate, a ceramic substrate, a silicon substrate, a glass substrate, and a laminate substrate.
US10825687B2
The polishing liquid according to the embodiment comprises abrasive grains, an additive and water, wherein the abrasive grains include a tetravalent metal element hydroxide, and produce a liquid phase with a nonvolatile content of 500 ppm or greater when an aqueous dispersion with a content of the abrasive grains adjusted to 1.0 mass % has been centrifuged for 50 minutes at a centrifugal acceleration of 1.59×105 G.
US10825685B2
A method for treating a silicon substrate, and a silicon substrate, provide a surface treated with an accelerated neutral beam.
US10825683B2
A method for directing a self-assembly of a block copolymer comprising a first and a second block is provided. The method including: providing a substrate comprising at least one concavity therein, the concavity comprising at least a sidewall and a bottom, the bottom having a preferential wetting affinity for the second block with respect to the first block; grafting a first grafting material onto the sidewall, selectively with respect to the bottom, the first grafting material having a preferential wetting affinity for the first block with respect to the second block; grafting a second grafting material onto the bottom and optionally onto the sidewall, the second grafting material having a preferential wetting affinity towards the first block with respect to the second block; and providing the block copolymer on the substrate, at least within the at least one concavity.
US10825681B2
Provided are an improved memory device and a method of manufacturing the same. In one embodiment, the memory device may include a vertical stack of alternating oxide layer and nitride layer, the vertical stack having a channel region formed therethrough, a plurality of nanostructures selectively formed on nitride layer of the vertical stack, and a gate oxide layer disposed on exposed surfaces of the channel region, the gate oxide layer encapsulating the plurality of nanostructures formed on the nitride layer. The nanostructures may be a group IV semiconductor compound such as silicon germanium (SiGe).
US10825679B2
Methods and apparatuses for selectively depositing silicon oxide on surfaces relative to a metal-containing surface such as copper are provided. Methods involve exposing a substrate having hydroxyl-terminated or dielectric surfaces and copper surfaces to a copper-blocking reagent such as an alkyl thiol to selectively adsorb to the copper surface, exposing the substrate to a silicon-containing precursor for depositing silicon oxide, exposing the substrate to a weak oxidant gas and igniting a plasma, or water vapor without plasma, to convert the adsorb silicon-containing precursor to form silicon oxide. Some methods also involve exposing the substrate to a reducing agent to reduce any oxidized copper from exposure to the weak oxidant gas.
US10825677B2
A method of mass spectrometry is disclosed comprising: applying voltages to a mass filter or ion trap such that it is capable of transmitting or ejecting ions having mass to charge ratios within separate first and second mass to charge ratio windows; varying said voltages with time such that the first and second windows are moved simultaneously across different ranges of mass to charge ratio; detecting ions transmitted or ejected in the windows, or ions derived therefrom, with an ion detector; and deconvolving the resulting ion signal, wherein said deconvolving comprises: a) modelling an ion signal expected to be detected at the detector; b) comparing the model signal to the ion signal from the detector; and c) determining if the model signal matches the ion signal from the detector.
US10825651B2
Techniques are described that facilitate automated extraction of lamellae and attaching the lamellae to sample grids for viewing on transmission electron microscopes. Some embodiments of the invention involve the use of machine vision to determine the positions of the lamella, the probe, and/or the TEM grid to guide the attachment of the probe to the lamella and the attachment of the lamella to the TEM grid. Techniques that facilitate the use of machine vision include shaping a probe tip so that its position can be readily recognized by image recognition software. Image subtraction techniques can be used to determine the position of the lamellae attached to the probe for moving the lamella to the TEM grid for attachment. In some embodiments, reference structures are milled on the probe or on the lamella to facilitate image recognition.
US10825646B2
A positioning system can include a guide, a carrier element configured to engage and convey a workpiece, a motor having a mover element, a restraint coupled to the carrier element, and an actuator disposed between the restraint and the carrier element. The guide can be movable relative to a horizontal reference plane such that the carrier element coupled to the guide is inclined with respect to the horizontal reference plane. At least the mover element of the motor can be coupled to the carrier element and can be configured to move the carrier element along the guide. The restraint can be configured to selectively engage the guide to restrain movement of the carrier element in at least one direction along the guide when the guide is inclined out of the horizontal reference plane. The actuator can be configured to displace the carrier element relative to the restraint along the guide when the restraint is engaged with the guide.
US10825643B2
The present application discloses an accelerator system for mineral component analysis and system and method for mineral component analysis. The accelerator system includes an electron gun for generating an electron beam; an accelerating tube for accelerating an electron beam emitted by the electron gun to a predetermined energy; a composite target for generating a radioactive ray on the composite target after receiving bombardment of the electron beam; and a shielding mechanism for shielding the radioactive ray.
US10825629B2
A carrier body for a relay comprises a base body, a coil carrier, and a contact mount. The base body is monolithically formed with the coil carrier and the contact mount. The coil carrier and the contact mount extend from the base body.
US10825623B1
A rocker assembly structure includes a pedestal having a base portion, and a keycap. A bottom wall of the accommodating groove protrudes upward to form a rod portion. Several portions of a peripheral surface of the rod portion are recessed inward to form a plurality of first guiding grooves. A lower portion of an inner wall of each first guiding groove is recessed inward to form a buckling slot. A front of the peripheral surface of the rod portion is further recessed inward to form a second guiding groove. The keycap covers the rod portion. Several portions of an inner wall of the keycap protrudes inward to form a plurality of buckling blocks. The plurality of the buckling blocks are disposed in the buckling slots of the plurality of the first guiding grooves and the second guiding groove.
US10825609B2
A multilayer ceramic capacitor includes a laminated body, and an external electrode on both end surfaces of the laminated body. The external electrode includes a base electrode layer, a conductive resin layer on the base electrode layer, and a plating layer on the conductive resin layer. The amount of a curvature radius along a boundary portion between the base electrode layer and the conductive resin layer the boundary between the base electrode layer and the conductive resin layer at the ridge line of the laminated body is about 296.6 μm or more, the long side length in terms of flattened powder value is about 10.3 μm or more, the solid content concentration of PVC in the conductive resin layer is about 45 vol % or higher and about 60 vol % or lower, and the thickness of the conductive resin layer located at the ridge line is about 11.7 μm or more.
US10825585B2
A superconductive conductor and method of using the superconductive conductor is described. The superconductive conductor includes a plurality of first conductive strips with a first width and a plurality of second conductive strips with a second width, and a strip stack formed from the first and second conductive strips that has a cruciform-shaped cross section.
US10825584B2
A downhole logging cable includes a core conductor unit and a core optical unit. The core conductor unit may include a conductor and a jacket which surrounds and contacts the conductor. At least one metal tube may surround the core conductor unit and core optical unit, such that the core conductor unit and core optical unit are disposed in an interior of the at least one metal tube. A filler may be provided in the interior surrounding the core conductor unit and core optical unit.
US10825580B2
Described herein are foamable compositions and methods of making foamed compositions. The foamable composition comprises at least one polymer and a foaming agent. The foaming agent comprises a talc or a talc derivative. The polymers described herein comprise a substantially non-halogenated polymer. One or more additives are added to render the compositions flame retardant and/or smoke suppressant. Also described are Power over Ethernet (PoE) cables, having at least one electrical conduit comprising an electrically conductive core, an insulation that at least partially surrounds said electrically conductive core and a polymeric separator extending from a proximal end to a distal end and having at least one channel adapted for receiving the at least one electrical conduit. The PoE cables are capable of carrying about 1 watt to about 200 watts of power.
US10825576B2
The present invention relates to an apparatus for the generation, the distribution and/or the usage of electrical energy. The apparatus comprises a housing enclosing an insulating space and an electrically conductive part arranged in the insulating space, said insulating space containing a dielectric insulation medium, at least a portion of which being in the form of an insulation gas comprising an organofluorine compound. According to the invention, at least some of the components of the apparatus that are directly exposed to the insulation gas are made of a material which remains unaltered during exposure to the insulation gas for a period of more than 1 year at operational conditions and/or have a surface, at least a portion of which is devoid of any nucleophilic group reactive towards the organofluorine compound and/or reactive towards any degradation product thereof at operational conditions.
US10825572B2
A charge stripping method includes irradiating a charge stripping film with an ion beam. The charge stripping film includes a single layer body of a graphitic film having a carbon component of at least 96 at % and a thermal conductivity in a film surface direction at 25° C. of at least 800 W/mK, or a laminated body of the graphitic film. The charge stripping film has a thickness of not less than 100 nm and less than 10 μm, a tensile strength in a film surface direction of at least 5 MPa, a coefficient of thermal expansion in the film surface direction of not more than 1×10−5/K, and an area of at least 4 cm2.
US10825567B1
An apparatus and method for informed personal-well-being decision making that provides a user with alerts and information, focused on health and wellness, on items they choose for possible consumption. Some embodiments include optical, sonic, smell and other sensors, communications with databases that identify ingredients and effects on health and well-being, as well as user inputs. From user input, GPS, local conditions and alerts, some embodiments determine information specific to the user and their environment. By using established, and creating new, databases, some embodiments compile, compare, transmit and store data on various consumables. Some embodiments provide access to information on the companies, manufacturers, and various other components in an item's trip from dirt to table. Some embodiments establish methods and procedures to ascertain both the point-of-origin and where the consumable has traveled. Some embodiments provide a score for the specified consumable to show the quality of health provided by the consumable.
US10825566B1
This disclosure describes systems, methods, and computer programs for notifying about availability of a medical device to receive maintenance. In one embodiment, a computer receives: (i) packets related to medical device activity, which are transmitted over a communication network, and (ii) an identifier of a certain medical device that is to receive maintenance. The computer performs deep packet inspection (DPI) of the packets. The computer determines, based on a result of DPI of a first packet, that the certain medical device is being utilized to treat a patient, so it notifies not to use the certain medical device in additional treatments. Based on a result of DPI of a second packet, which was transmitted after the first packet, the computer determines that the certain medical device was no longer being utilized to treat any patient, so the computer notifies that the certain medical device is available for maintenance.
US10825564B1
A method and system may use computer vision techniques and machine learning analysis to automatically identify a user's biometric characteristics. A user's client computing device may capture a video of the user. Feature data and movement data may be extracted from the video and applied to statistical models for determining several biometric characteristics. The determined biometric characteristic values may be used to identify individual health scores and the individual health scores may be combined to generate an overall health score and longevity metric. An indication of the user's biometric characteristics which may include the overall health score and longevity metric may be displayed on the user's client computing device.
US10825561B2
Example embodiments relate to a system, method, apparatus, and computer readable media configured to generate a multiple renditions of a user interface that is updated based upon athletic movements of two or more users remotely located from each other. The UI may be configured to simultaneously display energy expenditure values in real-time. In further embodiments, a joint energy expenditure values determined from multiple remote users may be simultaneously displayed.
US10825559B1
A system of validating self-administration of prescription medication by a patient wherein the prescription medication is administered over a series of timed dosages. A machine-readable optical code label such as a QR Code is affixed to an interior surface of a prescription medication container containing the prescribed medication such as the interior of the bottle cap. The container must be open to electronically read the optical code label. The label contains data associated with the prescription medication and is read by a software application installed on a smartphone. The software receives the label-embedded data and a timestamp to validate the patient is self-administering the prescription medication consistent with the series of timed dosages. An alert notification is automatically generated to a healthcare administrator responsive to a deviation in the series of timed dosages.
US10825558B2
Systems, methods and tools for improving healthcare communication between physicians and patients by utilizing audio recordings systems capable of collecting voice data of patient conversations with healthcare providers. The communication system converts the recorded voice data into text using voice to text conversion software, analyzes the voice data using a natural language processor to parse for key words and phrases relating to the patient's health and concerns. Voice data may be additionally analyzed by cognitive analysis systems and machine learning algorithms designed to identify the sentiment that the patient is portraying while discussing the patient's concerns about health-related experiences or symptoms and cross-referenced with social media and other external websites or applications, confirming a patient's sentiment or providing additional key words and phrases unraised by the patient when communicating with the physician.
US10825557B2
A medical information processing apparatus includes processing circuitry. The processing circuitry acquires information concerning a similar patient similar to a designated patient. The processing circuitry acquires a value representing a first treatment effect and a value representing a first side-effect based on the acquired information concerning the similar patient. The processing circuitry generates a map image in which a mark representing the similar patient is arranged based on the value representing the first treatment effect and the value representing the first side-effect.
US10825556B2
A clinical grade consumer physical assessment system generates clinical grade physical assessment information for a patient based on a plurality of consumer grade measurements taken from different body portions of the patient using a consumer device. The system operates to correlate the plurality of consumer grade measurements, which have low resolution and accuracy, to a clinical grade result that is adequate for clinical purposes.
US10825553B2
The disclosure provides methods to assemble genomes of eukaryotic or prokaryotic organisms. The disclosure further provides methods for haplotype phasing and meta-genomics assemblies.
US10825552B2
The present invention relates to methods for evaluating and/or predicting the outcome of a clinical condition, such as cancer, metastasis, AIDS, autism, Alzheimer's, and/or Parkinson's disorder. The methods can also be used to monitor and track changes in a patient's DNA and/or RNA during and following a clinical treatment regime. The methods may also be used to evaluate protein and/or metabolite levels that correlate with such clinical conditions. The methods are also of use to ascertain the probability outcome for a patient's particular prognosis.
US10825549B2
The field of this invention is classifying animal behaviors. In particular the fields of this invention include using animals in vivariums, such as rodents, particularly mice. Ultrasonic vocalizations of mice in a vivarium are compared to a predetermined set of positive phenotypes and to a predetermined set of negative phenotypes. The output of those comparisons are then compared to determine a metric of distance to classify vocalizations as closer to or more distant from elements of the positive or negative sets.
US10825547B2
The invention relates to a method for determining catalophores including the steps of creating a point cloud database for target protein structures; creating a query point cloud; and searching said database with said query to thereby identify one or more catalophores.
US10825544B2
A memory device includes a memory bank comprising a plurality of addressable groups of memory cells comprising a primary and a secondary set of addressable groups and control circuitry comprising repair address match circuitry, comprising first inputs to receive row address values corresponding to a first group of the primary set of addressable groups, second inputs to receive fused address values corresponding to a second group of the primary set of addressable groups having been repaired, and a selection element, comprising a first selection input to receive a first signal indicative of whether a first row address value is identical to a first fused address value, a second selection input to receive a second signal indicative of whether a second row address value is identical to a second fused address value, and an output to selectively transmit a result as one of the first or second signal.
US10825535B1
Methods, systems, and devices for spare substitution in a memory system are described. memory device identifying a rotation index that indicates a first assignment of logical channel to physical channels for code words stored in a memory medium. The memory device may use a pointer to indicate one or more code word addresses that are to be rotated and update a value of the pointer associated with a range for the rotation index based on a condition being satisfied. The memory device may rotate a first code word according to a first assignment of the rotation index, where the rotating may occur at an address of the memory medium corresponding to the updated value of the pointer. Additionally, the memory device may execute access operations on the memory medium that include multiplexing multiple logical channels to multiple physical channels based on the rotation index and the pointer.
US10825530B2
In a method of erasing data in a nonvolatile memory device including a memory block, it is determined whether a data erase characteristic for the memory block is degraded for each predetermined cycle. The memory block has a plurality of memory cells therein, the plurality of memory cells being stacked in a vertical direction relative to an underlying substrate. A data erase operation is performed by changing a level of a voltage applied to selection transistors for selecting the memory block as an erase target block when it is determined that the data erase characteristic is degraded.
US10825524B2
A non-volatile electronic memory device is integrated on a semiconductor and is of the Flash EEPROM type with a NAND architecture including at least one memory matrix divided into physical sectors, intended as smallest erasable units, and organized in rows or word lines and columns or bit lines of memory cells. At least one row or word line of a given physical sector is electrically connected to at least one row or word line of an adjacent physical sector to form a single logic sector being erasable, with the source terminals of the corresponding cells of the pair of connected rows referring to a same selection line of a source line.
US10825522B2
A structure of nonvolatile memory device includes a substrate, having a logic device region and a memory cell region. A first gate structure for a low-voltage transistor is disposed over the substrate in the logic device region, wherein the first gate structure comprises a single-layer polysilicon. A second gate structure for a memory cell is disposed over the substrate in the memory cell region. The second gate structure includes a gate insulating layer on the substrate. A floating gate layer is disposed on the gate insulating layer, wherein the floating gate layer comprises a first polysilicon layer and a second polysilicon layer as a stacked structure. A memory dielectric layer is disposed on the floating gate layer. A control gate layer is disposed on the memory dielectric layer, wherein the control gate layer and the single-layer polysilicon are originated from a preliminary polysilicon layer in same.
US10825507B2
Disclosed herein is an apparatus that includes an output signal line, and first and second tristate buffer circuits each having an output node connected to the output signal line in common. The output signal line includes a first section having first and second connection points, a second section having third and fourth connection points, a third section connected between the first and third connection points, and a fourth section connected between second and fourth connection points. At least a part of the first section of the output signal line is located on the first tristate buffer circuit, and at least a part of the second section of the output signal line is located on the second tristate buffer circuit.
US10825503B2
A memory device includes memory banks that each has multiple rows with row addresses. The memory device also includes a counter that stores and increments a first row address of a first row of a first set of memory banks to a second row address of a second row of the first set of memory banks in response to a first refresh operation when the memory device is operating in a first mode. The memory device further includes circuitry that blocks incrementing the second row address to a third row address of a third row of the first set of memory banks when the memory device transitions from the first mode to a second mode and the first refresh operation is not paired with a second refresh operation that is performed when the memory device is operating in the first mode.
US10825498B2
The present disclosure provides a magnetic random access memory structure, including an array region, and a logic region adjacent to the array region. The logic region includes a bottom electrode via, a magnetic tunneling junction layer over the bottom electrode via, a top electrode over the MTJ, a conformable oxide layer over the MTJ and the top electrode, and a silicon oxide layer over the conformable oxide layer. The conformable oxide layer and the silicon oxide layer extend from the array region to the logic region.
US10825479B2
Systems and methods for analyzing recorded data from one recording device, or a subset of recording devices to identify redactions that should be made to the recorded data. The identified redactions may be in accordance with a redaction policy. The identified redactions may be applied to recorded data recorded by other devices that recorded data the same incident. The redactions may be made to recorded data that was not analyzed prior to performing the redactions, so the redactions identified in one recorded data are performed in other recorded data that was not used to identify the types of redactions that should be made. Applying redactions to data that was not analyzed to determine what types of redactions should be made reduces the amount of time required to analyze recorded data for redaction.
US10825478B1
According to one embodiment, a magnetic recording apparatus measures and stores recording signal quality of a disk at an initial stage, inspects the recording signal quality before data is recorded, determines whether or not the recording signal quality obtained in the inspection satisfies a standard when compared to the stored recording signal quality at the initial stage, adjusts, based on a result of the determination, light irradiation power of a light irradiation element so as to satisfy the standard, determines a read offset amount based on a result of the adjustment, and performs control so that a position of a read head is shifted based on the determined read offset amount.
US10825473B2
According to one embodiment, a magnetic disk device includes a magnetic disk, a recording head and a controller. The recording head includes a high-frequency oscillator disposed in a write gap between a main magnetic pole and a return magnetic pole and configured to oscillate in accordance with a bias voltage, and a bias voltage supply circuit configured to supply the bias voltage to the high-frequency oscillator. The controller includes a bias voltage controller configured to control the bias voltage to be applied to the high-frequency oscillator in accordance with a sampling frequency of data when the data is recorded on the magnetic disk by the recording head.
US10825472B2
Detecting voiced speech in an audio signal. A method comprises calculating an autocorrelation function (ACF) of a portion of an input audio signal and detecting a highest peak of said autocorrelation function within a determined range. A peak width and a peak height of said detected highest peak are determined and based on the peak width and the peak height it is decided whether a segment of an input audio signal comprises voiced speech.
US10825471B2
A system uses a voice energy detection (VED) circuit along with a capture buffer for improved performance and lower power dissipation. With a VED assigned to each microphone in the system, combing the output of more than one VED to improve the detection probability or reduce the false alarm rate improves the post detection signal-to-noise ratio. One or more VED circuits are dynamically selected based on background energy and detection performance. Further, a digital VED algorithm dynamically changes the oversampling ratio (OSR) values and passband bandwidth as a function of the loudness of the background noise and desired signal levels. If the desired signal or noise is strong, then the OSR is reduced to save power. If desired speech is detected, then the OSR value increases to get the target SNR for the remaining audio processing needs.
US10825468B2
Systems and methods for providing natural language annunciations are provided. In one embodiment, a method can include receiving a set of data indicative of a user input associated with one or more travel modes. Information indicative of the one or more travel modes can be provided for display on a first display device. The method can further include generating an output indicative of a natural language annunciation based at least in part on the first set of data. The natural language annunciation can be indicative of the one or more travel modes using natural language syntax. The method can include sending the output indicative of the natural language annunciation to one or more other computing devices associated with a second display device.
US10825461B2
An audio encoder for encoding an audio signal having a lower frequency band and an upper frequency band includes: a detector for detecting a peak spectral region in the upper frequency band of the audio signal; a shaper for shaping the lower frequency band using shaping information for the lower band and for shaping the upper frequency band using at least a portion of the shaping information for the lower band, wherein the shaper is configured to additionally attenuate spectral values in the detected peak spectral region in the upper frequency band; and a quantizer and coder stage for quantizing a shaped lower frequency band and a shaped upper frequency band and for entropy coding quantized spectral values from the shaped lower frequency band and the shaped upper frequency band.
US10825459B2
A method and an apparatus for converting a speech-to-text in a multiparty call. Receiving speech-to-text requests sent by at least two terminals, where the speech-to-text requests include a first identifier and a second identifier; allocating a session to the at least two terminals, so that in the speech-to-text requests sent by the at least two terminals, terminals that have a same first identifier or a same second identifier have a same session; receiving, by using a packet-switched domain, a voice stream whose sampling rate is greater than 8 KHz and that is sent by at least one terminal in one multiparty call, where the multiparty call corresponds to one session; converting the voice stream into a text; and sending the text to a terminal in the multiparty call.
US10825455B2
A voice dialogue apparatus analyzes an acquired user's voice, generates a parrot-like response sentence and outputs the generated parrot-like response sentence. The voice dialogue apparatus includes storage means for storing the user's past voice, average calculation means for calculating an average value of voice sentence lengths each indicating a length of the user's voice based on the user's past voice, candidate generation means for combining a dependency word, which establishes a dependency relation with a noun included in the acquired user's voice, with the noun to generate a plurality of response sentence candidates, and repetition generation means for selecting, in association with the average value of the voice sentence lengths, one response sentence candidate from among the plurality of response sentence candidates and using the selected response sentence candidate as it is or processing the selected response sentence candidate to generate the parrot-like response sentence.
US10825453B2
An electronic device is provided. The electronic device includes a microphone, a display, a memory, and a processor electrically connected to the microphone, the display, and the memory. The processor is configured to execute a speech recognition function, to obtain a first utterance from a user through the microphone, to display a text generated based on the first utterance, in the display, and to display at least one item, which corresponds to a portion recognized as a proper noun in the text and which is determined based on the first utterance and a personalized database of the user, in the display.
US10825446B2
A method improves a functionality of a conversational agent that is generated by an artificial intelligence (AI) system. A conversational agent receives a first utterance from a first entity. The AI system identifies an unverified response to the first utterance; sends the unverified response to the first entity; and receives a positive feedback indication about the unverified response from the first entity. The AI system searches a data store in order to identify an entry for a second utterance by a second entity, where the second entity has sent a positive feedback for the unverified response. The AI system sends the second utterance and the unverified response to the first entity, and receives a positive feedback for the unverified response to the second utterance from the first entity in order to mark the unverified response as a verified response, which responds to future receipts of the first utterance.
US10825443B2
The implementation of modal processors, which involve the parallel combination resonant filters, may be costly for applications such as artificial reverberation that can require thousands of modes. In one embodiment, the input signal is decomposed into a plurality of subbands, the outputs of which are downsampled. In each downsampled band, resonant filters are applied at the downsampled sampling rate, and their output is upsampled and filtered to form the band output.
US10825441B2
The present disclosure provides systems and methods associated with acoustic transmitters, receivers, and antennas. Specifically, the present disclosure provides a transducer system for transmitting and receiving acoustic energy according to a determined acoustic emission/reception pattern. In various embodiments, an acoustic transducer system may include an array of sub-wavelength transducer elements each configured with an electromagnetic resonance at one of a plurality of electromagnetic frequencies. Each sub-wavelength transducer element may generate an acoustic emission in response to the electromagnetic resonance. A beam-forming controller may cause electromagnetic energy to be transmitted at select electromagnetic frequencies to cause a select subset of the sub-wavelength transducer elements to generate acoustic emissions according to a selectable acoustic transmission pattern. A common port may facilitate electromagnetic communication with each of the sub-wavelength transducer elements.
US10825439B2
In an embodiment, the present invention provides a sound-absorbing textile composite, including: a) at least one open-pore support layer comprising coarse staple fibers having a titer of from 3 dtex to 17 dtex and fine staple fibers having a titer of from 0.3 dtex to 2.9 dtex, as scaffold fibers; and b) a microporous flow layer arranged on the support layer and including microfibers having a fiber diameter of less than 10 μm. A flow resistance of the sound-absorbing textile composite is from 250 Ns/m3 to 5000 Ns/m3.
US10825438B2
An electronic musical instrument includes: a memory that stores, before performance of a musical piece on the electronic musical instrument by a performer begins, pitch variation data that represents differences between fundamental tone frequencies of notes in a melody of the musical piece and fundamental tone frequencies of notes in prescribed singing voice waveform data; and a sound source that outputs a pitch-adjusted carrier signal to be received by a waveform synthesizing device that generates synthesized waveform data based on the pitch-adjusted carrier signal, the pitch-adjusted carrier signal being generated on the basis of the pitch variation data acquired from the memory and performance instruction pitch data that represent pitches specified by the performer during the performance of the musical piece on the electronic musical instrument, the pitch-adjusted carrier signal being generated even when the performer does not sing after performance of the musical piece begins.
US10825421B2
An electronic device photographing method includes, after the electronic device enters a photographing screen, determining a folding angle of the flexible display screen based on a pixel coordinate parameter of a photographed object on the photographing screen; and/or determining target luminance of a display screen; and when detecting that a photographing button is pressed, adjusting luminance of the display screen to the determined target luminance. In this way, when the electronic device is used to take an image, fill-in light can be implemented for the photographed photo by improving target luminance of the display screen based on the pixel coordinate parameter of the photographed object on the photographing screen.
US10825419B2
In situations with reduced image changes, display panels, such as the ones disclosed herein, may reduce their power consumption by performing self-refresh cycles, in which they may display locally stored data in the display panel instead of retrieving it from an image buffer. Methods and circuitry for management of the self-refresh cycle may reduce jitter, luminance errors, and/or flickers that may be caused by untimely self-refresh cycles that may occur as a result of latency in the image buffer. In some implementations, the display panel may have a dedicated low latency input that notifies an arrival of an incoming image. In some implementations, the self-refresh cycles of the panel may be managed by a host or a buffer that is responsible for sending the images.
US10825415B2
A time controller is able to convert and present the LCD display of gray levels within images with a brightness equal to that within the original images. The time controller alternates in operation between first and second modes of gamma correction, each for a specified time duration. In the first correction mode, the time controller corrects the original gray levels in a correction-positive manner and outputs first correction gray levels. In the second correction mode, the time controller corrects the original gray levels in a correction-negative manner, and outputs the second correction gray levels. The first correction gray level is equal to or larger than the second correction gray level, to correspond with original gray levels.
US10825414B2
An active-matrix display device has a gate driver for driving a plurality of gate bus lines of a display portion in accordance with a multi-phase gate clock signal. The gate driver includes first and second gate drivers disposed to opposite sides of the display portion. Each of the first and second gate drivers includes a plurality of buffer circuits connected to the gate bus lines and a plurality of bistable circuits cascaded together so as to constitute a shift register. Each bistable circuit controls two buffer circuits. The bistable circuits are disposed in an interlaced arrangement between the first and second gate drivers. Each of the two buffer circuits controlled by each bistable circuit includes a boost capacitor, and one of the two buffer circuits includes a transistor for isolating a boost effect.
US10825412B2
There is provided a liquid crystal panel including a GOA circuit and a driving method thereof. The GOA circuit includes a plurality of cascaded single-stage GOA circuit units, and each single-stage GOA circuit unit includes a first pull-down maintaining circuit unit and a second pull-down maintaining circuit unit. A first control terminal of the first pull-down maintaining circuit unit is input with a first clock signal, a second control terminal of the second pull-down maintaining circuit unit is input with a second clock signal, and the pull-down circuit unit is input with a scan driving signal of a GOA circuit unit of next second stage. The first clock signal and the second clock signal are input alternately to the pull-up circuit units and the pull-down circuit units in GOA circuit units of adjacent stages. The first clock signal and the second clock signal have the same long period.
US10825411B2
This application provides a shutdown signal generation circuit and a display apparatus. The shutdown signal generation circuit includes: a first switch, where a first end of the first switch is electrically coupled to a first frequency, a control end of the first switch is electrically coupled to a first node, and a second end of the first switch is electrically coupled to a second node; and a second switch, wherein a first end of the second switch is electrically coupled to a second frequency, a control end of the second switch is electrically coupled to the first node, and a second end of the second switch is electrically coupled to the second node, where the first node is electrically coupled to a control signal, and the second node electrically outputs a gate shutdown signal.
US10825410B2
A matrix screen for displaying multiplexed colour images, wherein the screen comprises several selection modules each connected to at least one colour source, in that each selection module comprises different selection terminals, a single selection terminal per selection module being activated during the same screen operating phase or sub-frame, and in that the optoelectronic devices of the screen belonging to the same colour family.
US10825408B2
The application relates to a display driving method, device and apparatus. The method includes: acquiring a group of original gray scale data of each of pixel units of a content to be displayed in a preset display area; determining an average gray scale of each of hues in the preset display area according to the group of the original gray scale data; acquiring an original light source intensity of each of the hues of the content to be displayed in the preset display area; and dividing the group of the original gray scale data into a first group of gray scale data and a second group of gray scale data, according to the group of the original gray scale data of the each of pixel units, the average gray scale of each of the hues, and the original light source intensity; and determining a driving light source intensity of each of the hues in the preset display area; a gray scale of each of the hues of the first group of the gray scale data is a maximum gray scale in the group of the original gray scale data; and a gray scale of each of the hues of the second group of the gray scale data is equal to 0 or not a minimum gray scale in the group of the original gray scale data.
US10825402B2
This application provides a display apparatus and a driving method therefor. The display apparatus includes: a storage module, configured to provide display data; a timing controller, configured to: read the display data, convert the display data to image data, and output the image data and a control signal; a brightness adjusting module, configured to adjust a working state of the brightness adjusting module according to the control signal; and a display module, configured to receive the image data output by the timing controller and present a corresponding image, where after finishing configuring the image data of the display module and receiving a feedback signal sent by the display module, the timing controller controls the brightness adjusting module to be turned on, and the brightness adjusting module is connected to the timing controller by using a spring and a probe of a fan-out area.
US10825394B2
A display device is described comprising sub-pixels that include: a first driving transistor and a second driving transistor, each of which control a current flowing from a first electrode to a second electrode in accordance with a data voltage applied to a gate electrode; a light emitting element connected to the second electrodes of the first driving transistor and the second driving transistor; and a first contact hole and a second contact hole which are disposed in the gate electrode, wherein the gate electrode includes a first gate electrode overlapping the first driving transistor in a thickness direction and a second gate electrode overlapping the second driving transistor in the thickness direction, and the first contact hole is located in the first gate electrode, the second contact hole is located in the second gate electrode, and the first contact hole and the second contact hole overlap each other.
US10825389B2
A pixel control circuit and control method, a pixel unit, a display substrate and device are provided. The pixel control circuit includes: a pressure detecting sub-circuit and a switching sub-circuit; the pressure detecting sub-circuit is connected to a control node, and configured to control a potential of the control node to be a first potential when a pressure signal is detected; and the switching sub-circuit is connected to a first power source terminal, a light-emitting sub-circuit in the pixel unit and the control node respectively, and configured to provide a first power source signal from the first power source terminal for the light-emitting sub-circuit when the potential of the control node is the first potential. The pixel control circuit effectively raises the speed of fingerprint detection.
US10825388B2
A display device includes a display area including a plurality of pixels arrayed next to one another in a first direction and in a second direction that is different from the first direction, and a control circuit. Each of the pixels includes a light-emitting element configured to emit light by a current flowing therethrough, a drive transistor, and a holding capacitance.
US10825386B2
An OLED driving compensation circuit is provided. The OLED driving compensation circuit includes an OLED, a capacitor, a driving TFT (thin film transistor), a switch TFT, a lighting TFT, and an initial TFT. The OLED driving compensation circuit further includes a compensation circuit. The compensation circuit receives a feedback current passed through the second end of the driving TFT and generates a compensation voltage according to the feedback current, and the compensation circuit is compensated by the switch TFT outputs the compensation voltage to the capacitor. An AMOLED display panel is further disclosed. However, this disclosure has advantage of improving display stability for the AMOLED display panel.
US10825385B2
An apparatus receives current image frame data and data relating to at least one previous image frame for an electronic display. One or more parameters related to hysteresis of transistors in the electronic display are sensed. A correlation device, such as a look-up table, receives the sensed parameter or parameters and the data relating to one or more image frames, and uses this information, at least in part, to output an appropriate compensation signal for the current image frame data. The compensated current image frame data may then be supplied to the electronic display to reduce or eliminate the effects of hysteresis on the displayed image.
US10825384B2
The present disclosure provides a display panel and a display device, wherein the display panel includes at least one of the plates of the storage capacitor provided with a charging element. By providing the charging element, charging the storage capacitor when the storage capacitor is discharged, so that the charge of the storage capacitor tends to stable or keep stable. That is, the voltage supplied from the storage capacitor to the driving transistor is ensured to constant, so that the luminance of the pixel is not distorted.
US10825379B2
A light adjustment device, a method of preparing the same, and a display device are provided, the light adjustment device includes: light-absorption portions spaced apart from one another, with first gaps each functioning as light ray passages and between each two adjacent light-absorption portions of the light-absorption portions, respectively; first electrodes being transparent and between each two adjacent light-absorption portions of the light-absorption portions respectively and at least partially located on both sides of each of the light ray passages; at least one second electrode being also transparent, each being in a respective one of the first gaps respectively, with second gaps each being between each second electrode and a respective adjacent one of the first electrodes; and transflective portions being electrically polarized and in the second gaps respectively, comprising light-transmitting portions and light-reflecting portions, the light-reflecting portions being steerable to be turned under an electric field force.
US10825378B2
Provided is an electronic apparatus and a controlling method thereof the electronic apparatus includes: an interface connectable to a modular display apparatus including a plurality of display cabinets divided into a plurality of groups, the interface including a plurality of ports connectable to the plurality of groups; and a processor configured to: scale an image received from an external device based on a resolution of the modular display apparatus, re-scale the scaled image based on a resolution based on a user input, identify at least one group, among the plurality of groups, based on a position in which the re-scaled image is to be displayed, decompose the re-scaled image based on the identified at least one group, and control to transmit the decomposed re-scaled image to each of the identified at least one group through at least one port connected to the identified at least one group.
US10825373B1
A processing system for a display device comprises a display driver configured to generate a gate select signal and output the gate select signal to gate select control circuitry to be driven on gate lines for display updating. The gate select signal comprises a transition from a first voltage to a second voltage, a transition from the second voltage to a third voltage, and a transition from the third voltage to the first voltage. The second voltage is greater than the first voltage and the second voltage is maintained for a first period. The third voltage is greater than the second voltage and the third voltage is maintained for a second period. The gate select signal is driven by the gate select control circuitry on gate lines of the display device to select one or more subpixels of the display device for display updating.
US10825366B1
A rotation structure of a lamp decoration, which mainly comprises: a water-lamp main-body, a rotation mechanism, and a bottom seat; wherein the water-lamp main-body is internally filled with a slightly thick flowable liquid, and the water-lamp main-body is downwardly set with a recess. A rotation mechanism is set in the recess and has a first magnetic-disk, a plurality of gears, a fluid toggling-disk, and a rotating-body. The bottom seat correspondingly fixed and connected under the water-lamp main-body, and a second magnetic-disk is set inside the bottom seat to correspondingly attract with the first magnetic-disk magnetically. When the second magnetic-disk is rotated, the first magnetic-disk is magnetically attracted to rotate and drives the other gears to act; thereby disturbing the liquid inside the water-lamp main-body to produce a beautiful visual effect.
US10825364B2
Embodiments provide an illuminated design in a liquid light wall. According to an embodiment, there is provided a liquid light wall including a front wall with a plurality of circular openings through which transparent pipettes may be inserted. The pipettes are filled with a colored liquid. The colored liquid can be edible. A light source shines light from behind the front wall, transferring the light through the pipettes, showcasing a design. The pipettes can be readily removed from the circular openings. Embodiments provide for a modular design of the liquid light wall such that multiple modules can be attached to one another.
US10825359B2
A method includes receiving data including 3-dimensional scans of a plurality of torsos, dividing each scan into a plurality of cross-sections, calculating an area for each cross-section, and calculating a torso volume based on the calculated areas. The method may include fitting a curve defined by parameters to each cross-section. The area for each cross-section may be an area enclosed by the curve. The method may include receiving a desired torso volume percentile, and determining values for the parameters of the curves corresponding to the desired percentile.
US10825358B2
A training or rating system includes a shape sensing enabled device (104) and a database (140) of possible shapes and sequences of shapes for the shape sensing enabled device. The possible shapes and sequences of shapes include a collection of poses derived by appropriately performing a procedure with the shape sensing enabled device. A comparison module (154) is configured to compare real-time poses of the shape sensing enabled device with the collection of poses in the database to output comparison feedback for a user of the shape sensing enabled device.
US10825355B2
A system for determining the orientation of a toothbrush (4), the system comprising an orientation sensor (27) configured for attachment to a toothbrush (4) and one or more processors (29) configured to receive orientation information from the orientation sensor (27). The one or more processors (29) are further configured to determine whether the sensor (27) is in a first orientation (41) or a second orientation (33). The first orientation (41) corresponds to use of the toothbrush (4) on a surface of teeth on the left (42) of a user's mouth. The second orientation (33) corresponds to use of the toothbrush (4) on a surface of teeth on the right (40) of a user's mouth.
US10825353B2
Methods and devices can enhance language processing in an autism spectrum disorder (ASD) individual through auditory manipulation of an auditory stream. The auditory stream is received and includes an acoustic stimulus perceptually representing an object. An acoustic manipulation parameter for a predetermined acoustic detail characteristic is selected. The predetermined acoustic detail characteristic is associated with the ASD individual and is based on a measured language processing capability of the ASD individual. The auditory stream is modified based on the selected parameter, to reduce the predetermined acoustic detail characteristic while preserving a lexicality of the stimulus, such that the reduced acoustic detail characteristic enhances perception of the object by the ASD individual even when the stimulus includes two or more acoustically distinct stimuli each perceptually representing the object. The modified auditory stream is output to the ASD individual via at least one loudspeaker.
US10825352B2
A set of letter manipulatives and a board on which said letter manipulatives may be placed, where the board comprises an identification module that can identify the letter manipulatives placed on the board and communicate the identification to a computing device.
US10825350B2
A virtual reality (VR) based driving simulation system and method provides hazard perception training and testing. Some embodiments use a personal computing device (e.g., smartphone), a head-mounted VR headset, and a Bluetooth-connected push button keypad or other user input device. An immersive, 3D simulator enables users to experience and learn from hazardous scenarios without risking injury. Performance by a user in perceiving a hazard is compiled as a metric in a user profile stored on a server, and continued training and testing can be conducted with updated scenarios supplied by the server in accordance with the metric associated with a user.
US10825348B2
Some embodiments of an integrated student-growth platform for discovering, designating, and organizing heterogeneous instructional electronic resources based on observational assessments of students are disclosed. The student-growth platform is configured to establish and generate the best possible set of skills and resources for an educator to teach a group of students on a particular day and for a student to quickly progress to meet preferred educational standards. In one embodiment, the student-growth system includes a communication unit for sending and receiving data among users (e.g., teachers and students), an assessment platform, a planning platform, a learning-progression platform, an assignment platform, a mastery-maker platform, a Multi-Dimensional Response Item (MIRT) platform, and a reporting platform. The assessment platform 220 collects observation data for a target student, identifies one or more indicators to the learning-progression platform, which is coupled to the assignment platform, the mastery-maker platform, the MIRT platform, and the reporting module.
US10825343B1
Systems and methods for generating and communicating notifications indicating risks associated with vehicular operation are provided. According to certain aspects, an electronic device may access and analyze image data that depicts a vehicle operator in a certain state. The electronic device may determine, based on the state of the vehicle operator, whether a risk exists as well as information that may be helpful to communicate to additional vehicle operators. The electronic device may generate a notification that indicates the information and transmit the notification to at least one additional vehicle and/or to an infrastructure component.
US10825337B2
A method and system for testing a device in a fire control system is disclosed. A method includes a method and system for testing a device in a fire control system is disclosed. A method includes placing the device in a testing mode; isolating the device from other devices in the fire alarm system; testing the device; and removing the device from testing mode; wherein testing the device comprises using an unmanned inspection vehicle to remotely perform tests or other tasks on the device.
US10825331B2
There is provided an antitheft device and an antitheft system capable of reliably detecting theft via a simple installation method. The antitheft device includes a receiver 12 that receives a radio wave of a predetermined frequency, and a microcomputer (controller) 18 that determines whether or not the antitheft device is located at a position where it is impossible to detect a radio wave of a predetermined frequency by the receiver 12. The microcomputer (controller) 18 performs an alarming operation, upon determining that the antitheft device is located at a position where it is impossible to detect a monitoring radio wave WW of a predetermined frequency by the receiver 12. Accordingly, it suffices to attach the antitheft device 10 to a managed object MO such as a commercial item being monitored, and therefore it is not necessary to extend a cable from a sensor part attached to the commercial item.
US10825327B1
A system and method are provided for brokering mission critical communication between a sender and a receiver, where the sender provides a message in a first communication medium and the receiver requires or prefers a second communication medium. An interpretation portion reduces the message to essential knowledge data and generates a content descriptive representation, and a routing portion determines a communication media compatibility of the receiver and selectively sets the second communication medium for the message. A mediation portion then adaptively generates a transformed message in the second communication medium so that it is ascertainable to the receiver, and actuates delivery to the receiver. The interpretation portion is trained to identify image objects in an image which are then represented in the content descriptive representation, thereby enabling the mediation portion to generate text or audio content in the transformed message indicating mission critical features within the image content.
US10825319B1
A monitoring system that is configured to monitor a includes a light device that is located at a pool of the property and that includes a camera that is configured to capture video data, and a monitoring control unit that is configured to receive, from the light device, the video data, determine that an object in the pool of the property is likely a person, based on determining that an object in the pool of the property is likely a person, determine a confidence score that reflects a likelihood that the person is swimming, determine that the confidence score does not satisfy a confidence score criteria, and perform a monitoring system action based on determining that the confidence score does not satisfy the confidence score criteria.
US10825318B1
Systems and methods for identifying a condition associated with an individual in a home environment are provided. Sensors associated with the home environment detect data, which is captured and analyzed by a local or remote processor to identify the condition. In some instances, the sensors are configured to capture data indicative of electricity use by devices associated with the home environment, including, e.g., which devices are using electricity, what date/time electricity is used by each device, how long each device uses electricity, and/or the power source for the electricity used by each device. The processor analyzes the captured data to identify any abnormalities or anomalies, and, based upon any identified abnormalities or anomalies, the processor determines a condition (e.g., a medical condition) associated with an individual in the home environment. The processor generates and transmits a notification indicating the condition associated with the individual to a caregiver of the individual.
US10825316B1
A computer-implemented method for detecting medical emergency events may include, via one or more processors, data sensors, and/or transceivers: (1) obtaining sensor data indicative of kinetic actions of a user; (2) analyzing the sensor data to associate the sensor data with a one or more kinetic actions of the user; (3) comparing the one or more kinetic actions of the user with a model of kinetic actions to determine whether the one or more kinetic actions correspond with the model of kinetic actions, with the model being indicative of a medical emergency event; and (4) upon determining that the one or more kinetic actions correspond with the model, contacting medical emergency responders to request medical emergency services for the user. As such, medical emergency events being experienced by a user can be detected, and medical emergency responders may be quickly contacted to provide essential emergency medical services to the individual.
US10825309B2
Disclosed is a theft sensing system for sensing a theft of a fusion splicer by using an information terminal. The system includes a wireless communication unit that enables the fusion splicer to perform wireless communication with the information terminal, an authentication processing unit that performs an authentication process such that the fusion splicer and the information terminal are wirelessly connected to each other, an acquisition unit that acquires wireless situation data between the fusion splicer and the information terminal which are wirelessly connected to each other, a decision unit that decides whether the fusion splicer moves in a direction away from the information terminal based on a change in the wireless situation data acquired by the acquisition unit, and a notification unit that performs a predetermined notification process in the information terminal when the decision unit decides that the fusion splicer moves in the direction away from the information terminal.
US10825308B2
An automated payment system is disclosed. The automated payment system comprises a housing, a door coupled to the housing, wherein the door covers a side of the housing when in a closed position, a payment apparatus within an interior of the housing, the payment apparatus fixedly coupled to an extendable base, wherein the extendable base is slidably coupled to the housing and configured to extend out from within the housing and through the side when the door is in an open position, and a handle coupled to the door, the handle operable, when the door is in the open position, to contact the ground to provide additional support for the weight of the payment apparatus.
US10825306B2
Various embodiments herein include a pocket to receive tendered notes and to dispense notes from a terminal, such as an automated teller machine. The pocket may include a shutter, a lifter opposite the shutter, a pusher plate between and perpendicular to the shutter and lifter, and a ceiling clamp. The pocket also includes a controller that causes the terminal to perform actions when dispensing notes including moving the ceiling clamp to an open position and providing an output triggering dispensing of notes into the pocket. The actions further include moving the ceiling clamp to a closed position, moving the pusher plate to bias notes present within the pocket against the ceiling clamp and raising the lifter from a lower position to an upper position thereby lifting notes present between the pusher plate and the ceiling clamp. The shutter is then opened to expose and dispense the notes.
US10825304B1
Systems and methods for providing, conducting and modifying Blackjack involving standard playing cards in which players form two player hands to compete against two dealer hands that are set according to a preset house way.
US10825298B1
Gaming systems and methods which enable a player to skip a bonus event, such as a play of a triggered bonus game, in exchange for a placement of a sporting event wager.
US10825291B2
A system and method for playing an online game. The system includes player devices associated with the online game and a server arrangement communicably coupled with the player devices. The server arrangement is configured to receive a request from a player device to initiate the online game; determine at least one passive player device based on predefined condition; transmit an authorization request to the at least one passive player device to play the online game as virtual player; receive an authorization response from the at least one passive player device; create at least one virtual player for the at least one passive player device, based upon the received authorization response, and initiate the online game among the at least one virtual player and the at least one player device, wherein the at least one passive player device is different from the at least one player device.
US10825289B2
A system comprising a communication interface, a processing circuit, and a memory device that stores machine readable instructions that, when executed by the processing circuit, cause the processing circuit to identify audio content that comprises multiple audio content layers. Each audio content layer of the plurality of audio content layers being playable to generate a portion of sound that is generated when playing the audio content. The processing circuit determines a quantity of active electronic gaming machines (“EGMs”) in a bank of EGMs, determines a portion of the audio content layers based on the quantity of active EGMs, and generates audio instructions for an active EGM in the bank of EGMs. The audio instructions can indicate that the portion of the audio content layers are selectable to be played by the active EGM. The processing circuit transmits, via the communication interface, the audio instructions to the active EGM.
US10825287B2
A gaming system including an isolating partially see through sound blocking multi-function isolating enclosure and an electronic gaming machine positioned in the enclosure.
US10825273B2
A smart thermostat hub and a management platform for controlling and securing smart devices in a multi-family residential property are disclosed. Smart thermostat hubs may bi-directionally communicate with the management platform using a LoRaWAN communication link and communicate with smart devices present within an apartment of the multi-family residential property via a non-LoRaWAN communication link. Smart thermostat hub may provide a gateway or bridge between the management platform and an offline door lock, thereby enabling access credentials for an offline door lock to be disabled from the management platform, and may serve to facilitate remote configuration of other smart devices, such as thermostats and smart light fixtures, for example.
US10825272B1
Disclosed are an image data access control apparatus for a vehicle and a method thereof. The image data access control apparatus for a vehicle includes storage that stores image data of the vehicle, a communicator that communicates with a user device, an authentication processor that authenticates the user device, and a controller that determines whether the user device can have access to the image data based on an authentication result of the authentication processor.
US10825268B2
An example method includes receiving, at a computing system, parameters from a vehicle, wherein the parameters correspond to a set of associated parameter identifiers (PIDs), and determining, by the computing system, one or more thresholds for one or more PIDs of the set of associated PIDs. The example method additionally includes determining, by the computing system, one or more indicators displayable on a first graph of parameters corresponding to a first PID of the set of associated PIDs. For instance, at least one indicator of the one or more indicators represents a parameter corresponding to a second PID of the set of associated PIDs breaching a threshold associated with the second PID. The example method further includes displaying, by the computing system on a graphical user interface, the first graph of parameters corresponding to the first PID and the one or more indicators on the first graph.
US10825262B2
Embodiments of the disclosure can relate to bearing health monitoring in power plants. In one embodiment, a computer-implemented method for bearing health monitoring in power plants can include receiving operational data associated with a power plant component. The method may further include receiving training data from one or more power plants. The method may further include determining a signature associated with an anomaly event of the power plant component, based at least in part on the operational data and the training data. The anomaly event of the power plant component may include a wiping of a bearing or a scoring of a bearing. The method can further include generating (1) an alert indicative of the anomaly event or (2) an alert to modify an inspection interval for the power plant component, based at least in part on a comparison of the signature with a threshold signature. The method can further include generating a repair or inspection recommendation for the power plant component, based at least in part on the comparison.
US10825260B2
Various aspects of the subject technology relate to systems, methods, and machine-readable media for virtual try-on of items such as spectacles. A virtual try-on interface may be implemented at a server or at a user device, and may use collision detection between three-dimensional models of the spectacles and of a user's face and head to determine the correct size and position of the spectacles for virtual try-on. With the determined size and position, a virtual representation of the spectacles is superimposed on an image of the user.
US10825259B2
An apparatus to generate a model of a surface of an object includes a data set pre-aligner configured to receive multiple sets of surface data that correspond to respective portions of a surface of an object and that include three-dimensional (3D) points. The data set pre-aligner is also configured to perform a pre-alignment of overlapping sets to generate pre-aligned sets, including performing a rotation operation on a second set of the surface data, relative to a first set of the surface data that overlaps the second set, to apply a rotation amount that is selected from among multiple discrete rotation amounts and based on a similarity metric. The apparatus includes a data set aligner configured to perform an iterative alignment of the pre-aligned sets to generate aligned sets. The apparatus also includes a 3D model generator configured to combine the aligned sets to generate a 3D model of the object.
US10825255B2
A VR system for vehicles that may implement methods that address problems with vehicles in motion that may result in motion sickness for passengers. The VR system may provide augmented or virtual views that match visual cues with the physical motions that a passenger experiences. The VR system may project virtual content so that the content appears as a distant object stabilized or fixed in the external environment. The VR system may aid in productivity, as passengers may perform work while riding in the vehicle without experiencing motion sickness. In addition, the VR system may provide enhanced virtual experiences to passengers in moving vehicles by matching accelerations and motions of the vehicle to accelerations and motions in the virtual experiences.
US10825251B2
An apparatus for use in a medical process that involves a particle accelerator, includes: a processing unit configured to obtain medical information, obtain a viewing direction of a user of the apparatus, and process the medical information based on the viewing direction of the user of the apparatus to create a graphical representation of the medical information for presentation to the user of the apparatus; and a screen for displaying the graphical representation.
US10825249B2
In order to blur a virtual object in a video in real time as the video is acquired by a device capturing a real scene, a salient idea is used which estimates an apparent motion vector between two successive images, being captured at two successive device poses, in which the apparent motion vector estimation is based on a motion of the device. The successive images are then filtered based on the estimated apparent motion vector.
US10825244B1
A method of providing structured data to be used in a front end viewing device includes building a plurality of layers with different levels of detail (LODs). The method utilizes a point cloud, and selects points into the LODs on random basis. The data sets associated with the LODs are complementary, so that the data may be combined in order to achieve higher resolution. The method maintains or reduces the size of the resulting LOD-structured file(s) in comparison with the original file(s) of the cloud.
US10825241B2
A wearable device is configured with a one-dimensional depth sensor (e.g., a LIDAR system) that scans a physical environment, in which the wearable device and depth sensor generate a point cloud structure using scanned points of the physical environment to develop blueprints for a negative space of the environment. The negative space includes permanent structures (e.g., walls and floors), in which the blueprints distinguish permanent structures from temporary objects. The depth sensor is affixed in a static position on the wearable device and passively scans a room according to the gaze direction of the user. Over a period of days, weeks, months, or years the blueprint continues to supplement the point cloud structure and update points therein. Thus, as the user continues to navigate the physical environment, over time, the point cloud data structure develops an accurate blueprint of the environment.
US10825236B1
A method of forming and using an efficient image data structure involves providing a first model comprising three-dimensional spatial information for use in being displayed on a display device. Objects within the first model having sub-models are classified to form groups of objects, objects within a same group for being processed with a substantially similar process. A class LOD structure is constructed for each group, the class LOD structure built using the substantially similar process for the class and the LOD structure for representing each object within the class for supporting rendering thereof. A rendering strategy is defined for each Class, the rendering strategy for rendering each object within the class based on data within the LOD structure and in dependence upon a gaze direction of a spectator and a location of the spectator. The class LODs are merged to form an LOD structure for the first model. The LOD structure is stored in a retrievable form for having data retrieved therefrom based on a provided location and gaze direction. Based on the spectator location and gaze direction a subset of LODs is selected from the LOD structure relying on a predefined set of integer functions that define rendering strategies, each for a subset of the class LODs reflecting each class, the subset of LODs selected in part based on a distance from the spectator location to an object within said class. A subset of facets is selected from the subset of LODs depending on spectator position and related to visibility of an encompassing sub-model for use in rendering of a scene on a front-end display. The subset of selected facets is then provided for display on the front-end device.
US10825232B2
A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.
US10825229B2
A projection-based frame is generated according to an omnidirectional video frame and a triangle-based projection layout. The projection-based frame has a 360-degree image content represented by triangular projection faces assembled in the triangle-based projection layout. A 360-degree image content of a viewing sphere is mapped onto the triangular projection faces via a triangle-based projection of the viewing sphere. One side of a first triangular projection face has contact with one side of a second triangular projection face, one side of a third triangular projection face has contact with another side of the second triangular projection face. One image content continuity boundary exists between one side of the first triangular projection face and one side of the second triangular projection face, and another image content continuity boundary exists between one side of the third triangular projection face and another side of the second triangular projection face.
US10825222B1
A facial recognition method for video conferencing requiring a reduced bandwidth and transmitting video and audio frames synchronously first determines whether a 3D body model of a first user at a local end has been currently retrieved or is otherwise retrievable from a historical database. Multiple audio frames of first user are collected and audio frequency at a specific range are filtered out. An envelope curve of the first audio frames and multiple attacking time periods and multiple releasing time periods of the envelope curve is calculated and correlated with lip movements of first user. Information packets of same and head-rotating and limb-swinging images of the first user are transmitted to a remote second user so that the 3D body model can simulate and show lip shapes and other movement of the first user.