公开(公告)号：EP0943155B1

公开(公告)日：2007-06-27

申请号：EP98948810.1

申请日：1998-08-19

Applicant: ROBERT BOSCH GMBH

Inventor： LÄRMER, Franz ,  SCHILP, Andrea

IPC: H01L21/3065 ,  H01L21/308

CPC classification number: B81C1/00619 ,  B81C2201/0112 ,  H01L21/30655

Abstract: The invention relates to a method for anisotropic etching of microstructures and nanostructures in silicon substrates by means of alternating consecutive independently controlled etching stages and stages in which polymer is deposited, whereby the amount of polymer deposited is reduced in the course of the deposit stages, thereby avoiding undercutting of the microstructures and nanostructures.

公开(公告)号：EP1435336A3

公开(公告)日：2005-12-28

申请号：EP03023819.0

申请日：2003-10-20

Applicant: ROBERT BOSCH GMBH

Inventor： Lutz, Markus ,  Partridge, Aaron

IPC: B81C1/00

CPC classification number: B81C1/00063 ,  B81B3/0086 ,  B81C2201/0112 ,  B81C2203/0136 ,  B81C2203/0145

Abstract: A method for adjusting with high precision the width of gaps between micromachined structures or devices in an epitaxial reactor environment. Providing a partially formed micromechanical device, comprising a substrate layer, a sacrificial layer including silicon dioxide deposited or grown on the substrate and etched to create desired holes and/or trenches through to the substrate layer, and a function layer deposited on the sacrificial layer and the exposed portions of the substrate layer and then etched to define micromechanical structures or devices therein. The etching process exposes the sacrificial layer underlying the removed function layer material. Cleaning residues from the surface of the device, then epitaxially depositing a layer of gap narrowing material selectively on the surfaces of the device. The selection of deposition surfaces determined by choice of materials and the temperature and pressure of the epitaxy carrier gas. The gap narrowing epitaxial deposition continues until a desired gap width is achieved, as determined by, for example, an optical detection arrangement. Following the gap narrowing step, the micromachined structures or devices may be released from their respective underlying sacrificial layer.

公开(公告)号：EP1420438A3

公开(公告)日：2005-03-23

申请号：EP03026193.7

申请日：2003-11-17

Applicant: Applied Materials, Inc.

Inventor： Nallan, Padmapani C. ,  Hsu, Shu-Ting S. ,  Kumar, Ajay

IPC: H01L21/3065 ,  B81C1/00

CPC classification number: B81C1/00619 ,  B81B2203/033 ,  B81C2201/0112 ,  H01L21/30655

Abstract: A method for plasma etching a trench in a semiconductor substrate using a plurality of processing cycles comprising plasma etch and deposition periods, wherein a substrate bias power is pulsed during the etch periods.

公开(公告)号：EP0865664B1

公开(公告)日：2004-09-22

申请号：EP97911131.7

申请日：1997-10-06

Applicant: ROBERT BOSCH GMBH

Inventor： LÄRMER, Franz ,  SCHILP, Andrea

IPC: H01L21/3065 ,  H01L21/321 ,  H01L21/308

CPC classification number: H01L21/465 ,  B81C1/00619 ,  B81C2201/0112 ,  C23F4/00 ,  H01L21/30655

Abstract: The invention concerns a process for producing etched structures in substrates by means of anisotropic plasma etching. An isotropic etching operation and a side wall passivation are carried out in separate and alternating operations. The substrate (2) is a polymer, a metal, or a multi-component system and portions (8) of the side wall passivation layer (6) applied during the side wall passivation are transferred to the exposed lateral surfaces (7') of the side wall (7) during each subsequent etching operations as a result of which the entire process becomes anisotropic.

公开(公告)号：EP1420438A2

公开(公告)日：2004-05-19

申请号：EP03026193.7

申请日：2003-11-17

Applicant: Applied Materials, Inc.

Inventor： Nallan, Padmapani C. ,  Hsu, Shu-Ting S. ,  Kumar, Ajay

IPC: H01L21/3065

CPC classification number: B81C1/00619 ,  B81B2203/033 ,  B81C2201/0112 ,  H01L21/30655

Abstract: A method for plasma etching a trench in a semiconductor substrate using a plurality of processing cycles comprising plasma etch and deposition periods, wherein a substrate bias power is pulsed during the etch periods.

Abstract translation: 一种使用包括等离子体蚀刻和沉积周期的多个处理循环来等离子体蚀刻半导体衬底中的沟槽的方法，其中衬底偏压功率在蚀刻周期期间被脉冲。

公开(公告)号：EP1360143A2

公开(公告)日：2003-11-12

申请号：EP02708202.3

申请日：2002-02-04

Applicant: ROBERT BOSCH GMBH

Inventor： FISCHER, Frank ,  FREY, Wilhelm ,  METZGER, Lars

IPC: B81B3/00

CPC classification number: G01P15/125 ,  B81B2201/025 ,  B81C1/00619 ,  B81C2201/0112 ,  G01P15/0802 ,  G01P2015/0814

Abstract: The invention relates to a method for producing surface micromechanical structures having a high aspect ratio. At least one sacrificial layer (20) is provided between a substrate (30) and a functional layer (10). Trenches (60, 61) are provided in said functional layer (10) by means of a plasma etching process, said trenches uncovering at least some surface areas (21, 22) of the sacrificial layer (20). According to the invention, a further layer (70) is deposited at least partially on the lateral walls of the trenches, but not on the uncovered surface areas (21, 22) of the sacrificial layer (20), in order to increase the aspect ratio of said trenches. The invention also relates to a sensor, especially an acceleration or rotational rate sensor.

公开(公告)号：EP1099244A2

公开(公告)日：2001-05-16

申请号：EP99934921.0

申请日：1999-07-23

Applicant: Surface Technology Systems Limited

Inventor： BHARDWAJ, Jyoti, Kiron

IPC: H01L21/306 ,  H01L21/311 ,  H01L21/3213

CPC classification number: B81C1/00619 ,  B01J12/007 ,  B01J19/2445 ,  B01J2219/00038 ,  B01J2219/0004 ,  B01J2219/00058 ,  B01J2219/00162 ,  B01J2219/0809 ,  B01J2219/0841 ,  B01J2219/0869 ,  B01J2219/0871 ,  B01J2219/0894 ,  B81C2201/0112 ,  C01B7/24 ,  C07C17/00 ,  H01L21/30621 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32135 ,  H01L21/32136

Abstract: There is disclosed a method of treating a substrate material or a film present on the material surface comprising cyclically performing the following steps: (a) etching the material or film; (b) depositing or forming a passivation layer on the surfaces of an etched feature; and (c) selectively removing the passivation layer from the etched feature in order that the etching proceeds in a direction substantially perpendicular to the material or film surface. At least one of the steps (a) or (b) is performed in the absence of a plasma. Also disclosed is an apparatus for performing the method.

公开(公告)号：EP0683921A1

公开(公告)日：1995-11-29

申请号：EP94903348.0

申请日：1993-12-03

Applicant: CORNELL RESEARCH FOUNDATION, INC.

Inventor： SHAW, Kevin, A. ,  ZHANG, Z., Lisa ,  MACDONALD, Noel, C.

IPC: C23F4 ,  B81B3 ,  G01P15 ,  H01L21 ,  H01L29

CPC classification number: B81C1/00619 ,  B81C1/00142 ,  B81C1/0015 ,  B81C1/00626 ,  B81C2201/0112 ,  B81C2201/0132 ,  B81C2201/053 ,  G01P15/0802 ,  G01P15/125 ,  G01P2015/0814 ,  G01P2015/0817 ,  G01P2015/0828 ,  Y10S73/01 ,  Y10S148/05

Abstract: The invention provides a single mask, low temperature reactive ion etching process for fabricating high aspect ratio, released single crystal microelectromechanical structures independent of crystal orientation. A dielectric mask (12) on a single-crystal substrate (154) is patterned to define isolating trenches. A protective conformal layer (28) is applied to the resultant structure. The conformal layer (28) on the floor of the trenches is removed and a second etch deepens the trench to expose the mesa walls which are removed during the release step by isotropic etching. A metal layer (44) is formed on the resultant structure providing opposed plates (156) and (158) of a capacitor. The cantilever beam (52) with the supporting end wall (152) extends the grid-like structure (150) into the protection of the deepened isolation trenches (54). A membrane can be added to the released structures to increase their weight for use in accelerometers, and polished for use as movable mirrors.