公开(公告)号：EP3333888A1

公开(公告)日：2018-06-13

申请号：EP17205927.1

申请日：2017-12-07

申请人： Semiconductor Manufacturing International Corporation (Shanghai) ,  Semiconductor Manufacturing International Corporation (Beijing)

发明人： ZHOU, Fei

IPC分类号： H01L21/8234 ,  H01L27/088 ,  H01L21/3213

CPC分类号： H01L21/823456 ,  C23F1/00 ,  H01L21/28114 ,  H01L21/32135 ,  H01L21/32137 ,  H01L21/32139 ,  H01L21/823418 ,  H01L21/823431 ,  H01L27/088 ,  H01L27/0886 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/42376 ,  H01L29/7848

摘要： A semiconductor device and a fabrication method are provided. The fabrication method includes providing a base substrate (300) including a first region (I) for forming a first transistor and a second region (II) for forming a second transistor, the first transistor having a working current less than the second transistor. The fabrication method further includes forming a gate electrode layer on the base substrate; etching the gate electrode layer to form a first gate electrode (231) in the first region; after forming the first gate electrode, etching the gate electrode layer to form a second gate electrode (232) in the second region, with the second gate electrode (232) having an undercut structure; forming a first source/drain doped region in the base substrate on both sides of the first gate electrode and forming a second source/drain region in the base substrate on both sides of the second gate electrode.

公开(公告)号：EP2171750B1

公开(公告)日：2013-09-11

申请号：EP08774671.5

申请日：2008-07-02

申请人： Robert Bosch GmbH

发明人： BECKER, Volker ,  LAERMER, Franz ,  FUCHS, Tino ,  LEINENBACH, Christina

IPC分类号： H01L21/3065 ,  H01L21/3213 ,  B81C1/00 ,  B01J19/08

CPC分类号： H01L21/3065 ,  B81C1/00531 ,  B81C1/00595 ,  B81C2201/0132 ,  B81C2201/0138 ,  H01L21/02019 ,  H01L21/30621 ,  H01L21/32135

公开(公告)号：EP1664924B8

公开(公告)日：2012-12-05

申请号：EP04764051.1

申请日：2004-08-12

申请人： Carl Zeiss SMS GmbH

发明人： KOOPS, Hans, W., P. ,  EDINGER, Klaus ,  BABIN, Sergey ,  HOFMANN, Thorsten ,  SPIES, Maria

IPC分类号： G03F1/74 ,  H01J37/305 ,  C23F4/00 ,  H01L21/768 ,  H01L21/3213

CPC分类号： G03F1/74 ,  H01J37/3056 ,  H01J2237/31744 ,  H01L21/31122 ,  H01L21/32135

公开(公告)号：EP1611599A4

公开(公告)日：2007-06-13

申请号：EP04719319

申请日：2004-03-10

申请人： LAM RES CORP

发明人： LOHOKARE SHRIKANT P ,  BAILEY ANDREW D III ,  HEMKER DAVID ,  COOK JOEL M

IPC分类号： H01L21/321 ,  H01L21/3105 ,  H01L21/3213 ,  H01L21/768

CPC分类号： H01L21/32135 ,  H01L21/32115 ,  H01L21/32136 ,  H01L21/7684

摘要： A system and method for planarizing a patterned semiconductor substrate includes receiving a patterned semiconductor substrate. The patterned semiconductor substrate having a conductive interconnect material filling multiple of features in the pattern. The conductive interconnect material having an overburden portion. The overburden portion includes a localized non-uniformity. An additional layer is formed an the overburden portion. The additional layer and the overburden portion are planarized. The planarizing process substantially entirely removes the additional layer.

公开(公告)号：EP1565933A4

公开(公告)日：2007-05-02

申请号：EP03779469

申请日：2003-11-05

申请人： EPION CORP

发明人： HAUTALA JOHN J

IPC分类号： C23F4/00 ,  H01L20060101 ,  H01L21/302 ,  H01L21/3213 ,  H01L21/768

CPC分类号： H01L21/76865 ,  C23F4/00 ,  H01J2237/0812 ,  H01L21/32135 ,  H01L21/76843 ,  H01L21/76862 ,  H01L21/76877

摘要： Method for removing and/or redistributing material in the trenches and/or vias of integrated circuit interconnect structures by a gas cluster ion beam (GCIB) (128) is described to improve the fabrication process and quality of metal (304) interconnects in an integrated circuit. The process entails opening up an undesired 'necked in' region at the entrance to the structure, re-depositing the barrier metal (308) from thicker areas such as the neck or bottom of the structure to the side walls and/or removing some of the excess and undesired material on the bottom of the structure by sputtering. The GCIB process may be applied after the barrier metal deposition and before the copper seed layer (310) / copper (312) electroplating or the process may be applied after the formation of the copper seed layer (310) and before electroplating. The method may extend the usability of the known interconnect deposition technologies to next generation integrated circuits and beyond.

公开(公告)号：EP1099244B1

公开(公告)日：2007-01-24

申请号：EP99934921.0

申请日：1999-07-23

申请人： SURFACE TECHNOLOGY SYSTEMS PLC

发明人： BHARDWAJ, Jyoti, Kiron

IPC分类号： H01L21/306 ,  H01L21/311 ,  H01L21/3213

CPC分类号： B81C1/00619 ,  B01J12/007 ,  B01J19/2445 ,  B01J2219/00038 ,  B01J2219/0004 ,  B01J2219/00058 ,  B01J2219/00162 ,  B01J2219/0809 ,  B01J2219/0841 ,  B01J2219/0869 ,  B01J2219/0871 ,  B01J2219/0894 ,  B81C2201/0112 ,  C01B7/24 ,  C07C17/00 ,  H01L21/30621 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32135 ,  H01L21/32136

摘要： There is disclosed a method of treating a substrate material or a film present on the material surface comprising cyclically performing the following steps: (a) etching the material or film; (b) depositing or forming a passivation layer on the surfaces of an etched feature; and (c) selectively removing the passivation layer from the etched feature in order that the etching proceeds in a direction substantially perpendicular to the material or film surface. At least one of the steps (a) or (b) is performed in the absence of a plasma. Also disclosed is an apparatus for performing the method.

公开(公告)号：EP1024965B1

公开(公告)日：2006-06-14

申请号：EP98944639.8

申请日：1998-09-01

申请人： Arch Specialty Chemicals, Inc.

发明人： LOVE, M., Lee, Jr. ,  HONDA, Kenji

IPC分类号： B44C1/22 ,  H01L21/00 ,  C11D7/26 ,  C11D7/10 ,  C11D7/32 ,  C11D3/33 ,  C11D3/20 ,  C11D11/00 ,  G03F7/42 ,  H01L21/306 ,  H01L21/3213

CPC分类号： C11D7/06 ,  C11D3/0073 ,  C11D7/105 ,  C11D7/265 ,  C11D7/3245 ,  C11D11/0047 ,  G03F7/422 ,  G03F7/425 ,  H01L21/0206 ,  H01L21/02071 ,  H01L21/31133 ,  H01L21/31138 ,  H01L21/32135

摘要： A process of treating a substrate having photoresist applied thereto, comprising the steps of: (a) removing said photoresist from said substrate by a method selected from the group consisting of photoresist stripping, plasma etch residue cleaning, or a combination thereof; and (b) rinsing said substrate with a non-corrosive rinsing composition comprising: (1) water; and (2) one or more water-soluble corrosion inhibitors selected from the group consisting essentially of hydroxylamine, at least one hydroxylammonium salt, at least one water-soluble organic acid, at least one amino acid, and combinations thereof.

公开(公告)号：EP1382565A4

公开(公告)日：2005-11-16

申请号：EP02707133

申请日：2002-03-22

申请人： TOYOTA CHUO KENKYUSHO KK

发明人： SHIMAOKA KEIICHI ,  SAKATA JIRO ,  MIZUNO TAKANORI ,  OKUDA KATSUHARU ,  MATSUI MASAYUKI ,  SUZUKI YASUHIKO

IPC分类号： B81B3/00 ,  B81C1/00 ,  H01L21/00 ,  H01L21/302

CPC分类号： H01L21/31116 ,  H01L21/3065 ,  H01L21/32135 ,  H01L21/67069

公开(公告)号：EP1231628A1

公开(公告)日：2002-08-14

申请号：EP01103005.3

申请日：2001-02-08

申请人： Infineon Technologies SC300 GmbH & Co. KG

发明人： Storbeck, Olaf ,  Kurtenbach, Andreas ,  Kuerner, Wolfgang

IPC分类号： H01L21/02 ,  H01L21/8242

CPC分类号： H01L28/84 ,  H01L21/32135

摘要： The present invention relates to a method for roughening a surface of a semiconductor substrate (1) comprising the steps of arranging the semiconductor substrate (1) in a furnace, providing a gas mixture comprising an inert gas and a halogen or a halogen-hydrogen compound in the furnace and providing a temperature between 700 and 1200°C in the furnace. The inventive method is capable of roughening the surface of a semiconductor substrate resulting in an increased capacitor area with an increased capacity.

摘要翻译： 本发明涉及一种用于使半导体衬底（1）的表面粗糙化的方法，包括以下步骤：将半导体衬底（1）布置在炉中，提供包含惰性气体和卤素或卤素 - 氢化合物的气体混合物 并在炉内提供700至1200℃的温度。 本发明的方法能够使半导体衬底的表面变粗糙，从而增加电容器面积并增加容量。

公开(公告)号：EP0865074A2

公开(公告)日：1998-09-16

申请号：EP98101176.0

申请日：1998-01-23

申请人： SIEMENS AKTIENGESELLSCHAFT

发明人： Dreybrodt, Jörg ,  Drescher, Dirk, Dr. ,  Zedlitz, Ralf ,  Wege, Stephan

IPC分类号： H01L21/205 ,  H01L21/28

CPC分类号： C23C16/24 ,  C23C16/0272 ,  C23C16/42 ,  C23C16/4404 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/28061 ,  H01L21/32135 ,  H01L21/32137 ,  H01L21/32155

摘要： Die Erfindung betrifft ein Verfahren zur Herstellung dotierter Polysiliciumschichten und -schichtstrukturen sowie ein Verfahren zum Strukturieren derartiger Schichten und Schichtstrukturen, welche Polysilicumschichten umfassen. Das Dotierverfahren zeichnet sich dadurch aus, daß die Dotierverbindung als Prozeßgas bei der chemischen Gasphasenabscheidung des Polysiliciums zugesetzt wird, deren Zufuhr zum Prozeßgas jedoch gegen Ende der Gasphasenabscheidung gestoppt wird, so daß eine Grenzschicht aus undotiertem Silicium abgeschieden wird. Hierdurch wird eine günstige Oberflächenbeschaffenheit und bessere Haftfähigkeit zu einer Nachbarschicht erreicht. Das Strukturierungsverfahren umfaßt einen wenigstens dreistufigen Ätzprozeß, bei welchem in einer ersten Stufe ein fluorhaltiges Gas, in einer zweiten Stufe ein chlorhaltiges Gas und in einer dritten Stufe ein bromhaltiges Gas zum Ätzen verwendet wird.
Die Erfindung betrifft weiterhin Wafer und Halbleiterchips, die unter Verwendung des Dotierverfahrens und/oder des Strukturierungsverfahrens hergestellt wurden.

摘要翻译： 在制造掺杂多晶硅层和含有这种层的层结构的层中，其中在CVD期间将掺杂化合物加入到工艺气体中，掺杂化合物添加在实现期望的掺杂和期望的沉积持续时间后终止，使得 沉积未掺杂硅层的边界层。 优选地，掺杂化合物是B，Ga，In，P，As或Sb的气态或挥发性化合物，特别是乙硼烷，三甲基硼，膦或胂。 还要求保护的是通过在第一阶段中使用含氟气体（优选NF 3，SiF 4，SF 6和/或氟化烃）的三级蚀刻工艺来在多晶硅层上构造具有金属或金属硅化物层的层结构的方法 ，第二阶段的含氯气体（优选HCl，Cl 2和/或BCl 3）和第三阶段中的含溴气体（优选HBr）。 还要求保护的是使用上述一种或两种方法制造的晶片或半导体芯片。