公开(公告)号：EP0492374B1

公开(公告)日：1996-02-07

申请号：EP91121650.5

申请日：1991-12-17

申请人： SGS-THOMSON MICROELECTRONICS S.r.l.

发明人： Botti, Edoardo ,  Brasca, Guido

IPC分类号： H03F3/30

CPC分类号： H03F3/45286 ,  H03F3/3008 ,  H03F3/3037 ,  H03F3/45291 ,  H03F2203/45028 ,  H03F2203/45188 ,  H03F2203/45471

公开(公告)号：EP0595589A3

公开(公告)日：1994-10-12

申请号：EP93308504.5

申请日：1993-10-26

申请人： SGS-THOMSON MICROELECTRONICS, INC.

发明人： Ryat, Marc Henri

IPC分类号： H03F3/45

CPC分类号： H03F3/4521 ,  H03F3/45121 ,  H03F3/45529 ,  H03F2203/45028 ,  H03F2203/45126 ,  H03F2203/45212 ,  H03F2203/45232 ,  H03F2203/45366 ,  H03F2203/45402 ,  H03F2203/45711

摘要： An amplifier having a rail-to-rail common mode input range that can be used in low voltage power supply applications includes differential input and output stages, the output stage having first and second current paths. First and second output duplicating circuits are respectively connected in parallel with the first and second current paths in the differential output stage to duplicate the differential output. A circuit for detecting a common-mode voltage difference is provided between nodes of the first and second output duplicating circuits for developing a current related to the common-mode voltage difference. A current mirror circuit is connected to receive the current related to the common-mode voltage difference for controlling the current in the first and second current paths in the differential output stage. The circuit for detecting a common-mode voltage difference between nodes of the first and second output duplicating circuits can be established by a transistor that senses only common-mode current. The transistor has a control element connected to the nodes in the output duplicating circuits and a current path to a supply voltage.

公开(公告)号：EP2156560B1

公开(公告)日：2018-05-23

申请号：EP08735909.7

申请日：2008-04-07

申请人： TEXAS INSTRUMENTS DEUTSCHLAND GMBH

发明人： RUCK, Bernhard Wolfgang ,  GERBER, Johannes

IPC分类号： H02M3/07 ,  H03L7/089

CPC分类号： H03L7/0896 ,  H02M3/07 ,  H03F2203/45028 ,  H03F2203/45326

摘要： A charge pump CMOS circuit comprises a differential input stage with two parallel circuit branches. Each of the parallel circuit branches has a diode-connected MOS transistor connected in series with a complementary input MOS transistor. There is a common tail current source for both circuit branches. The diode-connected MOS transistors each have their gate/drain node connected to corresponding current sources. The charge pump CMOS circuit is suitable for use in an oscillator.

公开(公告)号：EP2804316A2

公开(公告)日：2014-11-19

申请号：EP14164157.1

申请日：2014-04-10

申请人： Renesas Electronics Corporation

发明人： FUNATO, Yoshihiro ,  KUMAMOTO, Toshio ,  YOSHIZAWA, Tomoaki ,  KUROOKA, Kazuaki

IPC分类号： H03F3/393

CPC分类号： H03F3/2171 ,  H03F3/005 ,  H03F3/393 ,  H03F3/45179 ,  H03F3/45192 ,  H03F3/45762 ,  H03F3/45946 ,  H03F2200/264 ,  H03F2200/271 ,  H03F2200/375 ,  H03F2200/408 ,  H03F2200/411 ,  H03F2200/81 ,  H03F2203/45012 ,  H03F2203/45028 ,  H03F2203/45116 ,  H03F2203/45136 ,  H03F2203/45138 ,  H03F2203/45174 ,  H03F2203/45212 ,  H03F2203/45512 ,  H03F2203/45528 ,  H03F2203/45558 ,  H03F2203/45594 ,  H03F2203/45601 ,  H03F2203/45604 ,  H03F2203/45631 ,  H03F2203/45632 ,  H03F2203/45634 ,  H03F2203/45641 ,  H03F2203/45681 ,  H03F2203/45698 ,  H03F2203/45726

摘要： A signal processing circuit includes a chopper amplifier (1) that has a differential amplifier circuit (AMP1) that amplifies differential input signals Vsp(t) and Vsm(t), and an adder circuit (1B) that generates an addition signal Vfil(t) by addition of the chopper output signal Vsub(t) that the chopper amplifier (1) generates. Differential signals inputted into the differential amplifier circuit (AMP1) are interchanged for every first phase period and second phase period, and the adder circuit (1B) generates the addition signal by addition of the chopper output signal in the first phase period and in the second phase period.

公开(公告)号：EP2119000B1

公开(公告)日：2010-05-26

申请号：EP07811832.0

申请日：2007-03-23

申请人： MEDTRONIC, INC.

发明人： DENISON, Timothy J. ,  SANTA, Wesley A.

IPC分类号： H03F3/38 ,  H03F1/26 ,  H03F3/45 ,  H03F3/387

CPC分类号： H03F3/387 ,  A61B5/0002 ,  A61B5/04004 ,  A61B5/0428 ,  A61B5/053 ,  A61B5/103 ,  A61B5/7203 ,  A61B5/7217 ,  A61B5/7228 ,  A61B2560/0209 ,  A61N1/36521 ,  A61N1/3702 ,  A61N1/3704 ,  A61N2001/083 ,  H03F1/26 ,  H03F3/45183 ,  H03F3/45192 ,  H03F3/45475 ,  H03F3/45744 ,  H03F3/45968 ,  H03F2200/153 ,  H03F2200/252 ,  H03F2200/261 ,  H03F2200/271 ,  H03F2200/372 ,  H03F2200/375 ,  H03F2203/45028 ,  H03F2203/45138 ,  H03F2203/45212 ,  H03F2203/45264 ,  H03F2203/45396 ,  H03F2203/45512 ,  H03F2203/45534 ,  H03F2203/45551

公开(公告)号：EP1921747A1

公开(公告)日：2008-05-14

申请号：EP06023152.9

申请日：2006-11-07

申请人： Austriamicrosystems AG

发明人： Singnurkar, Pramod

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F3/45188 ,  H03F2203/45028 ,  H03F2203/45292 ,  H03F2203/45314 ,  H03F2203/45398

摘要： An amplifier arrangement comprises a first transistor (MP10), a first bias transistor (MN9), a second transistor (MN8) and a second bias transistor (MN7). A first input signal (VN) is supplied to a control terminal of the first transistor (MP10) for amplification. The first bias transistor (MN9) is coupled to the first transistor (MP10) via a first node (11). A first terminal of the second transistor (MN8) is coupled to a second node (12). A control terminal of the second transistor (MN8) is coupled to a second terminal of the second transistor (MN8) and to a control terminal of the first bias transistor (MN9). A first amplified signal (VN1) is provided at the control terminal of the first bias transistor (MN9). The second bias transistor (MN7) is coupled to the second transistor (MN8) via the second node (12). The second node (12) is coupled to the first node (11).

摘要翻译： 放大器装置包括第一晶体管（MP10），第一偏置晶体管（MN9），第二晶体管（MN8）和第二偏置晶体管（MN7）。 第一输入信号（VN）被提供给用于放大的第一晶体管（MP10）的控制端子。 第一偏置晶体管（MN9）经由第一节点（11）耦合到第一晶体管（MP10）。 第二晶体管（MN8）的第一端子耦合到第二节点（12）。 第二晶体管（MN8）的控制端子耦合到第二晶体管（MN8）的第二端子和第一偏置晶体管（MN9）的控制端子。 第一放大信号（VN1）设置在第一偏置晶体管（MN9）的控制端。 第二偏置晶体管（MN7）经由第二节点（12）耦合到第二晶体管（MN8）。 第二节点（12）耦合到第一节点（11）。

公开(公告)号：EP1850477A3

公开(公告)日：2007-11-28

申请号：EP07106708.6

申请日：2007-04-23

申请人： Qimonda AG

发明人： Gopalakrishnan, Karthik ,  Partovi, Hamid ,  Ravezzi, Luca

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F2203/45028 ,  H03F2203/45548

摘要： An operational amplifier (22) including a first current mirror (32), a second current mirror (34), and a differential pair of transistors (36). The differential pair of transistors (36) are configured to receive two inputs (VIN-, VIN+) to direct current through the first current mirror (32) and the second current mirror (34). The first current mirror (32) provides a first current to a first high impedance node (60) and the second current mirror (34) provides a second current to a second high impedance node (28).

摘要翻译： 包括第一电流镜（32），第二电流镜（34）和差分对晶体管（36）的运算放大器（22）。 差分对晶体管（36）被配置为接收两个输入（VIN-，VIN +）以引导电流通过第一电流镜（32）和第二电流镜（34）。 第一电流镜（32）向第一高阻抗节点（60）提供第一电流，并且第二电流镜（34）向第二高阻抗节点（28）提供第二电流。

公开(公告)号：EP1850476A1

公开(公告)日：2007-10-31

申请号：EP07013797.1

申请日：2000-12-01

申请人： YAMAHA CORPORATION

发明人： Maejima, Toshio

IPC分类号： H03F3/45 ,  H03F3/30

CPC分类号： H03F3/45179 ,  H03F3/3028 ,  H03F3/45192 ,  H03F2203/45028 ,  H03F2203/45292 ,  H03F2203/45651

摘要： A differential amplifier circuit of the present invention comprises an input circuit 10 for producing a difference voltage signal between a positive input signal and a negative input signal, a feedback bias circuit 20 for inputting the difference voltage signal supplied from the input circuit 10 to provide a bias voltage corresponding to the difference voltage signal and for performing a feedback control on the bias voltage by feeding back an output current, an output circuit 30 for supplying a load with the output current corresponding to the bias voltage, and a current detection circuit 40 for detecting the output current to provide it to the feedback bias circuit 20. The differential amplifier circuit performs class-AB amplification in such a way that the bias voltage provides a current value close to zero when the difference voltage signal is substantially zero.

摘要翻译： 本发明的差分放大电路包括用于产生正输入信号和负输入信号之间的差分电压信号的输入电路10，用于输入从输入电路10提供的差分电压信号的反馈偏置电路20， 对应于差分电压信号的偏置电压，并且通过反馈输出电流来执行对偏置电压的反馈控制;输出电路30，用于向负载提供与偏置电压相对应的输出电流;以及电流检测电路40，用于 检测输出电流以将其提供给反馈偏置电路20.差分放大器电路以这样的方式执行AB类放大，使得当差分电压信号基本为零时，偏置电压提供接近零的电流值。

公开(公告)号：EP1239585A4

公开(公告)日：2005-09-14

申请号：EP00978050

申请日：2000-12-01

申请人： YAMAHA CORP

发明人： MAEJIMA TOSHIO

IPC分类号： H03F3/30 ,  H03F3/45

CPC分类号： H03F3/45179 ,  H03F3/3028 ,  H03F3/45192 ,  H03F2203/45028 ,  H03F2203/45292 ,  H03F2203/45651

摘要： A differential amplifier circuit comprises an input circuit (10) for generating the difference in voltage between a positive input signal and a negative input signal; a feedback bias circuit (20) for providing a bias voltage corresponding to the differential voltage signal in response to the differential voltage signal supplied by the input circuit (10) and for feeding the output current back to control the bias voltage; an output circuit (30) for supplying load with the output current corresponding to the bias voltage; and a current detector circuit (40) for detecting the output current and supplying it to the feedback bias circuit (20). The differential amplifier circuit performs as a class-AB amplifier with the bias current value being close to zero if the differential voltage signal is zero.

公开(公告)号：EP1122882A3

公开(公告)日：2004-09-22

申请号：EP00127728.4

申请日：2000-12-18

申请人： Semiconductor Technology Academic Research Center

发明人： Wada, Kazuyuki ,  Takagi, Shigetaka ,  Fujii, Nobuo

IPC分类号： H03F3/45

CPC分类号： H03F3/45192 ,  H03F1/301 ,  H03F3/45475 ,  H03F2200/513 ,  H03F2203/45028 ,  H03F2203/45138

摘要： A semiconductor integrated circuit comprises an amplifier circuit including a current output amplifier (1), a load resistor (2) having one end connected to an output terminal of the current output amplifier and a voltage control circuit (3) having an input terminal connected to the one end of the load resistor and an output terminal connected to an other end of the load resistor. The input terminal of the amplifier circuit serves as an input terminal of the current output amplifier, and the output terminals of the amplifier circuit serve as the individual ends of the load resistor.

摘要翻译： 一种半导体集成电路，包括：包括电流输出放大器（1）的放大器电路;一端连接到电流输出放大器的输出端的负载电阻器（2）;以及电压控制电路（3），其输入端连接到 负载电阻器的一端和连接到负载电阻器另一端的输出端子。 放大器电路的输入端用作电流输出放大器的输入端，放大器电路的输出端用作负载电阻器的各端。