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924 条记录 (耗时 0.018 秒)

    AMPLIFIER WITH PROGRAMMABLE OFF VOLTAGE
    61.
    发明公开
    AMPLIFIER WITH PROGRAMMABLE OFF VOLTAGE 审中-公开
    VERSTÄRKERMIT程序员AUS-SPANNUNG

    公开(公告)号：EP2359473A1

    公开(公告)日：2011-08-24

    申请号：EP09793660.3

    申请日：2009-12-10

    申请人： QUALCOMM Incorporated

    发明人： CHEN, Minghui

    IPC分类号： H03F1/22 ,  H03F1/52 ,  H03F3/195 ,  H03F3/24 ,  H03F3/72 ,  H03G3/30 ,  H04B1/04 ,  H03G1/00 ,  H03F3/21

    CPC分类号： H03F1/223 ,  H03F1/523 ,  H03F3/195 ,  H03F3/211 ,  H03F3/245 ,  H03F3/72 ,  H03F2200/108 ,  H03F2200/294 ,  H03F2203/21178 ,  H03F2203/7236 ,  H03G1/0088

    摘要： An amplifier with multiple stages and having improved reliability is described. The multiple amplifier stages are coupled in parallel and include at least one switchable amplifier stage. Each switchable amplifier stage may be operated in an on state or an off state and includes a gain transistor and a cascode transistor. The gain transistor amplifies an input signal and provides an amplified signal in the on state and is disabled in the off state. The cascode transistor buffers the amplified signal and provides an output signal in the on state and is disabled based on an off voltage in the off state. The off voltage may be greater than zero volts or may have one of multiple possible values. The off voltage may be generated based on an output signal level, e.g., may be set to different values for different ranges of output signal level.

    摘要翻译： 描述了具有多级并具有改进的可靠性的放大器。 多个放大器级并联耦合并且包括至少一个可切换放大器级。 每个可切换放大器级可以工作在导通状态或截止状态，并且包括增益晶体管和共源共栅晶体管。 增益晶体管放大输入信号，并将放大信号提供在导通状态，并在关断状态下被禁止。 共源共栅晶体管缓冲放大的信号，并提供处于导通状态的输出信号，并且基于截止状态下的截止电压被禁用。 关断电压可以大于零伏特，或者可以具有多个可能值中的一个。 可以基于输出信号电平产生关断电压，例如，可以将输出信号电平的不同范围设置为不同的值。

    HIGH-LINEARITY LOW-NOISE RECEIVER WITH LOAD SWITCHING
    64.
    发明公开
    HIGH-LINEARITY LOW-NOISE RECEIVER WITH LOAD SWITCHING 有权
    HOCHLINEARER RAUSCHARMEREMPFÄNGERMIT LASTUMSCHALTUNG

    公开(公告)号：EP2327152A1

    公开(公告)日：2011-06-01

    申请号：EP09791629.0

    申请日：2009-08-18

    申请人： QUALCOMM Incorporated

    发明人： LIU, Li ,  GUDEM, Prasad, S.

    IPC分类号： H03F1/56 ,  H03F3/45

    CPC分类号： H03F1/32 ,  H03F1/0277 ,  H03F1/223 ,  H03F1/56 ,  H03F3/45188 ,  H03F3/72 ,  H03F2200/294 ,  H03F2200/336 ,  H03F2203/45386 ,  H03F2203/45394 ,  H03F2203/45726 ,  H03F2203/7206 ,  H03F2203/7236 ,  H04B1/109 ,  H04B1/18

    摘要： A receiver includes a low noise amplifier (LNA) and multiple pairs of mixers. The LNA receives and amplifies an LNA input signal and provides at least one LNA output signal. Each pair of mixers downconverts one of the at least one LNA output signal when enabled. Each pair of mixers may be selectively enabled or disabled, e.g., based on a mode selected from among multiple modes. In one design, the LNA includes multiple load sections coupled in parallel. Each load section may be selectively enabled or disabled, e.g., based on the selected mode. In one design, first and second pairs of mixers and first and second load sections may be enabled for a high linearity mode. The first pair of mixers and the first load section may be enabled and the second pair of mixers and the second load section may be disabled for a low linearity mode.

    摘要翻译： 接收机包括低噪声放大器（LNA）和多对混频器。 LNA接收并放大LNA输入信号并提供至少一个LNA输出信号。 当使能时，每对混频器下变频至少一个LNA输出信号。 可以例如基于从多个模式中选择的模式来选择性地启用或禁用每对混频器。 在一个设计中，LNA包括并联耦合的多个负载部分。 可以例如基于所选择的模式来选择性地启用或禁用每个加载部分。 在一种设计中，第一和第二对混频器以及第一和第二负载部分可被启用用于高线性模式。 可以启用第一对混频器和第一负载部分，并且可以对于低线性模式禁用第二对混频器和第二负载部分。

    QUADRATURE OFFSET POWER AMPLIFIER
    67.
    发明授权
    QUADRATURE OFFSET POWER AMPLIFIER 有权
    具有平方率OFFSET功率放大器

    公开(公告)号：EP1749342B1

    公开(公告)日：2011-03-30

    申请号：EP05754923.0

    申请日：2005-05-19

    申请人： RAYTHEON COMPANY

    发明人： SELIN, John, R.

    IPC分类号： H03F1/02 ,  H03F3/191 ,  H03F3/21 ,  H03F3/72

    CPC分类号： H03F1/0261 ,  H03F1/0277 ,  H03F1/0288 ,  H03F3/191 ,  H03F3/211 ,  H03F3/72 ,  H03F2200/225 ,  H03F2200/391

    摘要： An amplifier having a first transistor with an output coupled to a common output node and a switch for coupling a control electrode of the first transistor to a first bias source to bias such first transistor to a conducting state during a relatively high power operating mode or for removing such control electrode from the first bias source to place the first transistor in a non-conducting condition during a relatively low power operating mode selectively in accordance with a control signal. A second transistor has an output coupled to the common output node and a second bias source coupled to a control electrode to the second transistor to bias such second transistor to a conducting state during both the relatively high power operating mode and the relatively low power operating mode.

    SYSTEM AND METHOD OF USING RESIDUAL VOLTAGE FROM A PRIOR OPERATION TO ESTABLISH A BIAS VOLTAGE FOR A SUBSEQUENT OPERATION
    70.
    发明公开
    SYSTEM AND METHOD OF USING RESIDUAL VOLTAGE FROM A PRIOR OPERATION TO ESTABLISH A BIAS VOLTAGE FOR A SUBSEQUENT OPERATION 审中-公开
    系统和方法对于使用REST电压从以前的操作产生偏压后续操作

    公开(公告)号：EP2274659A1

    公开(公告)日：2011-01-19

    申请号：EP08714261.8

    申请日：2008-03-14

    申请人： Qualcomm Incorporated

    发明人： FAGG, Russell John

    IPC分类号： G05F3/08 ,  H03F1/02 ,  H03F1/06

    CPC分类号： H03F1/0233 ,  H03F3/193 ,  H03F3/3022 ,  H03F3/72 ,  H03F2200/294 ,  H03F2200/507 ,  H03F2200/511 ,  H03F2203/30031 ,  H04B2001/6908

    摘要： A system and method of improving the power efficiency of a receiver for low duty cycle applications. In one aspect, the receiver includes a low noise amplifier (LNA) that is capable of being enabled in a relatively quick fashion so as to amplify an incoming signal when needed, and then being disabled to set the LNA in a low power consumption mode. In particular, the LNA includes a pair of complimentary devices, and an enable circuit adapted to quickly cause the complimentary devices to conduct substantially the same current. In another aspect, a bias voltage generating apparatus is provided that uses a residual voltage from a prior operation to establish the current bias voltage for the LNA. In particular, the apparatus includes a controller adapted to tune an adjustable capacitor to a capacitance based on a residual voltage applied to a fixed capacitor, and couple the capacitors together to establish the bias voltage.