公开(公告)号：EP0183474B1

公开(公告)日：1991-04-24

申请号：EP85308422.6

申请日：1985-11-19

申请人： FUJITSU LIMITED

发明人： Yokoyama, Naoki

IPC分类号： H01L29/80

CPC分类号： H01L29/7722 ,  H01L29/205

公开(公告)号：EP0357248A1

公开(公告)日：1990-03-07

申请号：EP89307963.2

申请日：1989-08-04

申请人： FUJITSU LIMITED

发明人： Arimoto, Hiroshi ,  Muto, Shunichi ,  Sasa, Shigehiko ,  Okada, Makoto ,  Yokoyama, Naoki

IPC分类号： H01L29/08 ,  H01L29/66

CPC分类号： B82Y10/00 ,  H01L29/66977

摘要： A semiconductor device of the quantum interference type has channel means (4,6;55) for passing carriers from a source region (31;36;52) to a drain region (33;56) of the device, at least part of the said channel means (4,6;55) comprising two conductive paths extending in parallel between the source and drain regions (31;36;52/32;56), and field control means (35;59) arranged for subjecting the said conductive paths to a selectively variable electric or magnetic field so as to control the passage of carriers through the said channel means (4,6;55). The device is provided with carrier-energy filtering means (40;53) arranged for restricting the energy levels, of carriers entering the said channel means (4,6;55), to a predetermined narrow band of energy levels. In this way quantum interference in the device can be improved as compared with a known semiconductor device of the quantum interference type.

摘要翻译： 量子干涉型半导体器件具有用于将载流子从源极区域（31; 36; 52）传送到器件的漏极区域（33; 56）的通道装置（4,6; 55），至少部分 所述通道装置（4,6; 55）包括在源极和漏极区域（31; 36; 52/32; 56）之间并联延伸的两个导电路径;以及场控制装置（35; 59） 路径到选择性可变的电场或磁场，以便控制载流子通过所述通道装置（4,6; 55）的通道。 设备设置有载波能量滤波装置（40; 53），其布置成将进入所述信道装置（4,6; 55）的载波的能级限制到预定的窄带能级。 与已知的量子干涉型半导体器件相比，可以提高器件中的量子干涉。

公开(公告)号：EP0268512A3

公开(公告)日：1989-10-25

申请号：EP87402369.0

申请日：1987-10-21

申请人： FUJITSU LIMITED

发明人： Futatsugi, Toshiro ,  Yokoyama, Naoki ,  Imamura, Kenichi

IPC分类号： H01L29/72 ,  H01L29/205 ,  H01L33/00 ,  H01L29/08 ,  H01L31/10

CPC分类号： H01L29/7376 ,  B82Y10/00 ,  H01L29/0895 ,  H01L29/205 ,  H01L33/0004

摘要： A semiconductor device utilizing the resonant-­tunneling effect, such as a light emitting-resonant-tunneling bipolar transistor, comprises stacked first through fifth semiconductor layers (16, 15B₂, 15W, 15B₁, 13). The semiconductor device has an energy level condition of |Ec₃ - Ec₁ |≒|Ev₃ - Ev₅|, where Ec₃ is a resonant energy level of electrons in a conduction band of the third layer (15W) and Ev₃ is a resonant energy level of holes in a valence band thereof, and Ec₁ is an energy level of a conduction band of the first layer (16) and Ev₅ is an energy level of a valence band of the fifth layer (13).

公开(公告)号：EP0055932A1

公开(公告)日：1982-07-14

申请号：EP81306151.2

申请日：1981-12-24

申请人： FUJITSU LIMITED

发明人： Yokoyama, Naoki

IPC分类号： H01L29/64 ,  H01L21/28

CPC分类号： H01L29/66878 ,  H01L29/475 ,  H01L29/80 ,  H01L29/812

摘要： A Schottky gate electrode of a refractory metal silicide is formed on a compound semiconductor, by which the barrier height is maintained satisfactorily even after heat treatment above 800°C. Accordingly, it is possible to form an impurity diffused region using the Schottky gate electrode as a mask and then effect the recrystallization of the semi-conductor and the activation of the impurity by heat treatment, so that source and drain regions can be positioned by self alignment relative to the gate electrode.

公开(公告)号：EP0112657B1

公开(公告)日：1990-06-20

申请号：EP83307213.5

申请日：1983-11-25

申请人： FUJITSU LIMITED

发明人： Kawata, Haruo ,  Nishi, Hidetoshi ,  Onodera, Hiroyuki ,  Yokoyama, Naoki

IPC分类号： H01L29/10 ,  H01L29/80 ,  H01L21/265 ,  H01L21/318

CPC分类号： H01L29/66878 ,  H01L21/26546 ,  H01L21/26553 ,  H01L21/318 ,  H01L21/3245 ,  H01L29/1029 ,  H01L29/36 ,  H01L29/475 ,  H01L29/812

公开(公告)号：EP0180457A3

公开(公告)日：1989-06-07

申请号：EP85307819.4

申请日：1985-10-29

申请人： FUJITSU LIMITED

发明人： Ohshima, Toshio ,  Yokoyama, Naoki

IPC分类号： H01L21/76 ,  H01L29/205

CPC分类号： H01L21/2633 ,  H01L21/02395 ,  H01L21/02463 ,  H01L21/02505 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/7605 ,  H01L21/8252 ,  H01L27/0605 ,  H01L29/205 ,  H01L29/7371 ,  H01L29/812

摘要： A compound semiconductor (e.g., GaAs) IC device comprising: a compound semiconductor substrate (1) having a semi-insulating compound surface region; an active element laminated layer (2 to 5) formed on the surface region; an isolation region of a semi-insulating (intrinsic) compound semiconductor (9) which is filled in a groove (7) extending into the surface region through the laminated layer (2 to 5); and active elements formed in the isolated regions (8) of the laminated layer (2 to 5), respectively.

公开(公告)号：EP0177374A3

公开(公告)日：1987-11-25

申请号：EP85401440

申请日：1985-07-15

申请人： FUJITSU LIMITED

发明人： Yokoyama, Naoki

IPC分类号： H01L29/08 ,  H01L29/205

CPC分类号： H01L29/7606 ,  H01L29/152 ,  H01L29/155 ,  H01L29/205

摘要： A high-speed semiconductor device including an emitter layer (18); a base layer (15); a collector layer (13); a potential-barrier layer (14) disposed between the base layer and the collector layer; and a superlattice (16) disposed between the emitter layer and the base layer. The superlattice is formed with at least one quantum well therein and has a low impedance state for tunneling carriers therethrough. Preferably, the high-speed semiconductor device may further include a graded layer (17) disposed between the emitter layer and the superlattice. The graded layer has a conduction-energy level which is approximately equal to that of the emitter layer at one end and is approximatelv equal to a predetermined conduction-energy level of the superlattice at another end. In addition, the high-speed semiconductor device may act as a frequency multiplier.

公开(公告)号：EP0220020A2

公开(公告)日：1987-04-29

申请号：EP86307758.2

申请日：1986-10-08

申请人： FUJITSU LIMITED

发明人： Yokoyama, Naoki ,  Taguchi, Masao

IPC分类号： G11C11/56 ,  H03K3/29 ,  H03K3/36

CPC分类号： B82Y10/00 ,  F16L55/00 ,  G11C11/39 ,  G11C11/56 ,  G11C2211/5614 ,  H03K3/29 ,  H03K3/36

摘要： Logic circuitry (1) includes a resonant-tunneling transistor ( 1) and a resistor (13) connected in series thereto.
The resonant-tunneling transistor has a superlattice structure and may be a resonant-tunneling hot electron transistor or a resonant-tunneling bipolar transistor.
The resonant-tunneling transistor is operable to flow a current, between a collector and an emitter, having one of at least three different current values of a first, a second or a third value in response to a base voltage (V IN ) in one of three different voltage values of a first, second or a third value. The third current value lies between the first and second current values, and the second voltage value lies between the first and third voltage values. The logic circuitry outputs one of at least three states having a high value, a low value, and a value approximately in between the high and low values in response to a signal applied to the logic circuitry the signal having an amplitude of one of the first to third voltage values.

摘要翻译： 逻辑电路（1）包括谐振隧穿晶体管（11）和串联连接的电阻器（13）。 谐振隧穿晶体管具有超晶格结构，并且可以是谐振隧穿热电子晶体管或谐振隧穿双极晶体管。 谐振隧穿晶体管可操作以响应于基极电压（第一，第二或第三值）中的至少三个不同电流值之一流过集电极和发射极之间的电流 VIN）在第一，第二或第三值的三个不同电压值之一中。 第三电流值位于第一和第二电流值之间，第二电压值位于第一和第三电压值之间。 响应于施加到逻辑电路的信号，逻辑电路输出具有高值，低值和大约在高值和低值之间的值的至少三个状态中的一个，该信号具有第一 到第三电压值。

公开(公告)号：EP0186301A1

公开(公告)日：1986-07-02

申请号：EP85308371.5

申请日：1985-11-18

申请人： FUJITSU LIMITED

发明人： Imamura, Kenichi ,  Yokoyama, Naoki ,  Ohshima, Toshio

IPC分类号： H01L29/72 ,  H01L29/36

CPC分类号： B82Y10/00 ,  H01L29/7606

摘要： A high-speed semiconductor device comprising an emitter potential barrier layer (2) disposed between an emitter layer (1) and a base layer (3), a collector layer (5), and a collector potential barrier layer (4a) disposed between the base layer (3) and the collector layer (5). The collector potential barrier layer (4a) has a structure having a barrier height changing from a high level to a low level along the direction from the base layer (3) to the collector layer (5), whereby, even when no bias voltage is applied between the collector layer (5) and the emitter layer (1), a collector current can flow through the device.

摘要翻译： 一种高速半导体器件，包括设置在发射极层（1）和基极层（3）之间的发射极势垒层（2），集电极层（5）和集电极势垒层（4a） 基底层（3）和集电体层（5）。 集电极势垒层（4a）具有从基极层（3）到集电极层（5）的方向从高电平向低电位变化的结构，即使没有偏压为 施加在集电极层（5）和发射极层（1）之间，集电极电流可流过该器件。

公开(公告)号：EP0177374A2

公开(公告)日：1986-04-09

申请号：EP85401440.4

申请日：1985-07-15

申请人： FUJITSU LIMITED

发明人： Yokoyama, Naoki

IPC分类号： H01L29/08 ,  H01L29/205

CPC分类号： H01L29/7606 ,  H01L29/152 ,  H01L29/155 ,  H01L29/205

摘要： A high-speed semiconductor device including an emitter layer (18); a base layer (15); a collector layer (13); a potential-barrier layer (14) disposed between the base layer and the collector layer; and a superlattice (16) disposed between the emitter layer and the base layer. The superlattice is formed with at least one quantum well therein and has a low impedance state for tunneling carriers therethrough.
Preferably, the high-speed semiconductor device may further include a graded layer (17) disposed between the emitter layer and the superlattice. The graded layer has a conduction-energy level which is approximately equal to that of the emitter layer at one end and is approximatelv equal to a predetermined conduction-energy level of the superlattice at another end.
In addition, the high-speed semiconductor device may act as a frequency multiplier.