公开(公告)号：EP1846947A4

公开(公告)日：2009-04-15

申请号：EP05852630

申请日：2005-12-02

Applicant: IBM

Inventor： VEREECKEN PHILIPPE M ,  BASKER VEERARAGHAVAN ,  CABRAL CYRIL JR ,  COOPER EMANUEL I ,  DELIGIANNI HARIKLIA ,  FRANK MARTIN M ,  JAMMY RAJARAO ,  PARUCHURI VAMSI KRISHNA ,  SAENGER KATHERINE L ,  SHAO XIAOYAN

IPC: H01L21/302 ,  H01L29/745

CPC classification number: H01L21/2885 ,  C25D3/50 ,  C25D5/02 ,  C25D5/024 ,  C25D5/54 ,  C25D7/123 ,  C25D9/04 ,  C25F3/14 ,  H01L21/28079 ,  H01L21/28114 ,  H01L21/76885 ,  H01L29/513 ,  H01L29/517 ,  H01L29/78648

Abstract: A method for electroplating a gate metal (9) or other conducting or semiconducting material on a gate dielectric (2) is provided. The method involves selecting a substrate (3, 4), dielectric layer, and electrolyte solution or melt, wherein the combination of the substrate, dielectric layer, and electrolyte solution or melt allow an electrochemical current to be generated at an interface between the dielectric layer and the electrolyte solution or melt.

公开(公告)号：EP1886342A4

公开(公告)日：2011-06-15

申请号：EP06770646

申请日：2006-05-18

Applicant: IBM

Inventor： FOGEL KEITH E ,  SAENGER KATHERINE L ,  SUNG CHUN-YUNG ,  YIN HAIZHOU

IPC: H01L21/336 ,  H01L21/76 ,  H01L21/8236

CPC classification number: H01L21/2022 ,  H01L21/76224 ,  H01L21/823807

Abstract: The present invention provides an improved amorphization/templated recrystallization (ATR) method for fabricating low-defect-density hybrid orientation substrates. ATR methods for hybrid orientation substrate fabrication generally start with a Si layer having a first orientation bonded to a second Si layer or substrate having a second orientation. Selected regions of the first Si layer are amorphized and then recrystallized into the orientation of the second Si layer by using the second Si layer as a template. In particular, this invention provides a melt-recrystallization ATR method, for use alone or in combination with non-melt-recrystallization ATR methods, in which selected Si regions bounded by dielectric-filled trenches are induced to undergo an orientation change by the steps of preamorphization, laser-induced melting, and corner-defect-free templated recrystallization from the melt.

公开(公告)号：EP1842240A4

公开(公告)日：2009-10-14

申请号：EP05826022

申请日：2005-12-02

Applicant: IBM

Inventor： CALLEGARI ALESSANDRO C ,  GRIBELYUK MICHAEL A ,  LACEY DIANNE L ,  MCFEELY FENTON R ,  SAENGER KATHERINE L ,  ZAFAR SUFI

IPC: H01L21/28 ,  C23C14/06 ,  C23C14/34 ,  H01L29/49 ,  H01L29/51

CPC classification number: H01L29/4966 ,  C23C14/0036 ,  C23C14/0635 ,  H01L21/28088 ,  H01L29/513 ,  H01L29/517 ,  H01L29/665

公开(公告)号：EP1875508A4

公开(公告)日：2009-08-05

申请号：EP06750977

申请日：2006-04-21

Applicant: IBM

Inventor： DESOUZA JOEL P ,  SADANA DEVENDRA K ,  SAENGER KATHERINE L ,  SUNG CHUN-YUNG ,  YANG MIN ,  YIN HAIZHOU

IPC: H01L29/04

CPC classification number: H01L29/6659 ,  H01L21/26506 ,  H01L21/7624 ,  H01L21/823807 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/0922 ,  H01L27/1203 ,  H01L29/045 ,  H01L29/66636 ,  H01L29/7833

Abstract: Hybrid orientation substrates allow the fabrication of complementary metal oxide semiconductor (CMOS) circuits in which the n-type field effect transistors (nFETs) are disposed in a semiconductor orientation which is optimal for electron mobility and the p-type field effect transistors (pFETs) are disposed in a semiconductor orientation which is optimal for hole mobility. This invention discloses that the performance advantages of FETs formed entirely in the optimal semiconductor orientation may be achieved by only requiring that the device's channel be disposed in a semiconductor with the optimal orientation. A variety of new FET structures are described, all with the characteristic that at least some part of the FET's channel has a different orientation than at least some part of the FET's source and/or drain. Hybrid substrates into which these new FETs might be incorporated are described along with their methods of making.

公开(公告)号：EP1687457A4

公开(公告)日：2009-06-17

申请号：EP04812387

申请日：2004-11-29

Applicant: IBM

Inventor： CABRAL CYRIL JR ,  DETAVERNIER CHRISTOPHER ,  JAMMY RAJARAO ,  SAENGER KATHERINE L

IPC: H01L21/8238 ,  C23C14/06 ,  C23C16/32 ,  H01L27/108 ,  H01L29/49

CPC classification number: H01L29/4966 ,  H01L21/823842

Abstract: A semiconductor device such as a complementary metal oxide semiconductor (CMOS) comprising at least one FET that comprises a gate electrode comprising a metal carbide and method of fabrication are provided. The CMOS comprises dual work function metal gate electrodes whereby the dual work functions are provided by a metal and a carbide of a metal.

公开(公告)号：EP1535297A4

公开(公告)日：2007-07-18

申请号：EP02768707

申请日：2002-08-26

Applicant: IBM

Inventor： JAHNES CHRISTOPHER V ,  LUND JENNIFER L ,  SAENGER KATHERINE L ,  VOLANT RICHARD P

IPC: B81B3/00 ,  B81C1/00 ,  G02B5/00 ,  G02B26/00 ,  G02B26/08 ,  H01H57/00 ,  H01H59/00

CPC classification number: H01H59/0009 ,  H01H2057/006

Abstract: A micro-electromechanical (MEM) RF switch provided with a deflectable membrane (60) activates a switch contact or plunger (40). The membrane incorporates interdigitated metal electrodes (70) which cause a stress gradient in the membrane when activated by way of a DC electric field. The stress gradient results in a predictable bending or displacement of the membrane (60), and is used to mechanically displace the switch contact (30). An RF gap area (25) located within the cavity (250) is totally segregated from the gaps (71) between the interdigitated metal electrodes (70). The membrane is electrostatically displaced in two opposing directions, thereby aiding to activate and deactivate the switch. The micro-electromechanical switch includes: a cavity (250); at least one conductive path (20) integral to a first surface bordering the cavity; a flexible membrane (60) parallel to the first surface bordering the cavity (250), the flexible membrane (60) having a plurality of actuating electrodes (70); and a plunger (40) attached to the flexible membrane (60) in a direction away from the actuating electrodes (70), the plunger (40) having a conductive surface that makes electric contact with the conductive paths, opening and closing the switch.

公开(公告)号：EP1535296A4

公开(公告)日：2007-04-04

申请号：EP02746591

申请日：2002-06-14

Applicant: IBM

Inventor： DELIGIANNI HARIKLIA ,  GREENBERG DAVID R ,  JAHNES CHRISTOPHER V ,  LUND JENNIFER L ,  SAENGER KATHERINE L ,  VOLANT RICHARD P

IPC: H01H57/00 ,  H01H59/00 ,  H01L21/00

CPC classification number: H01H59/0009

Abstract: A micro-electromechanical switch (MEMS) having a deformable elastomeric element (1) which exhibits a large change in conductivity with a small amount of displacement. The deformable elastomeric element (1) is displaced by an electrostatic force that is applied laterally resulting in a small transverse displacement. The transversal displacement, in turn, pushes a metallic contact (7) against two conductive paths (5, 6), allowing passage of electrical signals. The elastomer (1) is provided on two opposing sids with embedded metallic elements (9, 10), such as impregnated metallic rods, metallic sheets, metallic particles, or conductive paste. Actuation electrodes (18, 8) are placed parallel to the conductive sides of the elastomer. A voltage applied between the conductive side of the elastomer and the respective actuation electrodes (18, 8) generate the electrostatic attractive force that compresses the elastomer (1), creating the transverse displacement that closes the MEMS. The elastomeric based MEMS extends the lifetime of the switch by extending fatigue life of the deformable switch elements.