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    METHODS AND CIRCUITS FOR DYNAMICALLY SCALING DRAM POWER AND PERFORMANCE
    2.
    发明公开
    METHODS AND CIRCUITS FOR DYNAMICALLY SCALING DRAM POWER AND PERFORMANCE 审中-公开
    VERFAHREN UND SCHALTUNGEN ZUR DYNAMISCHEN SKALIERUNG DER DRAM-LEISTUNG UND-FORFORMANCE

    公开(公告)号：EP2539897A4

    公开(公告)日：2014-01-01

    申请号：EP10846798

    申请日：2010-12-01

    申请人： RAMBUS INC

    发明人： TSERN ELY ,  VOGELSANG THOMAS ,  HAMPEL CRAIG ,  BEST SCOTT

    IPC分类号： G11C11/4074 ,  G06F13/14 ,  G11C11/4063 ,  G11C11/408

    CPC分类号： G06F3/0625 ,  G06F1/266 ,  G06F3/0634 ,  G06F3/0673 ,  G11C5/147 ,  G11C11/4074 ,  G11C2207/2227

    摘要： A memory system supports high-performance and low-power modes. The memory system includes a memory core and a core interface. The memory core employs core supply voltages that remain the same in both modes. Supply voltages and signaling rates for the core interface may be scaled down to save power. Level shifters between the memory core and core interface level shift signals as needed to accommodate the signaling voltages used by the core interface in the different modes.

    摘要翻译： 内存系统支持高性能和低功耗模式。 存储器系统包括存储器核心和核心接口。 存储器内核采用在两种模式下保持相同的核心电源电压。 核心接口的电源电压和信号速率可以按比例缩小以节省功耗。 存储器核心和核心接口电平之间的电平移位器根据需要移动信号以适应不同模式下的核心接口使用的信令电压。

    BIT-REPLACEMENT TECHNIQUE FOR DRAM ERROR CORRECTION
    3.
    发明公开
    BIT-REPLACEMENT TECHNIQUE FOR DRAM ERROR CORRECTION 审中-公开
    比特交换DRAM纠错

    公开(公告)号：EP2502234A4

    公开(公告)日：2015-05-06

    申请号：EP10832017

    申请日：2010-11-10

    申请人： RAMBUS INC

    发明人： WARE FREDERICK A ,  TSERN ELY ,  VOGELSANG THOMAS

    IPC分类号： G11C29/42 ,  G06F11/10 ,  G11C11/40 ,  G11C11/401 ,  G11C29/00 ,  G11C29/18 ,  G11C29/50

    CPC分类号： G11C29/50016 ,  G06F11/1064 ,  G11C11/401 ,  G11C29/808

    摘要： The disclosed embodiments provide a dynamic memory device, comprising a set of dynamic memory cells and a set of replacement dynamic memory cells. The set of replacement dynamic memory cells includes data cells which contain replacement data bits for predetermined faulty cells in the set of dynamic memory cells, and address cells which contain address bits identifying the faulty cells, wherein each data cell is associated with a group of address cells that identify an associated faulty cell in the set of dynamic memory cells. The dynamic memory device also includes a remapping circuit, which remaps a faulty cell in the set of dynamic memory cells to an associated replacement cell in the set of replacement cells.

    HIGH DYNAMIC-RANGE IMAGE SENSOR
    4.
    发明公开
    HIGH DYNAMIC-RANGE IMAGE SENSOR 审中-公开
    BILDSENSOR MIT HOHEM DYNAMIKBEREICH

    公开(公告)号：EP3078191A4

    公开(公告)日：2017-08-23

    申请号：EP14868569

    申请日：2014-12-03

    申请人： RAMBUS INC

    发明人： SMITH CRAIG M ,  ARMSTRONG FRANK ,  ENDSLEY JAY ,  VOGELSANG THOMAS ,  HARRIS JAMES E ,  LADD JOHN ,  GUIDASH MICHAEL

    IPC分类号： H04N7/12 ,  H04N5/232 ,  H04N5/235 ,  H04N5/347 ,  H04N5/355 ,  H04N5/361 ,  H04N5/3745 ,  H04N9/04

    CPC分类号： H04N5/355 ,  H04N5/23245 ,  H04N5/2355 ,  H04N5/347 ,  H04N5/35536 ,  H04N5/361 ,  H04N5/37457 ,  H04N9/045

    摘要： A pixel array within an integrated-circuit image sensor is exposed to light representative of a scene during a first frame interval and then oversampled a first number of times within the first frame interval to generate a corresponding first number of frames of image data from which a first output image may be constructed. One or more of the first number of frames of image data are evaluated to determine whether a range of luminances in the scene warrants adjustment of an oversampling factor from the first number to a second number, if so, the oversampling factor is adjusted such that the pixel array is oversampled the second number of times within a second frame interval to generate a corresponding second number of frames of image data from which a second output image may be constructed.

    摘要翻译： 集成电路图像传感器内的像素阵列在第一帧间隔期间暴露于代表场景的光线，然后在第一帧间隔内过采样第一次数以生成相应的第一数量的图像数据帧， 可以构建第一输出图像。 对第一数量的图像数据帧中的一个或多个进行评估以确定场景中的亮度范围是否保证将过采样因子从第一数量调整到第二数量，如果是，则调整过采样因子，使得 像素阵列在第二帧间隔内被第二次过采样以生成可从其构建第二输出图像的相应的第二数量的图像数据帧。