公开(公告)号：EP0880168A3

公开(公告)日：1999-12-15

申请号：EP98304002.3

申请日：1998-05-20

申请人： Sharp Kabushiki Kaisha ,  SHARP MICROELECTRONICS TECHNOLOGY, INC.

发明人： Nguyen, Tue ,  Charneski, Lawrence J. ,  Evans, David R. ,  Sheng, Teng Hsu

IPC分类号： H01L21/321 ,  H01L21/768

CPC分类号： C23G5/00 ,  H01L21/02063 ,  H01L21/02068 ,  H01L21/31111 ,  H01L21/31138 ,  H01L21/32134 ,  H01L21/76838

摘要： A system and method are provided for selectively etching metal, preferably copper surfaces free of oxides in preparation for the deposition of an interconnecting metallic material. Metal oxides are removed with β-diketones, preferably Hhfac. The Hhfac is delivered into the system in vapor form, and reacts almost exclusively with copper oxides. The by-products are also volatile for removal from the system under reduced pressure. The procedure is easily adaptable to most IC process systems, it can be conducted in an oxygen-free environment, without the removal of the IC from the process chamber. The in situ cleaning permits a minimum amount of copper oxide to reform before the deposition of the overlying metal, permitting formation of a highly conductive electrical interconnection.

公开(公告)号：EP0852229A2

公开(公告)日：1998-07-08

申请号：EP97308824.8

申请日：1997-11-04

申请人： SHARP KABUSHIKI KAISHA ,  SHARP MICROELECTRONICS TECHNOLOGY, INC.

发明人： Senzaki, Yoshihide ,  Charneski, Lawrence Joel ,  Kobayashi, Masato ,  Nguyen, Tue

IPC分类号： C07F7/18 ,  C23C16/18

CPC分类号： C23C16/18 ,  C07F7/1836

摘要： Copper is applied to integrated circuit substrates, for example, by chemical vapor deposition using a copper precursor of a dimethoxymethylvinylsilane (dmomvs), or a methoxydimethylvinylsilane (modmvs) silylolefin ligand bonded to (hfac)Cu. The improved copper complex-ligand bond helps ensure that the ligand separates from the (hfac)Cu complex at consistent temperatures when Cu is to be deposited. Water vapor may be added to the precursor to improve the conductivity of the deposited Cu, and additional silylolefins, hexafluoroacetylacetone (H-hfac), and water may be used separately or in combination to enhance deposition rate, conductivity, and precursor stability.

摘要翻译： 例如通过使用二甲氧基甲基乙烯基硅烷（dmomvs）的铜前体或与（hfac）Cu键合的甲氧基二甲基乙烯基硅烷（modmvs）silylolefin配体的化学气相沉积将铜应用于集成电路基板。 当Cu沉积时，改进的铜络合物 - 配体键有助于确保配体在恒定温度下与（hfac）Cu络合物分离。 可以向前体中加入水蒸汽以改善沉积的Cu的导电性，并且可以单独或组合使用另外的水溶性六氟乙酰丙酮（H-hfac）和水，以增强沉积速率，导电性和前体稳定性。

公开(公告)号：EP1001047B1

公开(公告)日：2003-10-08

申请号：EP99308880.6

申请日：1999-11-08

申请人： SHARP KABUSHIKI KAISHA

发明人： Zhuang, Wei-Wei ,  Nguyen, Tue ,  Evans, David R. ,  Hsu, Sheng Teng ,  Barrowcliff, Robert ,  Charneski, Lawrence J.

IPC分类号： C07F1/08 ,  C07F15/00 ,  C07F1/00 ,  C23C16/18

CPC分类号： C23C16/18

公开(公告)号：EP1000947B1

公开(公告)日：2003-08-20

申请号：EP99308236.1

申请日：1999-10-19

申请人： SHARP KABUSHIKI KAISHA

发明人： Zhuang, Wei-Wei ,  Nguyen, Tue ,  Charneski, Lawrence J. ,  Evans, David R. ,  Hsu, Sheng Teng

IPC分类号： C07F1/08 ,  C07F15/00 ,  C07F1/00 ,  C23C16/18

CPC分类号： C23C16/18 ,  C07F1/08

公开(公告)号：EP0852229B1

公开(公告)日：2003-03-05

申请号：EP97308824.8

申请日：1997-11-04

申请人： SHARP KABUSHIKI KAISHA ,  SHARP MICROELECTRONICS TECHNOLOGY, INC.

发明人： Senzaki, Yoshihide ,  Charneski, Lawrence Joel ,  Kobayashi, Masato ,  Nguyen, Tue

IPC分类号： C07F7/18 ,  C23C16/18

CPC分类号： C23C16/18 ,  C07F7/1836

公开(公告)号：EP1016666A3

公开(公告)日：2002-01-16

申请号：EP99308873.1

申请日：1999-11-08

申请人： SHARP KABUSHIKI KAISHA

发明人： Zhuang, Wei-Wei ,  Nguyen, Tue ,  Evans, David R. ,  Hsu, Sheng Teng ,  Stecker, Greg Michael ,  Charneski, Lawrence J.

IPC分类号： C07F1/00 ,  C07F7/08 ,  C23C16/44

CPC分类号： C23C16/18 ,  C07F1/08 ,  C07F7/082

摘要： A Cu(hfac) allyl-derived ligand precursor has been provided. The ligand includes group consisting of alkyl, phenyl, trialkylsilane, trialkoxylsilane, halodialkylsilane, dihaloalkylsilane, trihalosilane, triphenylsilane, alkoxyl, halogen, chloroformate, cyanide , cycloalkyl, cycloalkylamine, alkyl ether, isocyanate, and pentafluorobenzene. Examples of the allyl-derived ligand precursors have proved to be stable at room temperatures, and sufficiently volatile at higher temperatures. Copper deposited with this precursor has low resistivity and high adhesive characteristics. A synthesis method has been provided which produces a high yield of the above-described precursors, including a Cu(hfac)(allyltrimethylsilane) precursor.

摘要翻译： 已经提供了一种Cu（hfac）烯丙基衍生的配体前体。 配体包括由烷基，苯基，三烷基硅烷，三烷氧基硅烷，卤代烷基硅烷，二卤代烷基硅烷，三卤硅烷，三苯基硅烷，烷氧基，卤素，氯甲酸酯，氰化物，环烷基，环烷基胺，烷基醚，异氰酸酯和五氟苯组成的组。 已经证明烯丙基衍生的配体前体的实例在室温下是稳定的，并且在较高温度下具有足够的挥发性。 沉积有该前体的铜具有低电阻率和高粘合特性。 提供了一种合成方法，其产生高产率的上述前体，包括Cu（hfac）（烯丙基三甲基硅烷）前体。

公开(公告)号：EP0929105A2

公开(公告)日：1999-07-14

申请号：EP99300130.4

申请日：1999-01-08

申请人： Sharp Kabushiki Kaisha ,  SHARP MICROELECTRONICS TECHNOLOGY, INC.

发明人： Hsu, Sheng Teng ,  Nguyen, Tue ,  Evans, David R.

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L29/423

CPC分类号： H01L29/6659 ,  H01L21/28088 ,  H01L21/28097 ,  H01L21/76895 ,  H01L21/76897 ,  H01L21/82385 ,  H01L29/42376 ,  H01L29/4966 ,  H01L29/4975 ,  H01L29/66545

摘要： A MOS transistor is formed on a single crystal silicon substrate doped to form a conductive layer of a first type, and includes: an active region formed on said substrate; a source region and a drain region located in said active region, doped to form conductive channels of a second type; a metal gate region located in said active region between said source region and said drain region, wherein said metal gate has a width of less than one micron; a gate oxide region located over said gate region; an oxide region located over the structure; and a source electrode, a gate electrode and a drain electrode, each connected to their respective regions, and each formed of a combination of a contact metal and an electrode metal. An alternate embodiment includes a pair of MOS transistors which have an interconnect between their gate electrodes and the drain electrode of one transistor and the drain electrode of the other transistor.

公开(公告)号：EP0892428A2

公开(公告)日：1999-01-20

申请号：EP98305610.2

申请日：1998-07-15

申请人： Sharp Kabushiki Kaisha ,  SHARP MICROELECTRONICS TECHNOLOGY, INC.

发明人： Nguyen, Tue ,  Hsu, Sheng Teng

IPC分类号： H01L21/768 ,  H01L21/285

CPC分类号： H01L21/76844 ,  H01L21/28568 ,  H01L21/76801 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76838 ,  H01L21/76865 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： A method of forming a direct, copper-to-copper, connection between levels in an IC is disclosed. A via interconnection is formed by isotropically depositing a barrier material in a via through an insulator to a lower copper level, and then anisotropically etching the via to remove the barrier material covering the lower copper level. The anisotropic etch leaves the barrier material lining the via through the insulator. The subsequently deposited upper metal level then directly contacts the lower copper level when the via is filled. A dual damascene interconnection is formed by etching an interconnection trench in an insulator and anisotropically depositing a non-conductive barrier material in the trench bottom. Then a via is formed from the trench interconnect to a lower copper level. As above, a conductive barrier material is isotropically deposited in the trench/via structure, and anisotropically etched to remove the barrier material covering the lower copper level. The insulating barrier material, lining the trench and via, remains. An IC via interconnection structure and a dual damascene interconnection structure, made in accordance with the above described methods, are also provided.

摘要翻译： 形成直接的，铜 - 铜，电平之间在IC连接的方法是游离缺失盘。 经由互连A通过各向同性在经由通过绝缘体上沉积阻挡材料，以较低的铜水平，然后各向异性的经由蚀刻去除覆盖所述下一级铜阻挡材料形成。 各向异性蚀刻离开穿过绝缘体衬经由阻挡材料。 随后沉积的上层金属随后直接接触下一级铜当通过被填充。 双镶嵌互连是通过在绝缘体上互连沟槽的蚀刻和各向异性沉积在沟槽底部的非导电性阻障层材料形成。 然后通过从沟槽互连到较低水平的铜形成。 如上所述，导电阻挡材料各向同性地沉积在沟槽/过孔结构，以及各向异性地蚀刻以去除覆盖所述下一级铜阻挡材料。 绝缘阻挡层材料，衬着沟槽和通过，仍然存在。 经由互连结构的IC和双镶嵌互连结构，在雅舞蹈用上述方法制备的，所提供的。

公开(公告)号：EP1670051A1

公开(公告)日：2006-06-14

申请号：EP06075568.3

申请日：1998-10-23

申请人： SHARP KABUSHIKI KAISHA ,  SHARP MICROELECTRONICS TECHNOLOGY, INC.

发明人： Ulrich, Bruce Dale ,  Nguyen, Tue ,  Kobayashi, Masato

IPC分类号： H01L21/3213 ,  C23F1/00

CPC分类号： H01L21/32134 ,  C23F1/18 ,  H01L21/02063 ,  H01L21/02087 ,  H01L21/3212 ,  H01L21/6708

摘要： An apparatus for removing copper from semiconductor wafer disk having top and bottom surfaces, with top surface edges and sides along the top surface edge around the perimeter of the wafer surfaces comprises: an enclosed chamber; a spin-chuck to rotate the mounted wafer; a first solution application nozzle having at least one position approximately above the wafer edge to spray diluted copper etchant solution at room temperature towards the sides and perimeter edge of the wafer, to remove copper from the sides and perimeter edge of the wafer; a second nozzle having at least one position approximately above the wafer perimeter to spray a protective coating etchant upon the edge of the wafer top surface along the perimeter, whereby protective coating, masking copper interconnection structures on the wafer top surface, is removed on the edge of the top surface and the wafer side before copper etchant is applied; and a third solution application nozzle having at least one position approximately above the center of the wafer to spray de-ionized water on the wafer, whereby the water is used to remove etchants and etchant compounds from the wafer.

摘要翻译： 一种用于从具有顶表面和底表面的半导体晶片盘中去除铜的装置，具有围绕晶片表面的周边的顶表面边缘的顶表面边缘和侧边包括：封闭室; 用于旋转安装的晶片的旋转卡盘; 第一溶液施加喷嘴，其具有大约在晶片边缘上方的至少一个位置，以在室温下朝向晶片的侧面和周边边缘喷射稀释的铜蚀刻剂溶液，以从晶片的侧面和周边边缘移除铜; 第二喷嘴具有大约在晶片周边上方的至少一个位置，以沿着周边在晶片顶表面的边缘上喷射保护性涂层蚀刻剂，由此在晶片顶表面上的保护涂层，掩模铜互连结构在边缘上被去除 在施加铜蚀刻剂之前的顶表面和晶片侧; 以及第三溶液施加喷嘴，其具有大约高于晶片中心的至少一个位置以在晶片上喷射去离子水，由此使用水从晶片去除蚀刻剂和蚀刻剂化合物。

公开(公告)号：EP0962548A3

公开(公告)日：2001-07-25

申请号：EP99301697.1

申请日：1999-03-08

申请人： Sharp Kabushiki Kaisha ,  SHARP MICROELECTRONICS TECHNOLOGY, INC.

发明人： Hsu, Sheng Teng ,  Yang, Hongning ,  Evans, David R. ,  Nguyen, Tue ,  Ma, Yanjun

IPC分类号： C23C16/44 ,  C23C14/22 ,  H01L21/00 ,  C23C16/26 ,  C23C14/06

CPC分类号： C23C14/50 ,  C23C14/06 ,  C23C14/22 ,  C23C16/30 ,  C23C16/44 ,  C23C16/4582

摘要： A method has been provided to counteract the inherent tension in a deposited film. A wafer (50) substrate is fixed to a wafer chuck (70) having a curved surface (56). When the chuck surface is convex, a tensile stress is implanted in a deposited film (58). Upon release from the chuck, the deposited film develops a compressive stress. When the chuck surface is concave, a compressive stress is implanted in the deposited film. Upon release from the chuck, the deposited film develops a tensile stress. Loading a film with a compressive stress is helpful in making films having an inherently tensile stress become thermal stable. Stress loading is also used to improve adhesion between films, and to prevent warping of a film during annealing. A product-by-process using the above-described method is also provided.

摘要翻译： 已经提供了一种抵消沉积膜中的固有张力的方法。 将晶片基板固定到具有弯曲表面的晶片卡盘。 当卡盘表面凸出时，在沉积膜中注入拉伸应力。 当从卡盘释放时，沉积的膜产生压缩应力。 当卡盘表面是凹形时，在沉积膜中注入压缩应力。 当从卡盘释放时，沉积的膜产生拉伸应力。 加载具有压缩应力的薄膜有助于使具有固有拉伸应力的薄膜变得热稳定。 应力负荷也用于改善膜之间的粘附性，并且防止退火期间膜的翘曲。 还提供了使用上述方法的逐个方法。