摘要:
Provided is a III nitride semiconductor electronic device having a structure capable of reducing leakage current. A laminate 11 includes a substrate 13 and a III nitride semiconductor epitaxial film 15. The substrate 13 is made of a III nitride semiconductor having a carrier concentration of more than 1×10 18 cm -3 . The epitaxial structure 15 includes a III nitride semiconductor epitaxial film 17. A first face 13a of the substrate 13 is inclined at an angle ¸ of more than 5 degrees with respect to an axis Cx extending in a direction of the c-axis. A normal vector VN and a c-axis vector VC make the angle ¸. The III nitride semiconductor epitaxial film 17 includes first, second and third regions 17a, 17b and 17c arranged in order in a direction of a normal to the first face 13a. A dislocation density of the third region 17c is smaller than that of the first region 17a. A dislocation density of the second region 17b is smaller than that of the substrate 13.
摘要:
A Group III nitride semiconductor device having a structure capable of enhancing of pressure tightness. Schottky diode (11) comprises Group III nitride supporting base material (13), gallium nitride region (15) and Schottky electrode (17). The Group III nitride supporting base material (13) has conductivity. The Schottky electrode (17) forms Schottky junction in the gallium nitride region (15). The gallium nitride region (15) is superimposed on the major surface (13a) of the Group III nitride supporting base material (13). The gallium nitride region (15) has a (10-12) plane XRD full width at half maximum of = 100 sec.
摘要:
A method for measuring the withstand voltage of a semiconductor epitaxial wafer easily and a semiconductor epitaxial wafer exhibiting an excellent withstand voltage. In the method for measuring the withstand voltage of a semiconductor epitaxial wafer (10), withstand voltage between electrodes (12, 12) is measured using only a Schottky electrode without requiring any ohmic electrode. Since a process for forming an ohmic electrode can be eliminated, the semiconductor epitaxial wafer (10) can undergo a withstand voltage measuring test easily. Consequently, the withstand voltage of the semiconductor epitaxial wafer (10) can be measured easily. Furthermore, an unqualified wafer (10) can be removed before being delivered to an actual device fabrication process because the withstand voltage V2 between electrodes can be measured before an actual device is fabricated from the wafer (10). Consequently, loss can be reduced as compared with a conventional method where the withstand voltage V2 between electrodes is measured after an actual device is fabricated.
摘要:
Disclosed is a high-electron-mobility transistor having a high-purity channel layer and a high-resistance buffer layer. Specifically disclosed is a high-electron-mobility transistor (11) comprising a supporting base (13) composed of a gallium nitride, a buffer layer (15) composed of a first gallium nitride semiconductor, a channel layer (17) composed of a second gallium nitride semiconductor, a semiconductor layer (19) composed of a third gallium nitride semiconductor, and an electrode structure (a gate electrode (21), a source electrode (23) and a drain electrode (25)) for the transistor (11). The band gap of the third gallium nitride semiconductor is larger than that of the second gallium nitride semiconductor. The carbon concentration Nc1 in the first gallium nitride semiconductor is not less than 4 × 1017 cm-3, and the carbon concentration Nc2 in the second gallium nitride semiconductor is less than 4 × 1016 cm-3.
摘要:
Disclosed is a group III nitride semiconductor device wherein leakage current from a Schottky electrode is reduced. In a high-electron-mobility transistor (1), a supporting substrate (3) is composed of AlN, AlGaN and GaN. An AlYGa1-YN epitaxial layer (5) has a surface roughness (Rms) of not more than 0.25 nm, and this surface roughness is defined by a 1 μm square area. A GaN epitaxial layer (7) is formed between the AlYGa1-YN supporting substrate (3) and the AlYGa1-YN epitaxial layer (5). A Schottky electrode (9) is formed on the AlYGa1-YN epitaxial layer (5). A first ohmic electrode (11) is formed on the AlYGa1-YN epitaxial layer (5), and a second ohmic electrode (13) is formed on the AlYGa1-YN epitaxial layer (5). One of the first and second ohmic electrodes (11, 13) is a source electrode, and the other is a drain electrode. The Schottky electrode (9) is a gate electrode of the high-electron-mobility transistor (1).
摘要:
A method of evaluating a semiconductor wafer which can provide an index as to whether slip generation is likely or not can be provided. In-plane temperature distribution of a semiconductor wafer is changed at a prescribed temperature and condition of temperature distribution generating a slip line is detected. In this manner, a range of tolerable thermal stress not generating a slip line is specified.