Method of producing a through-substrate via in a semiconductor device and semiconductor device comprising a through-substrate via
    1.
    发明公开
    Method of producing a through-substrate via in a semiconductor device and semiconductor device comprising a through-substrate via 有权
    在包括Durchkontaktierungssubstratweg的半导体装置和半导体装置的制造Durchkontaktierungssubstratwegs的方法

    公开(公告)号:EP2790211A1

    公开(公告)日:2014-10-15

    申请号:EP13163167.3

    申请日:2013-04-10

    申请人: AMS AG

    IPC分类号: H01L21/768 H01L23/48

    摘要: The method comprises the steps of arranging an intermetal dielectric (2) on or above a main surface (10) of a semiconductor body (1) and at least one metal layer (5, 5') in the intermetal dielectric, and forming a via opening (3) from a rear surface (11) towards the metal layer. A stop layer (4) of electrically conductive material is arranged at the metal layer between the metal layer and the semiconductor body, and the via opening is formed at least up to the stop layer but not into the metal layer. The semiconductor device has a stop layer (4) between a section (5) of the metal layer and a metallization (19) of a through-substrate via that is arranged in the via opening, and an electrically conductive liner (6, 6') between the metal layer and the semiconductor body.

    摘要翻译: 该方法包括在金属间介电上或上方的半导体主体的一个主表面(10)(1)和至少一个金属层(5,5“)中的金属间电介质(2)布置;以及形成通孔的步骤 开口(3)从后表面(11)朝向所述金属层。 停止层(4)的导电材料在所述金属层和所述半导体主体之间的金属层被布置,并且经由开口至少形成在直至停止层但不进入金属层。 半导体器件具有一个部分之间的阻挡层(4)(5)在金属层和通过也设置在通孔开口布置,并且在导电衬里(6,6'的贯通基板的金属化(19)的 )所述金属层和所述半导体主体之间。

    Masking method for semiconductor devices with high surface topography
    3.
    发明公开
    Masking method for semiconductor devices with high surface topography 有权
    AbdeckungsverfahrenfürHalbleiterbauelemente mit hoherOberflächentopographie

    公开(公告)号:EP2765456A1

    公开(公告)日:2014-08-13

    申请号:EP13154625.1

    申请日:2013-02-08

    申请人: ams AG

    IPC分类号: G03F7/09 H05K3/00

    摘要: The method comprises the steps of providing a semiconductor body or substrate (1) with a recess or trench (2) in a main surface (10), applying a mask (3) on the main surface, the mask covering the recess or trench, so that the walls and bottom of the recess or trench and the mask together enclose a cavity (4), which is filled with a gas, and forming at least one opening (5) in the mask at a distance from the recess or trench, the distance (6) being adapted to allow the gas to escape from the cavity via the opening when the gas pressure exceeds an external pressure.

    摘要翻译: 该方法包括以下步骤:在主表面(10)中提供具有凹槽或沟槽(2)的半导体本体或衬底(1),在主表面上施加掩模(3),覆盖凹部或沟槽的掩模, 使得凹部或沟槽和面罩的壁和底部一起包围填充有气体的空腔(4),并且在距离凹槽或沟槽一定距离处的掩模中形成至少一个开口(5) 所述距离(6)适于当所述气体压力超过外部压力时允许所述气体经由所述开口从所述空腔逸出。