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    PRESSURE SENSOR INCLUDING DEFORMABLE PRESSURE VESSEL(S)
    2.
    发明公开
    PRESSURE SENSOR INCLUDING DEFORMABLE PRESSURE VESSEL(S) 审中-公开
    压力传感器，包括变形压力容器（S）

    公开(公告)号：EP3186610A1

    公开(公告)日：2017-07-05

    申请号：EP15836993.4

    申请日：2015-08-27

    Applicant: KIONIX, INC.

    Inventor： ADAMS, Scott, G. ,  BLACKMER, Charles, W. ,  LYNCH, Kristin, J.

    IPC: G01L9/00

    CPC classification number: G01L9/003 ,  B81B3/0072 ,  B81B2201/0264 ,  B81C1/00 ,  B81C1/00666 ,  B81C2201/0167 ,  G01L9/0027 ,  G01L9/0055 ,  G01L9/0073 ,  G01L9/008 ,  G01L9/0082 ,  G01L13/00 ,  G01L13/02 ,  G01P15/006 ,  G01P15/08 ,  H01L21/00

    Abstract: Techniques are described herein that perform pressure sensing using pressure sensor(s) that include deformable pressure vessel(s). A pressure vessel is an object that has a cross section that defines a void. A deformable pressure vessel is a pressure vessel that has at least one curved portion that is configured to structurally deform (e.g., bend, shear, elongate, etc.) based on a pressure difference between a cavity pressure in a cavity in which at least a portion of the pressure vessel is suspended and a vessel pressure in the pressure vessel.

    Abstract translation: 本文描述了使用包括可变形压力容器的压力传感器执行压力感测的技术。 压力容器是具有限定空隙的横截面的物体。 可变形压力容器是具有至少一个弯曲部分的压力容器，该弯曲部分被配置为基于腔体中的腔体压力之间的压力差来结构性地变形（例如，弯曲，剪切，伸长等），其中至少一个 压力容器的一部分被悬置并且压力容器中的容器压力被悬置。

    Boron doped shell for MEMS device
    4.
    发明公开
    Boron doped shell for MEMS device 有权
    Bordotierte UmmantelungfürMEMS-Vorrichtung

    公开(公告)号：EP2019081A2

    公开(公告)日：2009-01-28

    申请号：EP08160924.0

    申请日：2008-07-22

    Applicant: Honeywell International Inc.

    Inventor： Detry, James F.

    IPC: B81C1/00

    CPC classification number: B81C1/00595 ,  B81C1/00365 ,  B81C2201/0136 ,  B81C2201/0167 ,  B81C2203/031

    Abstract: A wafer for use in a MEMS device having two doped layers surrounding an undoped layer of silicon is described. By providing two doped layers around an undoped core, the stress in the lattice structure of the silicon is reduced as compared to a solidly doped layer. Thus, problems associated with warping and bowing are reduced. The wafer may have a pattered oxide layer to pattern the deep reactive ion etch. A first deep reactive ion etch creates trenches in the layers. The walls of the trenches are doped with boron atoms. A second deep reactive ion etch removes the bottom walls of the trenches. The wafer is separated from the silicon substrate and bonded to at least one glass wafer.

    Abstract translation: 描述了一种用于具有围绕未掺杂硅层的两个掺杂层的MEMS器件的晶片。 通过在未掺杂的芯周围提供两个掺杂层，与固体掺杂层相比，硅的晶格结构中的应力降低。 因此，与翘曲和弯曲相关的问题减少。 晶片可以具有图案化的氧化物层以对深反应离子蚀刻进行图案化。 第一深反应离子蚀刻在层中产生沟槽。 沟槽的壁被掺杂硼原子。 第二次深反应离子蚀刻去除沟槽的底壁。 将晶片与硅衬底分离并结合至至少一个玻璃晶片。

    Method for forming thin film structure having small tensile stress
    6.
    发明公开
    Method for forming thin film structure having small tensile stress 审中-公开
    韦尔法罕zur Herstellung einerDünnschichtstrukturmit kleiner Zugspannung

    公开(公告)号：EP1826174A2

    公开(公告)日：2007-08-29

    申请号：EP07100826.2

    申请日：2007-01-19

    Applicant: OMRON CORPORATION

    Inventor： Kasai, Takashi ,  Wakabayashi, Shuichi

    IPC: B81B3/00

    CPC classification number: B81B3/0072 ,  B81C2201/0167 ,  C23C16/24 ,  C23C16/56

    Abstract: A method for forming a thin film structure, which has small tensile stress due to controlled mechanical stress, and is made to be conductive, is provided. A lower film including polysilicon thin film is formed on a substrate such as Si substrate, then an impurity such as P is doped into the lower film and thermally diffused, thereby the lower film is made conductive. Then, an upper film is deposited on the lower film, the upper film including a polysilicon thin film that is simply deposited and not made to be conductive. The upper film has a tensile stress in an approximately the same level as compressive stress of the lower film, and a thin film structure as a whole, the structure including the lower film and the upper film, is adjusted to have small tensile stress.

    Abstract translation: 提供了一种形成薄膜结构的方法，该薄膜结构由于受到机械应力的控制而具有较小的拉伸应力，并被制成导电性。 在诸如Si衬底的衬底上形成包括多晶硅薄膜的下部膜，然后将诸如P的杂质掺杂到下部膜中并热扩散，从而使下部膜导电。 然后，上膜被沉积在下膜上，上膜包括简单地沉积并不导电的多晶硅薄膜。 上部膜具有与下部膜的压缩应力大致相同水平的拉伸应力，并且整体上由薄膜结构体构成，包括下部薄膜和上部薄膜的结构被调整为具有较小的拉伸应力。

    Method of fabricating silicon-based MEMS devices
    7.
    发明公开
    Method of fabricating silicon-based MEMS devices 有权
    制造基于硅的MEMS器件的方法

    公开(公告)号：EP1493712A3

    公开(公告)日：2005-12-14

    申请号：EP04102666.7

    申请日：2004-06-11

    Applicant: Dalsa Semiconductor Inc.

    Inventor： Ouellet, Luc ,  Antaki, Robert

    IPC: B81B3/00

    CPC classification number: B81C1/00666 ,  B81B2207/015 ,  B81C2201/0167

    Abstract: A method of fabricating a silicon-based microstructure is disclosed, which involves depositing electrically conductive amorphous silicon doped with first and second dopants to produce a structure having a residual mechanical stress of less than +/= 100Mpa. The dopants can either be deposited in successive layers to produce a laminated structure with a residual mechanical stress of less than +/= 100Mpa or simultaneously to produce a laminated structure having a mechanical stress of less than +/= 100Mpa.

    Abstract translation: 公开了一种制造硅基微结构的方法，其包括沉积掺杂有第一和第二掺杂剂的导电非晶硅以产生具有小于+ / = 100Mpa的残余机械应力的结构。 掺杂剂可以沉积在连续的层中以产生具有小于+ / = 100Mpa的残余机械应力的叠层结构或同时产生具有小于+ / = 100Mpa的机械应力的叠层结构。

    MICROMACHINED ELECTROSTATIC ACTUATOR WITH AIR GAP
    8.
    发明公开
    MICROMACHINED ELECTROSTATIC ACTUATOR WITH AIR GAP 有权
    具有空气隙的微观力学静电驱动器

    公开(公告)号：EP1183566A1

    公开(公告)日：2002-03-06

    申请号：EP00930822.2

    申请日：2000-05-19

    Applicant: MCNC

    Inventor： GOODWIN-JOHANSSON, Scott, Halden

    IPC: G02B26/02

    CPC classification number: B81C1/00666 ,  B81B2201/032 ,  B81B2203/0118 ,  B81C2201/0167 ,  G02B6/353 ,  G02B6/3566 ,  G02B6/357 ,  G02B6/3594 ,  H01H59/0009 ,  H01H2059/0081

    Abstract: A MEMS (Micro Electro Mechanical System) electrostatic device operated with lower and more predictable operating voltages is provided. An electrostatic actuator, an electrostatic attenuator of electromagnetic radiation, and a method for attenuating electromagnetic radiation are provided. Improved operating voltage characteristics are achieved by defining a non increasing air gap between the substrate electrode and flexible composite electrode within the electrostatic device. A medial portion of a multilayer flexible composite overlying the electromechanical substrate is held in position regardless of the application of electrostatic force, thereby sustaining the defined air gap. The air gap is relatively constant in separation from the underlying microelectronic surface when the medial portion is cantilevered in one embodiment. A further embodiment provides an air gap that decreases to zero when the medial portion approaches and contacts the underlying microelectronic surface. A moveable distal portion of the flexible composite is biased to curl naturally due to differences in thermal coefficients of expansion between the component layers. In response to electrostatic forces, the distal portion moves and thereby alters the distance separating the flexible composite from the underlaying microelectronic surface. Structures and techniques for controlling bias in the medial portion and the resulting air gap are provided. The electrostatic device may be disposed to selectively clear or intercept the path of electromagnetic radiation. Materials used in the attenuator can be selected to pass, reflect, or absorb various types of electromagnetic radiation. A plurality of electromagnetic attenuators may be disposed in an array and selectively activated in subsets.

    MEMS CHIP AND MANUFACTURING METHOD THEREFOR
    10.
    发明公开
    MEMS CHIP AND MANUFACTURING METHOD THEREFOR 审中-公开
    MEMS-CHIP UND HERSTELLUNGSVERFAHRENDAFÜR

    公开(公告)号：EP2857348A4

    公开(公告)日：2016-01-13

    申请号：EP13813814

    申请日：2013-06-29

    Applicant: CSMC TECHNOLOGIES FAB1 CO LTD

    Inventor： DAI DAN ,  ZHANG XINWEI ,  ZHOU GUOPING ,  XIA CHANGFENG

    IPC: B81B7/00 ,  B81C1/00 ,  H01L27/00

    CPC classification number: B81C1/00825 ,  B81B7/0029 ,  B81C1/0038 ,  B81C2201/0167 ,  B81C2201/053

    Abstract: A MEMS chip (100) includes a silicon substrate layer (110), a first oxidation layer (120) and a first thin film layer (130). The silicon substrate layer includes a front surface (112) for a MEMS process and a rear surface (114), both the front surface and the rear surface being polished surfaces. The first oxidation layer is mainly made of silicon dioxide and is formed on the rear surface of the silicon substrate layer. The first thin film layer is mainly made of silicon nitride and is formed on the surface of the first oxidation layer. In the above MEMS chip, by sequentially laminating a first oxidation layer and a first thin film layer on the rear surface of a silicon substrate layer, the rear surface is effectively protected to prevent the scratch damage in the course of a MEMS process. A manufacturing method for the MEMS chip is also provided.

    Abstract translation: MEMS芯片（100）包括硅衬底层（110），第一氧化层（120）和第一薄膜层（130）。 硅衬底层包括用于MEMS工艺的前表面（112）和后表面（114），前表面和后表面都是​​抛光表面。 第一氧化层主要由二氧化硅制成，并形成在硅衬底层的后表面上。 第一薄膜层主要由氮化硅制成并形成在第一氧化层的表面上。 在上述MEMS芯片中，通过在硅衬底层的后表面依次层叠第一氧化层和第一薄膜层，可有效地保护背面以防止MEMS工艺过程中的划痕损伤。 还提供了用于MEMS芯片的制造方法。

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