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公开(公告)号：EP3261250A4
公开(公告)日：2018-07-04
申请号：EP16885458
申请日：2016-07-19
发明人： ZHANG MENGWEN
CPC分类号： H03F1/0205 , H03F1/301 , H03F1/32 , H03F3/005 , H03F3/187 , H03F3/45183 , H03F3/45188 , H03F3/45192 , H03F3/45475 , H03F3/45659 , H03F3/45699 , H03F3/45762 , H03F2200/129 , H03F2200/156 , H03F2200/159 , H03F2200/18 , H03F2200/222 , H03F2200/252 , H03F2200/264 , H03F2200/471 , H03F2200/555 , H03F2203/45008 , H03F2203/45012 , H03F2203/45024 , H03F2203/45028 , H03F2203/45054 , H03F2203/45068 , H03F2203/45082 , H03F2203/45112 , H03F2203/45134 , H03F2203/45136 , H03F2203/45171 , H03F2203/45174 , H03F2203/45182 , H03F2203/45188 , H03F2203/45192 , H03F2203/45208 , H03F2203/45244 , H03F2203/45332 , H03F2203/45421 , H03F2203/45434 , H03F2203/45444 , H03F2203/45512 , H03F2203/45514 , H03F2203/45534 , H03F2203/45544 , H03F2203/45546 , H03F2203/45551 , H03F2203/45586 , H03F2203/45588 , H03F2203/45616 , H03F2203/45632 , H03F2203/45642 , H03F2203/45656 , H03F2203/45674 , H03F2203/45676
摘要： The present application provides an amplifying circuit comprising a reference voltage generating circuit, a common-mode voltage conversion circuit, a common-mode negative feedback circuit, and an amplifying sub-circuit. The reference voltage generating circuit generates a first reference voltage, a second reference voltage, and a reference common-mode voltage according to a post-stage common-mode voltage, the common-mode voltage conversion circuit converts the pre-stage output differential signal into a differential input signal according to the reference common-mode voltage, the common-mode negative feedback circuit generates a control voltage to quickly establish a common-mode negative feedback of the amplifying sub-circuit, wherein the first reference voltage and the second reference voltage are used to cancel a baseline signal of the pre-stage output differential signal. The amplifying circuit provided in the present application can eliminate the baseline signal, convert the common-mode voltage and quickly establish the common-mode negative feedback.
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公开(公告)号：EP2413499A1
公开(公告)日：2012-02-01
申请号：EP11175061.8
申请日：2011-07-22
发明人： Onishi, Akinobu
CPC分类号： H03F3/005 , H03F1/0244 , H03F2203/45171 , H03H19/004 , H03M3/32 , H03M3/43 , H03M3/454
摘要： A switched capacitor circuit comprises a capacitor (C1), switches (SW1 ∼ SW4) provided on an input side and an output side of the capacitor (C1), respectively, and an operational amplifier of a later stage which receives an output of the capacitor (C1), wherein a current value of a current supplied to the operational amplifier is switched according to at least one open/closed state of the switches (SW1 ∼ SW4).
摘要翻译： 开关电容电路分别包括电容器（C1），设置在电容器（C1）的输入侧和输出侧的开关（SW1 = SW4）和后级的运算放大器，其接收电容器 （C1），其中根据开关（SW1 = SW4）的至少一个打开/关闭状态切换提供给运算放大器的电流的电流值。
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公开(公告)号：EP2802076B1
公开(公告)日：2015-11-18
申请号：EP13167116.6
申请日：2013-05-08
申请人： NXP B.V.
发明人： Hissink, Derk-Jan , Martin, Max , Mostert, Fred
CPC分类号： H03F3/2173 , H03F1/52 , H03F3/185 , H03F3/187 , H03F3/45179 , H03F3/45475 , H03F3/68 , H03F2200/03 , H03F2200/33 , H03F2203/21136 , H03F2203/45171 , H04R1/00
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公开(公告)号：EP2802076A1
公开(公告)日：2014-11-12
申请号：EP13167116.6
申请日：2013-05-08
申请人： NXP B.V.
发明人： Hissink, Derk-Jan , Martin, Max , Mostert, Fred
CPC分类号： H03F3/2173 , H03F1/52 , H03F3/185 , H03F3/187 , H03F3/45179 , H03F3/45475 , H03F3/68 , H03F2200/03 , H03F2200/33 , H03F2203/21136 , H03F2203/45171 , H04R1/00
摘要： An amplifier has a dual bridge design with two bridge amplifiers. A mode switch enables them to be configured in a series amplification mode. The switching of the mode switch is dynamic and enables re-use of signal current thereby improving overall system efficiency. A delay to the mode switch closure is provided in the event of clipping of one of the amplifier outputs. This prevents large cross currents from flowing.
摘要翻译： 放大器具有双桥设计，具有两个桥式放大器。 模式开关使它们能够以串联放大模式进行配置。 模式开关的切换是动态的，并且能够重新使用信号电流，从而提高整体系统效率。 在削波一个放大器输出的情况下，提供模式切换闭合的延迟。 这样可以防止大的交叉电流流动。
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公开(公告)号：EP2317644B1
公开(公告)日：2015-10-28
申请号：EP09252519.5
申请日：2009-10-30
申请人： ST-Ericsson SA
CPC分类号： H03F1/305 , H03F1/342 , H03F3/187 , H03F3/45179 , H03F3/45475 , H03F2200/03 , H03F2200/156 , H03F2200/18 , H03F2200/27 , H03F2200/312 , H03F2200/396 , H03F2200/408 , H03F2200/414 , H03F2200/417 , H03F2200/453 , H03F2200/456 , H03F2200/507 , H03F2200/522 , H03F2203/45101 , H03F2203/45138 , H03F2203/45151 , H03F2203/45171 , H03F2203/45206 , H03F2203/45226 , H03F2203/45528 , H03F2203/45536 , H03F2203/45586 , H03F2203/45588 , H03F2203/45618 , H03F2203/45728 , H03G3/34
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公开(公告)号：EP2908433A1
公开(公告)日：2015-08-19
申请号：EP15000351.5
申请日：2015-02-06
CPC分类号： H03F1/083 , H03F1/3211 , H03F3/45076 , H03F3/45278 , H03F2200/372 , H03F2203/45116 , H03F2203/45136 , H03F2203/45171 , H03F2203/45222 , H03F2203/45536 , H03F2203/45616 , H03F2203/45618
摘要： An operational amplifier circuit reduces signal distortion in switching circuits resulting from flow of bias current through an analog switch having a resistance that changes with a common mode voltage level. The circuit includes an operational amplifier, and first, second, and third switches monolithically integrated on a same integrated circuit substrate. The first switch is connected in a feedback path of the operational amplifier between an output and an inverting input of the operational amplifier. The second and third switches each have one terminal connected to a non-inverting input of the operational amplifier and another terminal receiving a respective input signal, and operate to provide a selected input signal to the amplifier. The first switch operates in a conducting state before, during, and after any period in which any of the second and third switches is in the conducting state. The switches may be analog switches having same operational characteristics.
摘要翻译： 运算放大器电路通过具有随着共模电压电平变化的电阻的模拟开关而减小由偏置电流的流动导致的开关电路中的信号失真。 该电路包括一个运算放大器以及单片集成在同一集成电路基板上的第一，第二和第三开关。 第一开关连接在运算放大器的反馈路径之间，运算放大器的输出和反相输入端之间。 第二和第三开关各自具有连接到运算放大器的非反相输入端的一个端子和接收相应输入信号的另一个端子，并且操作以向放大器提供所选择的输入信号。 第一开关在任何第二和第三开关处于导通状态的任何时段之前，期间和之后操作在导通状态。 开关可以是具有相同操作特性的模拟开关。
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公开(公告)号：EP3261250A1
公开(公告)日：2017-12-27
申请号：EP16885458.6
申请日：2016-07-19
发明人： ZHANG, Mengwen
IPC分类号： H03F3/45
CPC分类号： H03F1/0205 , H03F1/301 , H03F1/32 , H03F3/005 , H03F3/187 , H03F3/45183 , H03F3/45188 , H03F3/45192 , H03F3/45475 , H03F3/45659 , H03F3/45699 , H03F3/45762 , H03F2200/129 , H03F2200/156 , H03F2200/159 , H03F2200/18 , H03F2200/222 , H03F2200/252 , H03F2200/264 , H03F2200/471 , H03F2200/555 , H03F2203/45008 , H03F2203/45012 , H03F2203/45024 , H03F2203/45028 , H03F2203/45054 , H03F2203/45068 , H03F2203/45082 , H03F2203/45112 , H03F2203/45134 , H03F2203/45136 , H03F2203/45171 , H03F2203/45174 , H03F2203/45182 , H03F2203/45188 , H03F2203/45192 , H03F2203/45208 , H03F2203/45244 , H03F2203/45332 , H03F2203/45421 , H03F2203/45434 , H03F2203/45444 , H03F2203/45512 , H03F2203/45514 , H03F2203/45534 , H03F2203/45544 , H03F2203/45546 , H03F2203/45551 , H03F2203/45586 , H03F2203/45588 , H03F2203/45616 , H03F2203/45632 , H03F2203/45642 , H03F2203/45656 , H03F2203/45674 , H03F2203/45676
摘要： The present application provides an amplifying circuit comprising a reference voltage generating circuit, a common-mode voltage conversion circuit, a common-mode negative feedback circuit, and an amplifying sub-circuit. The reference voltage generating circuit generates a first reference voltage, a second reference voltage, and a reference common-mode voltage according to a post-stage common-mode voltage, the common-mode voltage conversion circuit converts the pre-stage output differential signal into a differential input signal according to the reference common-mode voltage, the common-mode negative feedback circuit generates a control voltage to quickly establish a common-mode negative feedback of the amplifying sub-circuit, wherein the first reference voltage and the second reference voltage are used to cancel a baseline signal of the pre-stage output differential signal. The amplifying circuit provided in the present application can eliminate the baseline signal, convert the common-mode voltage and quickly establish the common-mode negative feedback.
摘要翻译： 本申请提供一种放大电路，包括参考电压产生电路，共模电压转换电路，共模负反馈电路和放大子电路。 参考电压产生电路根据后级共模电压产生第一参考电压，第二参考电压和参考共模电压，共模电压转换电路将前级输出差分信号转换为 根据所述参考共模电压产生差分输入信号，所述共模负反馈电路产生控制电压以快速建立所述放大子电路的共模负反馈，其中，所述第一参考电压和所述第二参考电压 被用于消除前级输出差分信号的基线信号。 本申请提供的放大电路可以消除基线信号，转换共模电压，快速建立共模负反馈。
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公开(公告)号：EP3176945A1
公开(公告)日：2017-06-07
申请号：EP15198050.5
申请日：2015-12-04
申请人： ams AG
发明人： Steiner, Matthias , Fitzi, Andreas
CPC分类号： H03F1/26 , H03F3/005 , H03F3/423 , H03F3/4521 , H03F3/45645 , H03F2200/129 , H03F2200/264 , H03F2200/372 , H03F2200/555 , H03F2200/75 , H03F2203/45082 , H03F2203/45088 , H03F2203/45091 , H03F2203/45116 , H03F2203/45134 , H03F2203/45156 , H03F2203/45171 , H03F2203/45174 , H03F2203/45208 , H03F2203/45221 , H03F2203/45244 , H03F2203/45352 , H03F2203/45416 , H03F2203/45434 , H03F2203/45481 , H03F2203/45512 , H03F2203/45544 , H03F2203/45551 , H03F2203/45561 , H03F2203/45616
摘要： An amplifier arrangement has a first differential stage with a first transistor pair, a second differential stage with a first and a second transistor pair, each pair having a common source connection coupled to a drain terminal to a respective one of the transistors of the first differential stage. The amplifier arrangement further has a first complementary differential stage with a transistor pair having opposite conductivity type compared to the transistor pair of the first differential stage, and a second complementary differential stage with a first and a second transistor pair of the complementary conductivity type. The first and the second complementary differential stage are connected symmetrically compared to the first and the second differential stage. The transistors of the second complementary differential stage are symmetrically connected to the transistors of the second differential stage such that respective first, second, third and fourth current paths are formed. A pair of output terminals is coupled to the first and the second current path. Gate terminals of the transistors of each of the stages are coupled to a respective pair of input terminals.
摘要翻译： 一种放大器装置具有：具有第一晶体管对的第一差分级，具有第一和第二晶体管对的第二差分级，每一对具有公共源极连接，该公共源极连接耦合到第一差分晶体管的相应一个晶体管的漏极端子 阶段。 放大器装置还具有第一互补差分级和第二互补差分级，第一互补差分级具有与第一差分级的晶体管对相比导电类型相反的晶体管对，第二互补差分级具有互补导电类型的第一和第二晶体管对。 与第一和第二差动级相比，第一和第二互补差动级对称地连接。 第二互补差分级的晶体管对称地连接到第二差分级的晶体管，使得分别形成第一，第二，第三和第四电流路径。 一对输出端子耦合到第一和第二电流路径。 每个级的晶体管的栅极端子耦合到相应的一对输入端子。
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公开(公告)号：EP2413499B1
公开(公告)日：2013-05-01
申请号：EP11175061.8
申请日：2011-07-22
发明人： Onishi, Akinobu
CPC分类号： H03F3/005 , H03F1/0244 , H03F2203/45171 , H03H19/004 , H03M3/32 , H03M3/43 , H03M3/454
摘要： A switched capacitor circuit comprises a capacitor (C1), switches (SW1 ˆ¼ SW4) provided on an input side and an output side of the capacitor (C1), respectively, and an operational amplifier of a later stage which receives an output of the capacitor (C1), wherein a current value of a current supplied to the operational amplifier is switched according to at least one open/closed state of the switches (SW1 ˆ¼ SW4).
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公开(公告)号：EP2317644A1
公开(公告)日：2011-05-04
申请号：EP09252519.5
申请日：2009-10-30
申请人： ST-Ericsson SA
CPC分类号： H03F1/305 , H03F1/342 , H03F3/187 , H03F3/45179 , H03F3/45475 , H03F2200/03 , H03F2200/156 , H03F2200/18 , H03F2200/27 , H03F2200/312 , H03F2200/396 , H03F2200/408 , H03F2200/414 , H03F2200/417 , H03F2200/453 , H03F2200/456 , H03F2200/507 , H03F2200/522 , H03F2203/45101 , H03F2203/45138 , H03F2203/45151 , H03F2203/45171 , H03F2203/45206 , H03F2203/45226 , H03F2203/45528 , H03F2203/45536 , H03F2203/45586 , H03F2203/45588 , H03F2203/45618 , H03F2203/45728 , H03G3/34
摘要： An amplifier (100, 300) comprises a main amplification stage (40) and an auxiliary amplification stage (50). An input of the main amplification stage (40) and an input of the auxiliary amplification stage (50) are coupled to a common node (30), and an output of the main amplification stage (40) is coupled to an output node (20). During activation, before power is supplied to the main amplification stage (40), the output node (30) is coupled to a reference voltage (V REF ). A quiescent voltage is then established at the common node (30) by coupling power to the auxiliary amplification stage (50). Only then is power coupled to the main amplification stage (40) and the reference voltage (V REF ) de-coupled from the output node (20).
摘要翻译： 放大器（100,300）包括主放大级（40）和辅助放大级（50）。 主放大级（40）的输入和辅助放大级（50）的输入耦合到公共节点（30），并且主放大级（40）的输出耦合到输出节点（20） ）。 在激活期间，在向主放大级（40）供电之前，输出节点（30）耦合到参考电压（V REF）。 然后通过将功率耦合到辅助放大级（50），在公共节点（30）处建立静态电压。 只有这时功率耦合到主放大级（40）和从输出节点（20）去耦合的参考电压（V REF）。
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