AMPLIFIER WITH LOW COMPONENT COUNT AND ACCURATE GAIN

    公开(公告)号:EP4167482A1

    公开(公告)日:2023-04-19

    申请号:EP22199841.2

    申请日:2022-10-05

    申请人: NXP B.V.

    IPC分类号: H03F3/393 H03F3/45 H03F1/26

    摘要: An amplifier including a P-channel transistor (P1) having current terminals coupled between a first node and a second node and having a control terminal coupled to a third node receiving an input voltage, an N-channel transistor (N1) having current terminals coupled between a fourth node developing an output voltage and a supply voltage reference and having a control terminal coupled to the second node, a first resistor (R1) coupled between the first node and a supply voltage, a second resistor (R2) coupled between the first and fourth nodes, and a current sink sinking current from the second node to the supply reference node. The amplifier may be converted to differential form for amplifying a differential input voltage. Current devices may be adjusted for common mode, and may be moved or added to improve headroom or to improve power supply rejection. Chopper circuits may be added to reduce 1/f noise.

    Anordnung zur Kompensation einer Offset-Spannung und Verfahren
    2.
    发明公开
    Anordnung zur Kompensation einer Offset-Spannung und Verfahren 审中-公开
    布置用于补偿偏移电压和方法

    公开(公告)号:EP3035528A1

    公开(公告)日:2016-06-22

    申请号:EP14199336.0

    申请日:2014-12-19

    发明人: Prochaska, Dirk

    摘要: Die Erfindung betrifft eine Anordnung (1) zur Kompensation einer Offset-Spannung (U off ) eines elektronischen Verstärkers (2), umfassend
    - einen elektronischen Verstärker (2) mit einem ersten Eingang (E+), einem zweiten Eingang (E-), einem ersten Ausgang (A+) und einem zweiten Ausgang (A-),
    - einem Eingangsschaltmittel (10),
    - einem Ausgangsschaltmittel (20),
    - einer Steuerschaltung (30),

    wobei die Eingangsschaltmittel (10) derart zwischen einem Signaleingang (X) und dem ersten Eingang (E+) und dem zweiten Eingang (E-) angeordnet sind, dass in einem ersten Schaltzustand (Z1) der erste Eingang (E+) mit dem Signaleingang (X) verbunden ist und in einem zweiten Schaltzustand (Z2) der zweite Eingang (E-) mit dem Signaleingang (X) verbunden ist, und wobei die Ausgangsschaltmittel (20) derart zwischen einem Signalausgang (Y) angeordnet sind, dass in dem ersten Schaltzustand (Z1) der erste Ausgang (A+) mit dem Signalausgang (Y) verbunden ist und in dem zweiten Schaltzustand (Z2) der zweite Ausgang (A-) mit dem Signalausgang (Y) verbunden ist, und wobei die Steuerschaltung (30) ausgestaltet ist das Eingangsschaltmittel (10) und das Ausgangsschaltmittel (20) synchron in den ersten Schaltzustand (Z1) bzw. in den zweiten Schaltzustand (Z2) zu schalten.

    摘要翻译: 本发明涉及一种装置(1)一种用于电子放大器的补偿的偏移电压(U关闭)(2),包括: - (2),具有第一输入端(E +),第二输入(E-)电子放大器,一 第一输出端(A +)和第二输出(O), - 输入切换装置(10), - 输出切换装置(20), - 一个控制电路(30),其中,所述输入切换装置设置在信号输入(X)和(10)之间 第一输入端(E +)和第二输入(E-)被布置成使得在第一切换状态(Z1),所述第一输入(E +)的信号输入(X)和在第二开关状态(Z2),第二输入( E-)被连接到信号输入(X),并且其中所述布置的信号输出(Y)之间的输出开关装置(20)被布置成使得(在连接到所述第一输出(+)到信号输出所述第一切换状态Z1)(Y) 以及在所述第二的第二切换状态(Z2) 输出(A)到信号输出(Y)连接,并且其中所述控制电路(30)在输入切换装置(10)和所述输出开关装置(20)同步地在所述第一开关状态(Z1)或配置(在第二切换状态Z2 切换)。

    HIGH SIDE CURRENT SENSE AMPLIFIER
    3.
    发明公开
    HIGH SIDE CURRENT SENSE AMPLIFIER 有权
    HIGH-SIDE-STROMMESSVERSTÄRKER

    公开(公告)号:EP2839579A1

    公开(公告)日:2015-02-25

    申请号:EP12723319.5

    申请日:2012-05-09

    摘要: A single stage current sense amplifier is described that generates a differential output that is proportional to a current through a sense resistor. The voltage across the sense resistor is Vsense. The current sense amplifier includes a differential transconductance amplifier having high impedance input terminals. An on-chip RC filter filters transients in the Vsense signal. A feedback circuit for each leg of the amplifier causes a pair of input transistors to conduct a fixed constant current irrespective of Vsense, which stabilizes the transconductance. A gain control resistor (Re) is coupled across terminals of the pair of input transistors and has Vsense across it. The current through the gain control resistor is therefore Vsensex1/Re. A level shifting circuit coupled to each of the input transistors lowers a common mode voltage at an output of the amplifier. Chopper circuits at the input and output cancel any offset voltages.

    摘要翻译: 描述了单级电流检测放大器,其产生与通过检测电阻器的电流成比例的差分输出。 检测电阻两端的电压为Vsense。 电流检测放大器包括具有高阻抗输入端的差分跨导放大器。 片内RC滤波器对Vsense信号中的瞬变进行滤波。 放大器的每个支路的反馈电路使得一对输入晶体管能够导通固定的恒定电流,而与Vsense无关,从而稳定跨导。 增益控制电阻(Re)耦合在该对输入晶体管的端子之间,并且在其上具有Vsense。 因此,通过增益控制电阻的电流为Vsensex1 / Re。 耦合到每个输入晶体管的电平移动电路在放大器的输出处降低共模电压。 输入和输出的斩波电路可以消除任何偏置电压。

    Single-ended chopper stabilized operational amplifier
    4.
    发明公开
    Single-ended chopper stabilized operational amplifier 失效
    斩波器 - Gegentaktoperationsverstärkermit Eintaktausgang。

    公开(公告)号:EP0410295A2

    公开(公告)日:1991-01-30

    申请号:EP90113802.4

    申请日:1990-07-19

    申请人: MOTOROLA, INC.

    发明人: Mijuskovic, Dejan

    IPC分类号: H03F3/393

    摘要: A single-ended operational amplifier uses a plurality of chopper circuits (9, 16, 24) to alternately transpose matched transistor pairs for cancelling offset errors due to transistor mismatches from statistical process variations. The differential input signals are transposed while simultaneously transposing the currents in a current mirror (14, 15) and in the load devices (37). The matched devices comprising an output stage (36) remain untransposed since their contribution to offset error is minimal but their contribution to noise error would be substantial due to the potentially larger voltage differentials existing between them.

    摘要翻译: 单端运算放大器使用多个斩波电路(9,16,24)来交替地转置匹配的晶体管对,以消除由于来自统计过程变化的晶体管不匹配引起的偏移误差。 差分输入信号被同时转置在电流镜(14,15)和负载装置(37)中。 包括输出级(36)的匹配装置保持未被转换,因为它们对偏移误差的贡献最小,但由于它们之间存在潜在的较大的电压差,它们对噪声误差的贡献将是显着的。

    INSTRUMENTATION AMPLIFIER
    6.
    发明公开

    公开(公告)号:EP3621199A1

    公开(公告)日:2020-03-11

    申请号:EP19196188.7

    申请日:2019-09-09

    发明人: GUIDRY, Michael

    IPC分类号: H03F3/195 H03F3/393 H03F3/45

    摘要: The present disclosure relates to a first stage of an instrumentation amplifier. The instrumentation amplifier comprises a pair of input amplifiers, each comprising an input transistor and a feedback current amplifier configured to amplify and feedback an error current from the input transistor. The arrangement may enable a current efficient solution where the amplifier can operate with very low input signals that are close to, or potentially below ground, without requiring a negative power supply voltage.

    ZERO DRIFT, LIMITLESS AND ADJUSTABLE REFERENCE VOLTAGE GENERATION
    8.
    发明公开
    ZERO DRIFT, LIMITLESS AND ADJUSTABLE REFERENCE VOLTAGE GENERATION 审中-公开
    无线电无线电无线电

    公开(公告)号:EP3079256A1

    公开(公告)日:2016-10-12

    申请号:EP16164181.6

    申请日:2016-04-07

    摘要: A circuit for generation of a reference voltage for an electronic system, which circuit comprises at least one digital buffer (U21, U31, U32, U41, U51), a low pass filter (R21, C21; R31, C31; R41, C41; R51, C51) and an operational amplifier (OA21, OA31, OA41, OA51)), which circuit is adapted to revive an input in the form of a bandgap reference voltage into the digital buffer, which digital buffer is adapted to receive a digital input from a Pulse Width Modulated (PWM) signal, which digital buffer is adapted to generate an output signal adapted to be fed to the low pass filter, which output signal after filtration is adapted to be fed to a positive input terminal of the operational amplifier, which operational amplifier comprises a feedback circuit, which feedback circuit comprises at least one capacitor (C22, C32, C44, C54) adapted to be connected from an output terminal of the operational amplifier towards a negative input terminal of the operational amplifier so as to form an integrator, wherein the feedback circuit further comprises at least one chopped signal path (R22, S21; R33, R34, S32; R33, R35, C35, S31), which chopped signal is adapted to be modulated by the output signal of the digital buffer.

    摘要翻译: 用于产生电子系统的参考电压的电路,该电路包括至少一个数字缓冲器(U21,U31,U32,U41,U51),低通滤波器(R21,C21; R31,C31; R41,C41; R51,C51)和运算放大器(OA21,OA31,OA41,OA51)),该电路适于将带隙参考电压形式的输入恢复到数字缓冲器中,该数字缓冲器适于接收数字输入 来自脉宽调制(PWM)信号,该数字缓冲器适于产生适于馈送到低通滤波器的输出信号,滤波后的输出信号适于馈送到运算放大器的正输入端, 该运算放大器包括反馈电路,该反馈电路包括适于从运算放大器的输出端子向运算放大器的负输入端连接的至少一个电容器(C22,C32,C44,C54),以形成 一个整合 其中所述反馈电路还包括至少一个斩波信号路径(R22,S21; R33,R34,S32; R33,R35,C35,S31),该斩波信号适于由数字缓冲器的输出信号进行调制。

    SENSOR DEVICE
    10.
    发明公开
    SENSOR DEVICE 审中-公开
    传感器装置

    公开(公告)号:EP2471176A2

    公开(公告)日:2012-07-04

    申请号:EP10771536.9

    申请日:2010-08-25

    IPC分类号: H03F3/393 H03F3/45 H03F3/387

    摘要: A sensor device is provided with a voltage detection type sensor unit (20) for converting a physical quantity into a voltage value and outputting a voltage signal indicating the voltage value; a chopper amplifier unit (10) for generating a modulation signal by chopping the voltage signal output from the sensor unit with a predetermined chopping frequency, amplifying the modulation signal into an amplification signal, then demodulating the amplification signal and outputting it as an output signal; an integration unit (13) including an operational amplifier (14) for amplifying a voltage difference between a voltage at a non- inverting input terminal and a voltage at an inverting input terminal, an input resistor (Rl) connected to the inverting input terminal of the operational amplifier and a capacitor (Cl) connected between the inverting input terminal and an output terminal of the operational amplifier (14) and adapted to sample the output signal output from the chopper amplifier unit (10) at a predetermined sampling frequency and integrate the sampled output signal.