公开(公告)号：JP2006216720A

公开(公告)日：2006-08-17

申请号：JP2005027056

申请日：2005-02-02

Applicant: Sharp Corp ,  シャープ株式会社

Inventor： FUKUDA KAZUHIKO ,  TOYOSAWA KENJI

IPC: H01L21/56 ,  H01L21/60

CPC classification number: H01L23/4985 ,  H01L21/563 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/07811 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/0401

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device which can be reduced in outer shape by reducing the width of a sealing resin region used for protecting a semiconductor element, and also to provide its manufacturing method. SOLUTION: In the semiconductor device 10 such as COF, a semiconductor chip 4 is mounted on a film-like flexible wiring board 1 whereon a wiring pattern 2/3 is formed, and a space between the flexible wiring board 1 and the semiconductor chip 4 is filled with a sealing resin 6 for protecting the semiconductor chip 4. The width of the resin is 0.1-1.0 mm in a drawing trace 6c generated when drawing the long side of the semiconductor chip 4 by a nozzle, and filling the space between the flexible wiring board 1 and the semiconductor chip 4 with the sealing resin, while the thickness of the resin is 10 μm or less in the drawing trace 6c. COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 解决的问题：提供通过减小用于保护半导体元件的密封树脂区域的宽度而可以减小外形的半导体器件，并且还提供其制造方法。 解决方案：在诸如COF的半导体器件10中，半导体芯片4安装在形成布线图案2/3的薄膜状柔性布线板1上，柔性布线板1和 半导体芯片4填充有用于保护半导体芯片4的密封树脂6.当通过喷嘴拉伸半导体芯片4的长边时产生的拉丝痕迹6c中树脂的宽度为0.1-1.0mm，并且填充 柔性布线基板1与半导体芯片4之间的密封树脂的间隔，而树脂的厚度在拉丝轨迹6c中为10μm以下。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2006202856A

公开(公告)日：2006-08-03

申请号：JP2005010847

申请日：2005-01-18

Applicant: Sharp Corp ,  シャープ株式会社

Inventor： TANAKA YASUHIKO ,  TOYOSAWA KENJI

IPC: H01L21/60 ,  G02F1/1345

CPC classification number: H01L23/4985 ,  G02F1/13452 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/07811 ,  H01L2924/12044 ,  H01L2924/19105 ,  H05K1/0393 ,  H05K1/189 ,  H05K3/323 ,  H05K3/389 ,  H05K2201/0239 ,  H01L2924/00 ,  H01L2224/0401

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device where adhesiveness of a substrate formed of an insulating film and anisotropic conductive adhesive is improved and an additional adhesion reinforcing material can be eliminated, and to provide a display model and a manufacturing method of the semiconductor device. SOLUTION: In the semiconductor device 10, a semiconductor chip 4 having wiring patterns 2 and 3 is mounted on a substrate 1 formed of the insulating film consisting of an organic substance. The substrate is electrically connected to a liquid crystal display panel 21 and a PW substrate 30 with anisotropic conductive adhesive 11. A processing is performed on at least one surface of the insulating film with silicon coupling agent 31. Then, 0.5 to 12.0 atomic% (surface element concentration) of silicon (Si) exists on the surface of the insulating film as a configuration element of silicon coupling agent. COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种半导体器件，其中由绝缘膜和各向异性导电粘合剂形成的基底的粘附性得到改善，并且可以消除附加的附着增强材料，并提供显示模型和制造方法 半导体器件。 解决方案：在半导体器件10中，具有布线图案2和3的半导体芯片4安装在由有机物质构成的绝缘膜形成的基板1上。 基板与具有各向异性导电粘合剂11的液晶显示面板21和PW基板30电连接。利用硅偶联剂31在绝缘膜的至少一个表面上进行处理。然后，将0.5〜12.0原子％ 表面元素浓度）作为硅偶联剂的构成元素存在于绝缘膜的表面上。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2003023035A

公开(公告)日：2003-01-24

申请号：JP2001205121

申请日：2001-07-05

Applicant: Sharp Corp ,  シャープ株式会社

Inventor： SUZUKI TAKEHIRO ,  TOYOSAWA KENJI

IPC: H01L21/60 ,  H01L23/498 ,  H05K1/02 ,  H05K1/18

CPC classification number: H01L24/81 ,  H01L23/4985 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/3025 ,  H01L2924/351 ,  H05K1/0271 ,  H05K1/189 ,  H05K2201/068 ,  H05K2201/09736 ,  H05K2201/09781 ,  H05K2201/10674 ,  H05K2201/2009 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device for surely, connecting a semiconductor element and the wiring pattern of a wiring board by preventing their dislocation.
SOLUTION: The semiconductor device is constituted of the semiconductor element 1 and the wiring board 6 where the wiring pattern 5 is formed on a film substrate 4. The semiconductor element 1 and the wiring pattern 5 are connected, and semiconductor element 1 and the wiring board 6 are sealed with resin. A metal film 8 is formed in a region where the wiring pattern is not formed in at least one face of the film substrate 4 by a material whose coefficient of lineer expansion is smaller than that of the film substrate 4.
COPYRIGHT: (C)2003,JPO

Abstract translation: 要解决的问题：为了确保半导体装置，通过防止它们的位错来连接半导体元件和布线板的布线图案。 解决方案：半导体器件由半导体元件1和布线板6构成，其中布线图案5形成在薄膜基板4上。半导体元件1和布线图案5连接，半导体元件1和布线板 6用树脂密封。 金属膜8通过线材膨胀系数小于膜基板4的材料的材料形成在薄膜基板4的至少一个面上未形成布线图案的区域。

公开(公告)号：JP2011119758A

公开(公告)日：2011-06-16

申请号：JP2011030965

申请日：2011-02-16

Applicant: Sharp Corp ,  シャープ株式会社

Inventor： FUKUDA KAZUHIKO ,  TOYOSAWA KENJI ,  KIDOGUCHI TAKASHI

IPC: H01L23/29 ,  C08K5/3492 ,  C08L101/00 ,  H01L21/60 ,  H01L23/31 ,  H05K3/28

CPC classification number: H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a high-reliability semiconductor device adapted to prevent the occurrence of migration resulting from deposition of metal ions from wirings. SOLUTION: The semiconductor device includes: a flexible wiring board 11 having a plurality of wirings 9 arranged on a base film 1; semiconductor chips 5 mounted on the flexible wiring board 11; and sealing resin 6 which is arranged between the flexible wiring board 11 and the semiconductor chip 5 so that at least part of the sealing resin 6 contacts the wirings 9. In this arrangement, a metal ion binding agent is mixed with the sealing resin 6. COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供一种高可靠性的半导体器件，其适于防止由于布线中的金属离子的沉积而发生迁移。 解决方案：半导体器件包括：柔性布线板11，其具有布置在基膜1上的多个布线9; 安装在柔性布线板11上的半导体芯片5; 以及布置在柔性布线板11和半导体芯片5之间的密封树脂6，使得至少一部分密封树脂6接触布线9.在这种布置中，金属离子粘合剂与密封树脂6混合。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2004327921A

公开(公告)日：2004-11-18

申请号：JP2003123966

申请日：2003-04-28

Applicant: Sharp Corp ,  シャープ株式会社

Inventor： SHOJI YASUSHI ,  TOYOSAWA KENJI

IPC: H01L21/60

CPC classification number: H01L2224/11

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor element which does not occur problem of stress concentration, which does not damage the underlying part of bump electrodes, which hardly occurs insulation fault between bump electrodes, which hardly occurs break fault, and which does not reduce the reliability of ACF connection, during bonding. SOLUTION: In the semiconductor element in which one or more bump electrode 7 is provided on one or more electrode made of multilayered metal wirings 2, 4 constructed on a semiconductor substrate 1, after a metal body (7) is formed on the electrode, the bump electrode 7 is produced by roughening the surface of the metal body rougher than when it is formed. COPYRIGHT: (C)2005,JPO&NCIPI

公开(公告)号：JP2003330041A

公开(公告)日：2003-11-19

申请号：JP2002136309

申请日：2002-05-10

Applicant: Sharp Corp ,  シャープ株式会社

Inventor： SUZUKI TAKEHIRO ,  TOYOSAWA KENJI

IPC: G02F1/1345 ,  G02F1/13 ,  H01L23/52 ,  H01L23/538

CPC classification number: H01L23/5386 ,  G02F1/13452 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2224/05599

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device capable of miniaturizing a display panel module and reducing costs while avoiding characteristic abnormality and delay in a signal transmission rate caused by a lengthened distance of input signal wiring, and to provide a display panel module. SOLUTION: In the semiconductor device 4, a plurality of semiconductor elements 5... is mounted in a COF system on one piece of a carrier tape. Here, each semiconductor element 5 is about rectangular, and each longitudinal direction is alined with the longitudinal direction of the carrier tape 6, and is also arranged along the longitudinal direction of the carrier tape 6. Then, the adjacent semiconductor elements 5 are connected via the wiring on the carrier tape. COPYRIGHT: (C)2004,JPO

Abstract translation: 要解决的问题：提供能够使显示面板模块小型化并且降低成本的半导体器件，同时避免由于输入信号布线的延长的距离引起的特征异常和信号传输速率的延迟，并且提供显示面板 模块。 解决方案：在半导体器件4中，多个半导体元件5 ...安装在一个载带上的COF系统中。 这里，每个半导体元件5大致为矩形，并且每个纵向方向与载带6的长度方向配合，并且也沿着载带6的长度方向排列。然后，相邻的半导体元件5经由 载带上的接线。 版权所有（C）2004，JPO

公开(公告)号：JP2011108849A

公开(公告)日：2011-06-02

申请号：JP2009262337

申请日：2009-11-17

Applicant: Sharp Corp ,  シャープ株式会社

Inventor： TOYOSAWA KENJI

IPC: H01L23/14 ,  H01L23/12

CPC classification number: H01L2224/16225 ,  H01L2224/73204

Abstract: PROBLEM TO BE SOLVED: To provide an electronic component or the like, capable of suppressing a position shift of an external output terminal from a connection terminal which is caused when the external output terminal is joined to a connection terminal of another device. SOLUTION: A COF 1 having a polyimide film 3 provided with an output-side outer lead 4a is characterized in that at least one of a coefficient of thermal expansion CTE (TD) indicating a degree of expansion of the polyimide film 3 in a width direction TD and a coefficient of thermal expansion CTE (MD) indicating a degree of expansion of the polyimide film 3 in a machine conveyance direction MD is ≥-10 ppm/°C and COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 解决的问题：提供一种电子部件等，其能够抑制外部输出端子从外部输出端子与另一装置的连接端子接合时所引起的连接端子的位置偏移。 解决方案：具有设置有输出侧外引线4a的聚酰亚胺膜3的COF 1的特征在于，表示聚酰亚胺膜3的膨胀度的热膨胀系数CTE（TD）中的至少一个 宽度方向TD和表示聚酰亚胺膜3在机器输送方向MD上的膨胀度的热膨胀系数CTE（MD）为≥-10ppm /℃和<3ppm /℃。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2009021639A

公开(公告)日：2009-01-29

申请号：JP2008276015

申请日：2008-10-27

Applicant: Sharp Corp ,  シャープ株式会社

Inventor： YAMAJI YASUHISA ,  TOYOSAWA KENJI

IPC: H01L21/60

CPC classification number: H01L2224/73204

Abstract: PROBLEM TO BE SOLVED: To provide a film for a semiconductor carrier whose insulation resistance between terminals is harder to deteriorate than before even under a hot and humid environment so as to be applicable to fine pitch and high output, and to provide a semiconductor device using the same. SOLUTION: A film 1 for a semiconductor carrier includes a base film 10 having an insulation property, a barrier layer 2 whose major component is a nickel-chrome alloy formed on the base film 10, and a wiring layer 3 composed of a copper-containing conductive matter formed on the barrier layer 2. The chromium content in the barrier layer 2 is 15-50 wt.%. A semiconductor device is formed by connecting a semiconductor element with the wiring layer 3. COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：为了提供一种用于半导体载体的膜，即使在热和潮湿环境下，端子之间的绝缘电阻比以前更难劣化，以适用于细间距和高输出，并且提供 半导体器件使用相同。 解决方案：用于半导体载体的膜1包括具有绝缘性的基膜10，主要成分是形成在基膜10上的镍 - 铬合金的阻挡层2和由基底膜10构成的布线层3 形成在阻挡层2上的含铜导电物质。阻挡层2中的铬含量为15〜50重量％。 通过将半导体元件与布线层3连接形成半导体器件。版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2008166850A

公开(公告)日：2008-07-17

申请号：JP2008084311

申请日：2008-03-27

Applicant: Sharp Corp ,  シャープ株式会社

Inventor： YAMAJI YASUHISA ,  TOYOSAWA KENJI

IPC: H01L21/60

CPC classification number: H01L2224/73204

Abstract: PROBLEM TO BE SOLVED: To provide a film for a semiconductor carrier, wherein insulation resistance between terminals is less likely to deteriorate than the conventional types, even under an environment of high-temperature and high-humidity so as to be applicable to fine pitch and high output, and to provide a semiconductor device that uses the same. SOLUTION: The film 1 for a semiconductor carrier includes a base film 10, having insulating properties, a barrier layer 2 formed on top of the base film 10 and formed mainly of a nickel-chrome alloy, and an interconnecting layer 3 formed on top of the barrier layer 2 and formed of a conductive material containing copper. The chrome content in the barrier layer 2 is in a range of 15 to 50 wt.%. The semiconductor device is formed by having a semiconductor device jointed to the interconnecting layer 3. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：即使在高温高湿环境下，为了提供半导体载体的薄膜，即使在高温高湿环境下，端子之间的绝缘电阻也不如常规的那样劣化，因此适用于 细间距和高输出，并提供使用该半导体器件的半导体器件。 解决方案：用于半导体载体的膜1包括具有绝缘特性的基膜10，形成在基膜10的顶部上并主要由镍 - 铬合金形成的阻挡层2和形成的互连层3 在阻挡层2的顶部并由含铜的导电材料形成。 阻挡层2中的铬含量在15〜50重量％的范围内。 半导体器件通过具有连接到互连层3的半导体器件形成。版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2008053762A

公开(公告)日：2008-03-06

申请号：JP2007293771

申请日：2007-11-12

Applicant: Sharp Corp ,  シャープ株式会社

Inventor： SHOJI YASUSHI ,  TOYOSAWA KENJI

IPC: H01L21/60

CPC classification number: H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device in which a substrate made of a base film can be properly bent and breakage of the sprocket hole of the base film can be avoided at the time of conveyance, and a display module using the same. SOLUTION: The semiconductor device consists of a tape carrier package type in which wiring patterns formed on the flexible film are connected to an electrode for connection with an external circuit formed on at least one mounted semiconductor element. In the flexible film, the value of a product of Young's modulus E of the flexible material and the cube of the thickness (d) thereof is smaller than 4.03×10 -4 (Pa m 3 ), and the value of inverse of the product of Young's modulus E of the flexible material and the cube of the thickness (d) thereof is equal to or smaller than 3.92×10 -6 (Pa -1 m -1 ). COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：提供一种半导体器件，其中可以适当地弯曲由基膜制成的基板，并且可以在输送时避免基膜的链轮孔的破损，并且使用 一样。 解决方案：半导体器件由形成在柔性膜上的布线图案连接到用于与形成在至少一个安装的半导体元件上的外部电路连接的电极的载带封装形式组成。 在柔性膜中，挠性材料的杨氏模量E与其厚度d的立方体的值小于4.03×10 -4 （Pa m 3 ＆lt; / SP＆gt;），柔性材料的杨氏模量E与其厚度（d）的立方体的乘积的倒数相等于或等于3.92×10 -6 / （PA -1 米 -1 ）。 版权所有（C）2008，JPO＆INPIT