公开(公告)号：US08543742B2

公开(公告)日：2013-09-24

申请号：US13494409

申请日：2012-06-12

申请人： Frank Yu ,  Abraham C. Ma ,  Shimon Chen

发明人： Frank Yu ,  Abraham C. Ma ,  Shimon Chen

IPC分类号： G06F13/28 ,  G06F3/00 ,  G06F11/00

CPC分类号： G06F13/28 ,  G06F3/0604 ,  G06F3/0658 ,  G06F3/0688 ,  G06F11/1064 ,  G06F12/0246 ,  G06F12/0607 ,  G06F13/385 ,  G06F2212/7208 ,  G06F2212/7211 ,  G06F2213/3802

摘要： A smart flash drive has one or more levels of smart storage switches and a lower level of single-chip flash devices (SCFD's). A SCFD contains flash memory and controllers that perform low-level bad-block mapping and wear-leveling and logical-to-physical block mapping. The SCFD report their capacity, arrangement, and maximum wear-level count (WLC) and bad block number (BBN) to the upstream smart storage switch, which stores this information in a structure register. The smart storage switch selects the SCFD with the maximum BBN as the target and the SCFD with the lowest maximum WLC as the source of a swap for wear leveling when a WLC exceeds a threshold that rises over time. A top-level smart storage switch receives consolidated capacity, arrangement, WLC, and BBN information from lower-level smart storage switch. Data is striped and optionally scrambled by Redundant Array of Individual Disks (RAID) controllers in all levels of smart storage switches.

摘要翻译： 智能闪存驱动器具有一个或多个级别的智能存储交换机和较低级别的单芯片闪存设备（SCFD）。 SCFD包含执行低级坏块映射和磨损均衡以及逻辑到物理块映射的闪存和控制器。 SCFD向上游智能存储交换机报告其容量，布置和最大磨损级数（WLC）和坏块号（BBN），将该信息存储在结构寄存器中。 智能存储交换机选择具有最大BBN作为目标的SCFD，而当WLC超过随时间上升的阈值时，具有最低最大WLC的SCFD作为用于损耗均衡的交换的来源。 顶级智能存储交换机从低级智能存储交换机接收统一的容量，安排，WLC和BBN信息。 数据是条带化的，并且可选地由所有级别的智能存储交换机中的冗余冗余阵列（RAID）控制器加扰。

公开(公告)号：US08444423B2

公开(公告)日：2013-05-21

申请号：US13585704

申请日：2012-08-14

申请人： David Nguyen ,  Nan Nan ,  Jim Chin-Nan Ni ,  Frank I-Kang Yu ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： David Nguyen ,  Nan Nan ,  Jim Chin-Nan Ni ,  Frank I-Kang Yu ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： H01R12/00

CPC分类号： H01R13/6658

摘要： A USB plug receptacle includes a connector substrate having a tongue portion having a first set of electrical contact pins disposed on a top surface of the tongue portion, a second set of a plurality of electrical pins disposed on a bottom surface of the tongue portion, a third set of electrical contact pins disposed on an opposite end of the tongue portion. The USB plug receptacle further includes a metal case made of a sheet of electrically conductive metal plate by blanking the sheet into a generally tubular shape to receive and enclose the connector substrate. When the connector substrate is inserted into the metal case, the third set of electrical contact pins are exposed outside of the metal case and the third set of electrical contact pins can be mounted on first and second sets of electrical contact pads of a printed circuit board assembly.

摘要翻译： USB插头插座包括具有舌部的连接器基底，舌部具有设置在舌部的顶表面上的第一组电接触针，设置在舌部的底表面上的多个电针的第二组， 设置在舌部相对端的第三组电接触针。 USB插头插座还包括由导电金属板片制成的金属外壳，通过将片材冲压成大致管状形状以接收和封闭连接器基板。 当连接器基板插入金属壳体中时，第三组电接触销被暴露在金属外壳的外部，并且第三组电接触销可以安装在印刷电路板的第一和第二组电接触焊盘上 部件。

公开(公告)号：US08321597B2

公开(公告)日：2012-11-27

申请号：US13197721

申请日：2011-08-03

申请人： Frank Yu ,  Abraham C. Ma ,  Shimon Chen

发明人： Frank Yu ,  Abraham C. Ma ,  Shimon Chen

IPC分类号： G06F13/28 ,  G06F9/00

CPC分类号： G06F13/28 ,  G06F3/0658 ,  G06F3/0679 ,  G06F11/108 ,  G06F12/0246 ,  G06F13/385 ,  G06F21/79 ,  G06F2212/7208 ,  G06F2212/7211

摘要： A smart flash drive has one or more levels of smart storage switches and a lower level of single-chip flash devices (SCFD's). A SCFD contains flash memory and controllers that perform low-level bad-block mapping and wear-leveling and logical-to-physical block mapping. The SCFD report their capacity, arrangement, and maximum wear-level count (WLC) and bad block number (BBN) to the upstream smart storage switch, which stores this information in a structure register. The smart storage switch selects the SCFD with the maximum BBN as the target and the SCFD with the lowest maximum WLC as the source of a swap for wear leveling when a WLC exceeds a threshold that rises over time. A top-level smart storage switch receives consolidated capacity, arrangement, WLC, and BBN information from lower-level smart storage switch. Data is striped and optionally scrambled by Redundant Array of Individual Disks (RAID) controllers in all levels of smart storage switches.

摘要翻译： 智能闪存驱动器具有一个或多个级别的智能存储交换机和较低级别的单芯片闪存设备（SCFD）。 SCFD包含执行低级坏块映射和磨损均衡以及逻辑到物理块映射的闪存和控制器。 SCFD向上游智能存储交换机报告其容量，布置和最大磨损级数（WLC）和坏块号（BBN），将该信息存储在结构寄存器中。 智能存储交换机选择具有最大BBN作为目标的SCFD，并且具有最低最大WLC的SCFD作为WLC超过随时间上升的阈值时的损耗平衡的交换源。 顶级智能存储交换机从低级智能存储交换机接收统一的容量，安排，WLC和BBN信息。 数据是条带化的，并且可选地由所有级别的智能存储交换机中的冗余冗余阵列（RAID）控制器加扰。

公开(公告)号：USD671123S1

公开(公告)日：2012-11-20

申请号：US29396715

申请日：2011-07-06

申请人： Jim C. Ni ,  XuLin Cao

设计人： Jim C. Ni ,  XuLin Cao

公开(公告)号：US08200862B2

公开(公告)日：2012-06-12

申请号：US12887477

申请日：2010-09-21

申请人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma

发明人： Charles C. Lee ,  Frank Yu ,  Abraham C. Ma

IPC分类号： G06F13/12 ,  G06F13/00 ,  G06F12/02

CPC分类号： G06F13/28 ,  G11C13/0004 ,  G11C16/102 ,  G11C2216/30 ,  Y02D10/14

摘要： A flash-card reader improves transmission efficiency by using bulk streaming of multiple pipes. A bulk data-out pipe carries host write data to the card reader and can operate in parallel with a bulk data-in pipe that carries host read data that was read from a flash card attached to the card reader. Status packets do not block data packets since the he status packets are buffered through a separate status pipe, and commands are buffered through a command pipe. Flash data from multiple flash cards are interleaved as separate endpoints that share the bulk data-in pipe. A data in/out streaming state machine controls streaming bulk data through the bulk data-in and data-out pipes, while a status streaming state machine controls streaming status packets through the status pipe. Transaction overhead is reduced using bulk streaming where packets for several commands are combined into the same bulk streams.

摘要翻译： 闪存卡读卡器通过使用多个管道的批量流传输来提高传输效率。 批量数据输出管道将主机写入数据传送到读卡器，并且可以与承载从附接到读卡器的闪存卡读取的主机读取数据的批量数据输入管并行操作。 状态数据包不会阻塞数据包，因为状态数据包通过单独的状态管道进行缓冲，命令通过命令管道缓冲。 来自多个闪存卡的闪存数据被交织为共享大容量数据管道的单独端点。 数据输入/输出流状态机通过批量数据输入和数据输出管道控制流批量数据，而状态流状态机通过状态管道控制流状态数据包。 使用批量流量减少事务开销，其中几个命令的数据包被组合成相同的批量流。

公开(公告)号：US08116083B2

公开(公告)日：2012-02-14

申请号：US12943892

申请日：2010-11-10

申请人： Jim Chin-Nan Ni ,  Abraham C. Ma

发明人： Jim Chin-Nan Ni ,  Abraham C. Ma

IPC分类号： H05K1/14

CPC分类号： G06K19/041 ,  G06K19/07732

摘要： A USB device including a tubular housing and a rear cap assembly including a handle structure that is rotatably connected to the tubular housing to facilitate deploying and retracting a plug connector through a front opening of the housing. The plug connector is fixedly connected onto the front end of a sliding rack assembly that is disposed in housing such that the sliding rack assembly is slidable along a longitudinal axis. The sliding rack assembly includes a carrier including a carrier tray for supporting electronic devices and an elongated positioning rod extending from a rear portion of the carrier tray. The positioning rod is operably engaged with an actuator portion such that manual rotation of the rear cap handle structure relative to the housing around the longitudinal axis causes the sliding rack assembly to slide inside the housing between retracted and deployed positions.

摘要翻译： 一种USB装置，包括管状壳体和后盖组件，所述后盖组件包括手柄结构，所述手柄结构可旋转地连接到所述管状壳体，以便于通过所述壳体的前开口部署和缩回插头连接器。 插头连接器固定地连接到设置在壳体中的滑动架组件的前端，使得滑动架组件可沿着纵向轴线滑动。 滑动架组件包括载体，该载体包括用于支撑电子装置的载体托盘和从载体托盘的后部延伸的细长定位杆。 定位杆与致动器部分可操作地接合，使得后盖手柄结构相对于围绕纵向轴线的壳体的手动旋转导致滑架组件在收缩位置和展开位置之间在壳体内滑动。

公开(公告)号：US08108590B2

公开(公告)日：2012-01-31

申请号：US12139842

申请日：2008-06-16

申请人： David Q. Chow ,  Frank Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： David Q. Chow ,  Frank Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F21/32 ,  G06F21/78 ,  G06F2212/1036 ,  G06F2212/7202 ,  G06F2212/7208 ,  G06K19/07 ,  G06K19/07354

摘要： A flash system has multiple channels of flash memory chips that can be accessed in parallel. Host data is assigned to one of the channels by a multi-channel controller processor and accumulated in a multi-channel page buffer. When a page boundary in the page buffer is reached, the page buffer is written to a target physical block if full, or combined with old data fragments in an Aggregating Flash Block (AFB) when the logical-sector addresses (LSA's) match. Thus small fragments are aggregated using the AFB, reducing erases and wear of flash blocks. The page buffer is copied to the AFB when a STOP command occurs. Each channel has one or more AFB's, which are tracked by an AFB tracking table.

摘要翻译： 闪存系统具有可以并行访问的多个闪存芯片的通道。 主机数据被多通道控制器处理器分配给一个通道，并且累积在多通道页缓冲器中。 当到达页面缓冲区中的页面边界时，如果逻辑扇区地址（LSA）匹配，则页缓冲区将被写入目标物理块（如果已满）或与聚合闪存块（AFB）中的旧数据片段组合。 因此，使用AFB聚集小片段，减少闪存块的擦除和磨损。 发生STOP命令时，页面缓冲区被复制到AFB。 每个通道都有一个或多个AFB，它们由AFB跟踪表进行跟踪。

公开(公告)号：US08102657B2

公开(公告)日：2012-01-24

申请号：US12234581

申请日：2008-09-19

申请人： Siew S. Hiew ,  Abraham C. Ma ,  Nan Nan

发明人： Siew S. Hiew ,  Abraham C. Ma ,  Nan Nan

IPC分类号： H05K1/14

CPC分类号： G06F1/1632 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/19041 ,  H01R12/57 ,  H05K1/117 ,  H05K3/0052 ,  H05K3/284 ,  H05K3/326 ,  H05K3/4046 ,  H05K5/0278 ,  H05K2201/0311 ,  H05K2201/09472 ,  H05K2203/1316 ,  Y10T29/49124 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/4916 ,  Y10T29/53209 ,  H01L2224/85 ,  H01L2924/00014

摘要： A dual-personality extended USB (EUSB) system supports both USB and EUSB memory cards using an extended 9-pin EUSB socket. Each EUSB device 101 includes a PCBA having four standard USB metal contact pads disposed on an upper side of a PCB, and several extended purpose contact springs that extend through openings defined in the PCB. A single-shot molding process is used to form both an upper housing portion on the upper PCB surface that includes ribs extending between adjacent contact pads, and a lower molded housing portion that is formed over passive components and IC dies disposed on the lower PCB surface. The passive components are mounted using SMT methods, and the IC dies are mounted using COB methods. The extended 9-pin EUSB socket includes standard USB contacts and extended use contacts that communicate with the PCBA through the standard USB metal contacts and the contact springs.

摘要翻译： 双重个性扩展USB（EUSB）系统支持使用扩展的9针EUSB插座的USB和EUSB存储卡。 每个EUSB装置101包括PCBA，PCBA具有布置在PCB的上侧上的四个标准USB金属接触垫，以及延伸通过PCB中限定的开口的多个扩展用途接触弹簧。 使用单次成型工艺来形成上PCB表面上的上壳体部分，其包括在相邻接触垫之间延伸的肋，以及形成在无源部件上的下模制壳体部分和设置在下PCB表面上的IC管芯 。 使用SMT方法安装无源部件，并使用COB方法安装IC管芯。 扩展的9针EUSB插座包括通过标准USB金属触点和接触弹簧与PCBA通信的标准USB触点和扩展使用触点。

公开(公告)号：US08021166B1

公开(公告)日：2011-09-20

申请号：US11874767

申请日：2007-10-18

申请人： David Nguyen ,  Nan Nan ,  Jim Chin-Nan Ni ,  Frank I-Kang Yu ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： David Nguyen ,  Nan Nan ,  Jim Chin-Nan Ni ,  Frank I-Kang Yu ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： H05K5/03

CPC分类号： G06K19/07732

摘要： An extended universal serial bus (USB) storage device is described herein. According to one embodiment, an extended USB storage device includes a printed circuit board assembly (PCBA) having a flash memory device and a flash controller mounted thereon, and an extended USB connector plug coupled to the PCBA for providing a USB compatible interface between an external device and the flash memory device and the flash controller, wherein the extended USB connector plug includes a first end used to couple to the external device and a second end coupled to the flash memory device and the flash controller. The extended USB connector plug includes multiple communication interfaces. Other methods and apparatuses are also described.

摘要翻译： 本文描述了扩展通用串行总线（USB）存储设备。 根据一个实施例，扩展的USB存储设备包括具有闪存设备和安装在其上的闪存控制器的印刷电路板组件（PCBA），以及耦合到PCBA的扩展USB连接器插头，用于在外部 设备和闪存设备和闪存控制器，其中扩展的USB连接器插头包括用于耦合到外部设备的第一端和耦合到闪存设备和闪存控制器的第二端。 扩展的USB连接器插头包括多个通信接口。 还描述了其它方法和装置。

公开(公告)号：US20110213921A1

公开(公告)日：2011-09-01

申请号：US13104257

申请日：2011-05-10

申请人： Frank Yu ,  Charles C. Lee ,  Abraham C. Ma

发明人： Frank Yu ,  Charles C. Lee ,  Abraham C. Ma

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F3/061 ,  G06F3/0659 ,  G06F3/0688 ,  G06F12/0607 ,  G06F2212/7208 ,  G11C13/0004

摘要： A flash module has raw-NAND flash memory chips accessed over a physical-block address (PBA) bus by a NVM controller. The NVM controller is on the flash module or on a system board for a solid-state disk (SSD). The NVM controller converts logical block addresses (LBA) to physical block addresses (PBA). Data striping and interleaving among multiple channels of the flash modules is controlled at a high level by a smart storage transaction manager, while further interleaving and remapping within a channel may be performed by the NVM controllers. A SDRAM buffer is used by a smart storage switch to cache host data before writing to flash memory. A Q-R pointer table stores quotients and remainders of division of the host address. The remainder points to a location of the host data in the SDRAM. A command queue stores Q, R for host commands.

摘要翻译： 闪存模块具有通过NVM控制器通过物理块地址（PBA）总线访问的原始NAND闪存芯片。 NVM控制器位于闪存模块或固态硬盘（SSD）的系统板上。 NVM控制器将逻辑块地址（LBA）转换为物理块地址（PBA）。 闪存模块的多个通道之间的数据条带化和交织由智能存储事务管理器控制在高电平，而在信道内的进一步的交织和重新映射可由NVM控制器执行。 智能存储交换机使用SDRAM缓冲区，在写入闪存之前缓存主机数据。 Q-R指针表存储主机地址的商和余数。 剩余部分指向SDRAM中主机数据的位置。 命令队列存储主机命令的Q，R。