公开(公告)号：US07561223B2

公开(公告)日：2009-07-14

申请号：US11078245

申请日：2005-03-09

Applicant: Hung-Jen Chu ,  Hui-Chung Shen

Inventor： Hung-Jen Chu ,  Hui-Chung Shen

IPC: G02F1/1333

CPC classification number: H01L27/1288 ,  H01L27/1214

Abstract: A resist region covering the gate terminal and lead and between a passivation layer and a gate insulating layer is used to protect the gate terminal and lead. The resist region is located at a scribing line on margin of the color filter substrate of a panel, thereby the resist region can protect the passivation layer and the gate insulating layer from cracking, and the gate terminal and the lead from corrosion after a portion of the color filter substrate is removed along the scribing line.

Abstract translation: 使用覆盖栅极端子和引线以及钝化层和栅极绝缘层之间的抗蚀剂区域来保护栅极端子和引线。 抗蚀剂区域位于面板的滤色器基板的边缘上的划痕线上，由此抗蚀剂区域可以保护钝化层和栅极绝缘层免受开裂，并且栅极端子和引线在一部分 彩色滤光片基板沿划刻线移除。

公开(公告)号：US07218261B2

公开(公告)日：2007-05-15

申请号：US11306638

申请日：2006-01-05

Applicant: Jin-Sheng Gong ,  Yu-Pin Kuo ,  Yu-Pin Chou ,  Hung-Jen Chu

Inventor： Jin-Sheng Gong ,  Yu-Pin Kuo ,  Yu-Pin Chou ,  Hung-Jen Chu

IPC: H03M1/00

CPC classification number: H03M1/1245

Abstract: A method of adjusting a sampling condition to generate a sampling clock in an analog to digital converter includes performing an analog to digital conversion on an analog input signal to thereby produce a digital sampled signal having a plurality of samples; calculating a difference value between two adjacent samples in the digital sampled signal; comparing the difference value with a threshold; adding the difference value into a sum of differences value if the difference value is greater than the threshold; and generating the sampling clock for the analog to digital converter according to the sum of differences value.

Abstract translation: 一种调整采样条件以在模数转换器中产生采样时钟的方法包括对模拟输入信号执行模数转换，从而产生具有多个采样的数字采样信号; 计算数字采样信号中两个相邻采样之间的差值; 将差值与阈值进行比较; 如果所述差值大于所述阈值，则将所述差值加到差值的和中; 并根据差值的和生成模数转换器的采样时钟。

公开(公告)号：US07006178B2

公开(公告)日：2006-02-28

申请号：US10707416

申请日：2003-12-12

Applicant: Yu-Chi Lee ,  Po-Hsiu Shih ,  Hong-Tian Yu ,  Hung-Jen Chu

Inventor： Yu-Chi Lee ,  Po-Hsiu Shih ,  Hong-Tian Yu ,  Hung-Jen Chu

IPC: G02F1/13333 ,  G02F1/1339 ,  G02F1/13

CPC classification number: G02F1/1339 ,  G02F1/133512 ,  G02F2001/13415

Abstract: A one drop fill (ODF) liquid crystal display panel has a CF substrate, a TFT substrate, and a liquid crystal layer positioned between the CF substrate and the TFT substrate. The TFT substrate further has a pixel array region positioned in the center part of the TFT substrate, a sealant region position in the periphery region of the TFT substrate, a light-shielding pattern positioned on the sealant region, and a sealant pattern positioned corresponding to the sealant region between the CF substrate and the TFT substrate for assembling the two substrates.

Abstract translation: 一滴填充（ODF）液晶显示面板具有CF基板，TFT基板和位于CF基板和TFT基板之间的液晶层。 TFT基板还具有位于TFT基板的中心部分的像素阵列区域，TFT基板的周边区域中的密封剂区域位置，位于密封剂区域上的遮光图案以及对应于 用于组装两个基板的CF基板和TFT基板之间的密封剂区域。

公开(公告)号：US20060001790A1

公开(公告)日：2006-01-05

申请号：US11161021

申请日：2005-07-20

Applicant: Hung-Jen Chu ,  Chien-Kuo He ,  Meng-Feng Hung

Inventor： Hung-Jen Chu ,  Chien-Kuo He ,  Meng-Feng Hung

IPC: G02F1/136

CPC classification number: G02F1/136286 ,  G02F1/136209 ,  G02F2001/136231

Abstract: A liquid crystal display device comprising a first substrate, a second substrate, a liquid crystal layer and a shading film is provided. The first substrate includes a display region and a non-display region. The liquid crystal layer is sandwiched between the first substrate and the second substrate. The shading film is located between the first substrate and the liquid crystal layer covering the non-display region. With the shading film covering the entire non-display region, the problem of light leakage from the edge of the display device is resolved.

Abstract translation: 提供了包括第一基板，第二基板，液晶层和遮光膜的液晶显示装置。 第一基板包括显示区域和非显示区域。 液晶层夹在第一基板和第二基板之间。 遮光膜位于第一基板和覆盖非显示区域的液晶层之间。 通过遮光膜覆盖整个非显示区域，解决了来自显示装置的边缘的光泄漏的问题。

公开(公告)号：US20050052606A1

公开(公告)日：2005-03-10

申请号：US10707416

申请日：2003-12-12

Applicant: Yu-Chi Lee ,  Po-Hsiu Shih ,  Hong-Tian Yu ,  Hung-Jen Chu

Inventor： Yu-Chi Lee ,  Po-Hsiu Shih ,  Hong-Tian Yu ,  Hung-Jen Chu

IPC: G02F1/1335 ,  G02F1/1339

CPC classification number: G02F1/1339 ,  G02F1/133512 ,  G02F2001/13415

Abstract: A one drop fill (ODF) liquid crystal display panel has a CF substrate, a TFT substrate, and a liquid crystal layer positioned between the CF substrate and the TFT substrate. The TFT substrate further has a pixel array region positioned in the center part of the TFT substrate, a sealant region position in the periphery region of the TFT substrate, a light-shielding pattern positioned on the sealant region, and a sealant pattern positioned corresponding to the sealant region between the CF substrate and the TFT substrate for assembling the two substrates.

Abstract translation: 一滴填充（ODF）液晶显示面板具有CF基板，TFT基板和位于CF基板和TFT基板之间的液晶层。 TFT基板还具有位于TFT基板的中心部分的像素阵列区域，TFT基板的周边区域中的密封剂区域位置，位于密封剂区域上的遮光图案以及对应于 用于组装两个基板的CF基板和TFT基板之间的密封剂区域。

公开(公告)号：US20100253875A1

公开(公告)日：2010-10-07

申请号：US12654466

申请日：2009-12-22

Applicant: Cheng-Chung Hu ,  Hung-Jen Chu ,  Long-Cai Jhuo

Inventor： Cheng-Chung Hu ,  Hung-Jen Chu ,  Long-Cai Jhuo

IPC: G02F1/1333

CPC classification number: G06F1/1609

Abstract: A position tuning structure is disclosed, which comprises a holding tube having a side hole extending through the wall of the holding tube; a nut locating in the holding tube and connecting to the side hole; a tuning element threadedly engaged in the nut; an elastic rod locating in the holding tube and pushed by the tuning element; a supporting element locating in the holding tube and pushed by the elastic rod; and an elastic element locating in the holding tube and connecting to the supporting element. Also, an adjustable optical film device comprising the above position tuning structure is disclosed.

Abstract translation: 公开了一种位置调谐结构，其包括具有延伸穿过保持管的壁的侧孔的保持管; 一个位于保持管中并连接到侧孔的螺母; 螺纹接合在螺母中的调谐元件; 弹性杆，其位于保持管中并被调谐元件推动; 支撑元件定位在保持管中并被弹性杆推动; 以及弹性元件，其定位在所述保持管中并连接到所述支撑元件。 此外，公开了一种包括上述位置调谐结构的可调光学膜装置。

公开(公告)号：US07372298B2

公开(公告)日：2008-05-13

申请号：US11277361

申请日：2006-03-24

Applicant: Hung-Jen Chu ,  Chao-Hsin Lu ,  Shiu-Rong Tong ,  Yu-Pin Chou

Inventor： Hung-Jen Chu ,  Chao-Hsin Lu ,  Shiu-Rong Tong ,  Yu-Pin Chou

IPC: H03K19/173 ,  H03K19/00

CPC classification number: G06F1/22 ,  H03K19/1732

Abstract: A chip with an adjustable pinout function is disclosed. The chip includes a first pinout, a second pinout, a logic circuit, and a selecting circuit. The logic circuit includes a first port and a second port. The selecting circuit, which is coupled to the logic circuit, the first pinout, and the second pinout, controls the first pinout to be coupled to the first port or the second port, and controls the second pinout to be coupled to the first port or the second port.

Abstract translation: 公开了一种具有可调节引脚排列功能的芯片。 芯片包括第一引脚，第二引脚，逻辑电路和选择电路。 逻辑电路包括第一端口和第二端口。 耦合到逻辑电路，第一引脚排列和第二引脚分布的选择电路控制第一引脚被耦合到第一端口或第二端口，并且控制第二引脚分布以耦合到第一端口或 第二个港口。

公开(公告)号：US07348609B2

公开(公告)日：2008-03-25

申请号：US11295436

申请日：2005-12-07

Applicant: Hung-Jen Chu ,  Nei-Jen Hsiao ,  Hui-Chung Shen ,  Meng-Chi Liou

Inventor： Hung-Jen Chu ,  Nei-Jen Hsiao ,  Hui-Chung Shen ,  Meng-Chi Liou

IPC: H01L31/0328

CPC classification number: H01L29/66742 ,  H01L29/66765

Abstract: The thin film transistor has a non-transparent structure besides and insulated with the gate. Hence, the light transmitted from the substrate is blocked and the light current induced in the thin film transistor is negligible. The method uses a mask with a slit pattern to form a non-uniform photoresist. Hence, the mask could be used to pattern two conductor layers for forming source/drain/channel.

Abstract translation: 薄膜晶体管除了栅极之外还具有非透明结构并与栅绝缘。 因此，从衬底传输的光被阻挡，并且在薄膜晶体管中感应的光电流可忽略。 该方法使用具有狭缝图案的掩模以形成不均匀的光致抗蚀剂。 因此，掩模可用于图案化两个导体层以形成源极/漏极/沟道。

公开(公告)号：US20060081855A1

公开(公告)日：2006-04-20

申请号：US11295436

申请日：2005-12-07

Applicant: Hung-Jen Chu ,  Nei-Jen Hsiao ,  Hui-Chung Shen ,  Meng-Chi Liou

Inventor： Hung-Jen Chu ,  Nei-Jen Hsiao ,  Hui-Chung Shen ,  Meng-Chi Liou

IPC: H01L29/04

CPC classification number: H01L29/66742 ,  H01L29/66765

Abstract: The thin film transistor has a non-transparent structure besides and insulated with the gate. Hence, the light transmitted from the substrate is blocked and the light current induced in the thin film transistor is negligible. The method uses a mask with a slit pattern to form a non-uniform photoresist. Hence, the mask could be used to pattern two conductor layers for forming source/drain/channel.

Abstract translation: 薄膜晶体管除了栅极之外还具有非透明结构并与栅绝缘。 因此，从衬底传输的光被阻挡，并且在薄膜晶体管中感应的光电流可忽略。 该方法使用具有狭缝图案的掩模以形成不均匀的光致抗蚀剂。 因此，掩模可用于图案化两个导体层以形成源极/漏极/沟道。

公开(公告)号：US06842215B2

公开(公告)日：2005-01-11

申请号：US10347798

申请日：2003-01-22

Applicant: Hung-Jen Chu ,  Ming-Hsuan Chang ,  Chien-Kuo Ho

Inventor： Hung-Jen Chu ,  Ming-Hsuan Chang ,  Chien-Kuo Ho

IPC: G02F1/1345 ,  G09F9/00 ,  G09F9/30 ,  G09F9/35

CPC classification number: G02F1/1345 ,  G02F2201/07

Abstract: A panel for a flat panel display device is disclosed, which includes a substrate having signal wires and terminals respectively connected to the signal wires, each terminal having first, second and third conducting layer, an insulating layer, a protection layer, contact holes connected between the first conducting layer and the third conducting layer, and contact holes connected between the second conducting layer and the third conducting layer, the insulating layer being sandwiched in between the second conducting layer and the substrate, the first conducting layer being sandwiched in between the protection layer and the insulating layer, the protection layer being sandwiched in between the first conducting layer and the third conducting layer or the second conducting layer and the third conducting layer, the first conducting layer being isolated from the second conducting layer.

Abstract translation: 公开了一种用于平板显示装置的面板，其包括具有分别连接到信号线的信号线和端子的基板，每个端子具有第一，第二和第三导电层，绝缘层，保护层，连接在 所述第一导电层和所述第三导电层以及连接在所述第二导电层和所述第三导电层之间的接触孔，所述绝缘层夹在所述第二导电层和所述基板之间，所述第一导电层夹在所述第二导电层和所述第三导电层之间， 层和绝缘层，保护层夹在第一导电层和第三导电层或第二导电层和第三导电层之间，第一导电层与第二导电层隔离。