公开(公告)号：US20050140005A1

公开(公告)日：2005-06-30

申请号：US11023354

申请日：2004-12-29

Applicant: Ya-Ling Huang ,  Tzu-Bin Lin ,  Hung-Ta Hsu

Inventor： Ya-Ling Huang ,  Tzu-Bin Lin ,  Hung-Ta Hsu

IPC: H01L23/31 ,  H01L21/44 ,  H01L23/52

CPC classification number: H01L23/3128 ,  H01L23/3107 ,  H01L23/3135 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2225/06568 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/00

Abstract: A chip package structure is disclosed. The chip package structure includes an inner molding compound with a low modulus covering the chip and an outer molding compound covering the inner molding compound. The outer molding compound has a modulus larger than then modulus of the inner molding compound.

Abstract translation: 公开了一种芯片封装结构。 芯片封装结构包括覆盖芯片的低模量的内部模塑料和覆盖内部模塑料的外部模塑料。 外部模塑料的模量比内部模塑料的模量大。

公开(公告)号：US20050029672A1

公开(公告)日：2005-02-10

申请号：US10899870

申请日：2004-07-27

Applicant: Hung-Ta Hsu ,  Tzu-Bin Lin ,  Ya-Ling Huang

Inventor： Hung-Ta Hsu ,  Tzu-Bin Lin ,  Ya-Ling Huang

IPC: H01L23/13 ,  H01L23/36 ,  H01L23/42 ,  H01L23/02

CPC classification number: H01L23/42 ,  H01L23/13 ,  H01L23/36 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/16195

Abstract: A flip chip package structure includes a substrate, a chip, solder bumps, a heat sink, a thermal interface material (TIM), and solder balls. The substrate has an upper surface and a lower surface and further has a receiving area. The receiving area has a bottom in the substrate and an opening formed on the upper surface. Several solder bumps are disposed in the receiving area. The chip is disposed on the upper surface of the substrate, and covers the opening. The front surface of the chip is electrically coupled to the bottom via the solder bumps. The heat sink is attached to the upper surface of the substrate and the back surface of the chip through the adhesion of TIM. Several solder balls are disposed on the lower surface of the substrate.

Abstract translation: 倒装芯片封装结构包括衬底，芯片，焊料凸块，散热器，热界面材料（TIM）和焊球。 基板具有上表面和下表面，并且还具有接收区域。 接收区域在基板中具有底部，并且在上表面上形成开口。 在接收区域中设置几个焊料凸块。 芯片设置在基板的上表面上并覆盖开口。 芯片的前表面通过焊料凸块电耦合到底部。 散热片通过粘附TIM连接到基板的上表面和芯片的背面。 几个焊球设置在基板的下表面上。

公开(公告)号：US20060121644A1

公开(公告)日：2006-06-08

申请号：US11293992

申请日：2005-12-05

Applicant: Hung-Ta Hsu ,  Tzu-Bin Lin ,  Ya-Ling Huang ,  Ya-Yu Hsieh

Inventor： Hung-Ta Hsu ,  Tzu-Bin Lin ,  Ya-Ling Huang ,  Ya-Yu Hsieh

IPC: H01L21/50

CPC classification number: H01L24/83 ,  H01L24/27 ,  H01L24/29 ,  H01L24/743 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83855 ,  H01L2224/83856 ,  H01L2924/01005 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/07025 ,  H01L2924/00

Abstract: A method for die attaching is disclosed. At first, at least one die and a die-attach preform are separately provided. The die-attach preform is picked and placed upon a die carrier. Then, the die is picked and placed upon the die-attach preform. The die and the die carrier are heated and clipped, so that the die-attach preform can adhere the die and the die carrier at the same time.

公开(公告)号：US07005749B2

公开(公告)日：2006-02-28

申请号：US10899870

申请日：2004-07-27

Applicant: Hung-Ta Hsu ,  Tzu-Bin Lin ,  Ya-Ling Huang

Inventor： Hung-Ta Hsu ,  Tzu-Bin Lin ,  Ya-Ling Huang

IPC: H01L23/12

CPC classification number: H01L23/42 ,  H01L23/13 ,  H01L23/36 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/16195

Abstract: A flip chip package structure includes a substrate, a chip, solder bumps, a heat sink, a thermal interface material (TIM), and solder balls. The substrate has an upper surface and a lower surface and further has a receiving area. The receiving area has a bottom in the substrate and an opening formed on the upper surface. Several solder bumps are disposed in the receiving area. The chip is disposed on the upper surface of the substrate, and covers the opening. The front surface of the chip is electrically coupled to the bottom via the solder bumps. The heat sink is attached to the upper surface of the substrate and the back surface of the chip through the adhesion of TIM. Several solder balls are disposed on the lower surface of the substrate.

Abstract translation: 倒装芯片封装结构包括衬底，芯片，焊料凸块，散热器，热界面材料（TIM）和焊球。 基板具有上表面和下表面，并且还具有接收区域。 接收区域在基板中具有底部，并且在上表面上形成开口。 在接收区域中设置几个焊料凸块。 芯片设置在基板的上表面上并覆盖开口。 芯片的前表面通过焊料凸块电耦合到底部。 散热片通过粘附TIM连接到基板的上表面和芯片的背面。 几个焊球设置在基板的下表面上。

公开(公告)号：US20050139974A1

公开(公告)日：2005-06-30

申请号：US11023536

申请日：2004-12-29

Applicant: Ya-Ling Huang ,  Hung-Ta Hsu ,  Tzu-Bin Lin

Inventor： Ya-Ling Huang ,  Hung-Ta Hsu ,  Tzu-Bin Lin

IPC: H01L23/02 ,  H01L23/28 ,  H01L23/31 ,  H01L23/433

CPC classification number: H01L23/4334 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32145 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/1532 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A chip package structure is disclosed. The chip package structure includes an inner molding compound with a low modulus and a heat sink covering the chip. An outer molding compound having a modulus larger than the modulus of the inner molding compound can be applied around the heat sink.

Abstract translation: 公开了一种芯片封装结构。 芯片封装结构包括具有低模量的内部模塑料和覆盖芯片的散热器。 可以在散热器周围施加具有大于内部模塑料的模量的模量的外部模塑料。

公开(公告)号：US07498202B2

公开(公告)日：2009-03-03

申请号：US11293992

申请日：2005-12-05

Applicant: Hung-Ta Hsu ,  Tzu-Bin Lin ,  Ya-Ling Huang ,  Ya-Yu Hsieh

Inventor： Hung-Ta Hsu ,  Tzu-Bin Lin ,  Ya-Ling Huang ,  Ya-Yu Hsieh

IPC: H01L21/00

CPC classification number: H01L24/83 ,  H01L24/27 ,  H01L24/29 ,  H01L24/743 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83855 ,  H01L2224/83856 ,  H01L2924/01005 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/07025 ,  H01L2924/00

Abstract: A method for die attaching is disclosed. At first, at least one die and a die-attach preform are separately provided. The die-attach preform is picked and placed upon a die carrier. Then, the die is picked and placed upon the die-attach preform. The die and the die carrier are heated and clipped, so that the die-attach preform can adhere the die and the die carrier at the same time.

Abstract translation: 公开了一种贴片方法。 首先，分别提供至少一个模具和模具附接预成型件。 将芯片附着的预型件拾取并放置在模具载体上。 然后，将模具取下并放置在芯片附着的预制件上。 模具和模具载体被加热和夹紧，使得模具附接预成型件可以同时粘附模具和模具载体。

公开(公告)号：US20070045863A1

公开(公告)日：2007-03-01

申请号：US11306099

申请日：2005-12-16

Applicant: Ya-Yu Hsieh ,  Wei-Chung Wang ,  Tzu-Bin Lin

Inventor： Ya-Yu Hsieh ,  Wei-Chung Wang ,  Tzu-Bin Lin

IPC: H01L23/52

CPC classification number: H01L24/13 ,  H01L24/11 ,  H01L2224/13099 ,  H01L2224/83894 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01024 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014

Abstract: A packaging process including the following steps is provided. First, a first substrate and a second substrate are provided. The first substrate has first contacts, and the second substrate has second contacts. Next, the first substrate is placed on the second substrate, such that the first contacts are aligned with the second contacts. Then, the first substrate and the second substrate are submerged in a solution having BDMT. After that, the first substrate and the second substrate are removed from the solution, such that self-assembly mono-layers are formed between the first substrate and the second substrate, to electrically connect the first substrate and the second substrate. A package structure formed according to the above process is also provided.

Abstract translation: 提供包括以下步骤的包装过程。 首先，提供第一基板和第二基板。 第一基板具有第一触点，第二基板具有第二触点。 接下来，将第一基板放置在第二基板上，使得第一触点与第二触点对齐。 然后，将第一基板和第二基板浸没在具有BDMT的溶液中。 之后，从溶液中除去第一衬底和第二衬底，使得在第一衬底和第二衬底之间形成自组装单层，以电连接第一衬底和第二衬底。 还提供了根据上述方法形成的封装结构。

公开(公告)号：US20050139994A1

公开(公告)日：2005-06-30

申请号：US11023353

申请日：2004-12-29

Applicant: Hung-Ta Hsu ,  Tzu-Bin Lin ,  Ya-Ling Huang

Inventor： Hung-Ta Hsu ,  Tzu-Bin Lin ,  Ya-Ling Huang

IPC: H01L23/31 ,  H01L23/36 ,  H01L23/373 ,  H01L23/34 ,  H01L21/48

CPC classification number: H01L23/3737 ,  H01L23/3128 ,  H01L23/36 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/451 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package includes a die attached to a substrate. Multitudes of conductive structures are conductively connected the die and the substrate. One molding compound encapsulates the die, and thermal interface material is on the molding compound. Next, a heat sink is on the thermal interface material. The mold compound material performs a coefficient of thermal expansion smaller than the heat sink so as to prevent the die or substrate from the damages of internal stresses.

Abstract translation: 半导体封装包括附接到衬底的管芯。 多个导电结构导电地连接管芯和衬底。 一种模塑料封装模具，热界面材料在模塑料上。 接下来，散热器在热界面材料上。 模具复合材料的热膨胀系数小于散热器，以防止模具或衬底损坏内部应力。