公开(公告)号：US10355117B2

公开(公告)日：2019-07-16

申请号：US15421128

申请日：2017-01-31

Applicant: ABB Schweiz AG

Inventor： Marco Bellini ,  Jan Vobecky

IPC: H01L29/74 ,  H01L29/08 ,  H01L29/66

Abstract: A thyristor is disclosed with a plurality of emitter shorts at points in the cathode region. The points define a Delaunay triangulation with a plurality of triangles. For a first subset of triangles a coefficient of variation of the values qT,l with l∈S1 is smaller than 0.1, and/or an absolute value of a skewedness of the geometric quantities qT,l with l∈S1 is smaller than 5, and/or a Kurtosis of the geometric quantities qT,l with l∈S1 is smaller than 20. For a second subset of triangles, a quotient of a standard deviation of the quantities qT,m with m∈S2 and a mean squared value of the geometric quantity qT,l with l∈S1 is less than 1, and/or a quotient of a number of triangles in the second subset and a number of triangles in the first subset is less than 1.0×10−2.

公开(公告)号：US20180090572A1

公开(公告)日：2018-03-29

申请号：US15826427

申请日：2017-11-29

Applicant: ABB Schweiz AG

Inventor： Marco Bellini ,  Jan Vobecky ,  Paul Commin

IPC: H01L29/10 ,  H01L29/08 ,  H01L29/06 ,  H01L29/423 ,  H01L29/74

CPC classification number: H01L29/102 ,  H01L29/0692 ,  H01L29/0839 ,  H01L29/42308 ,  H01L29/74 ,  H01L29/7404 ,  H01L29/7428 ,  H01L29/7432

Abstract: There is provided a thyristor having emitter shorts, wherein in an orthogonal projection onto a plane parallel to a first main side, a contact area covered by an electrical contact of a first electrode layer with a first emitter layer and the emitter shorts includes areas in the shape of lanes, in which an area coverage of the emitter shorts is less than the area coverage of emitter shorts in the remaining area of the contact area, wherein the area coverage of the emitter shorts in a specific area is the area covered by the emitter shorts in that specific area relative to the specific area. The thyristor of the invention exhibits a fast turn-on process even without complicated amplifying gale structure.

公开(公告)号：US10170557B2

公开(公告)日：2019-01-01

申请号：US15826427

申请日：2017-11-29

Applicant: ABB Schweiz AG

Inventor： Marco Bellini ,  Jan Vobecky ,  Paul Commin

IPC: H01L29/10 ,  H01L29/74 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423

Abstract: There is provided a thyristor having emitter shorts, wherein in an orthogonal projection onto a plane parallel to a first main side, a contact area covered by an electrical contact of a first electrode layer with a first emitter layer and the emitter shorts includes areas in the shape of lanes, in which an area coverage of the emitter shorts is less than the area coverage of emitter shorts in the remaining area of the contact area, wherein the area coverage of the emitter shorts in a specific area is the area covered by the emitter shorts in that specific area relative to the specific area. The thyristor of the invention exhibits a fast turn-on process even without complicated amplifying gate structure.

公开(公告)号：US20190288124A1

公开(公告)日：2019-09-19

申请号：US16420803

申请日：2019-05-23

Applicant: ABB Schweiz AG

Inventor： Friedhelm Bauer ,  Umamaheswara Vemulapati ,  Marco Bellini

IPC: H01L29/861 ,  H01L29/868 ,  H01L29/06

Abstract: In a power semiconductor device of the application a total number n of floating field rings (10_1 to 10_n) formed in a termination area is at least 10. For any integer i in a range from i=2 to i=n, a ring-to-ring separation di,1−i between an i-th floating field ring and a directly adjacent (i−1)-th floating field ring, when counting the floating field rings (10_1 to 10_n) along a straight line starting from a main pn-junction and extending in a lateral direction away from the main pn-junction, is given by the following formula: di,i−1=d1,0+Σj=1j=i−1 Δj for i=2 to n, wherein d1,0 is a distance between the innermost floating field ring (10_1) closest to the main pn-junction and the main pn-junction, and wherein: Δzone1−0.05·Δzone2

公开(公告)号：US20170243966A1

公开(公告)日：2017-08-24

申请号：US15421128

申请日：2017-01-31

Applicant: ABB Schweiz AG

Inventor： Marco Bellini ,  Jan Vobecky

IPC: H01L29/74 ,  H01L29/66 ,  H01L29/08

CPC classification number: H01L29/7428 ,  H01L29/0839 ,  H01L29/66363 ,  H01L29/74

Abstract: A thyristor, in particular a phase control thyristor, is disclosed with comprises: a) a semiconductor slab, in particular a semiconductor wave or die, in which a thyristor structure is formed, b) a cathode metallization formed on a cathode region on a cathode side surface of the semiconductor slab, c) a gate metallization formed on a gate region on the cathode side surface of the semiconductor slab, d) a plurality of N discrete emitter shorts, arranged at points Pi in the cathode region, said points having point locations xi, with iε{1; . . . ; N}, e) the points Pl defining a Delaunay triangulation comprising a plurality of triangles Tj with jε{1; . . . ; M), wherein f) for a first subset of triangles Tl with lεS1⊂{1; . . . ; M), g) with each triangle Tl being characterized by a geometric quantity having values qT,l with lεS1⊂{1; . . . ; M), said geometric quantity having a mean value μ, and i) a coefficient of variation of the values qT,l with lεS1 is smaller than 0.1, preferably smaller than 0.05, and/or ii) an absolute value of a skewedness of the geometric quantities qT,l with lεS1 is smaller than 5, preferably smaller than 1, and/or iii) a Kurtosis of the geometric quantities qT,l with lεS1 is smaller than 20, preferably smaller than 10, and h) for a second subset of triangles Tm with mεS2⊂S1, for which the respective geometric quantities qT,m with mεS2 deviate from the mean value by more than a predetermined amount, in particular by more than 30%, (1) a quotient of a standard deviation of the quantities qT,m with mεS2 and a mean squared value of the geometric quantity qT,l with lεS1 is less than 1 or less than 0.1, and/or a quotient of a number of triangles in the second subset and a number of triangles in the first subset is less than

公开(公告)号：US10566463B2

公开(公告)日：2020-02-18

申请号：US16420803

申请日：2019-05-23

Applicant: ABB Schweiz AG

Inventor： Friedhelm Bauer ,  Umamaheswara Vemulapati ,  Marco Bellini

IPC: H01L29/06 ,  H01L29/861 ,  H01L29/868

Abstract: In a power semiconductor device of the application a total number n of floating field rings (10_1 to 10_n) formed in a termination area is at least 10. For any integer i in a range from i=2 to i=n, a ring-to-ring separation di,i−i between an i-th floating field ring and a directly adjacent (i−1)-th floating field ring, when counting the floating field rings (10_1 to 10_n) along a straight line starting from a main pn-junction and extending in a lateral direction away from the main pn-junction, is given by the following formula: di,i−1=d1,0+Σj=1j=i−1 Δj for i=2 to n, wherein d1,0 is a distance between the innermost floating field ring (10_1) closest to the main pn-junction and the main pn-junction, and wherein: Δzone1−0.05·Δzone2 0.1 μm, and −Δzone2/2

公开(公告)号：US20200006496A1

公开(公告)日：2020-01-02

申请号：US16558935

申请日：2019-09-03

Applicant: ABB Schweiz AG

Inventor： Friedhelm Bauer ,  Lars Knoll ,  Marco Bellini ,  Renato Minamisawa ,  Umamaheswara Vemulapati

IPC: H01L29/16 ,  H01L29/06 ,  H01L29/78 ,  H01L29/66

Abstract: A power semiconductor device includes a semiconductor wafer having a first main side surface and a second main side surface. The semiconductor wafer includes a first semiconductor layer having a first conductivity type and a plurality of columnar or plate-shaped first semiconductor regions extending in the first semiconductor layer between the first main side surface and the second main side surface in a vertical direction perpendicular to the first main side surface and the second main side surface. The first semiconductor regions have a second conductivity type, which is different from the first conductivity type. Therein, the first semiconductor is a layer of hexagonal silicon carbide. The first semiconductor regions are regions of 3C polytype silicon carbide.

公开(公告)号：US20180040526A1

公开(公告)日：2018-02-08

申请号：US15666858

申请日：2017-08-02

Applicant: ABB Schweiz AG ,  Audi AG

Inventor： Jürgen Schuderer ,  Umamaheswara Vemulapati ,  Marco Bellini ,  Jan Vobecky

IPC: H01L23/14 ,  H01L25/18 ,  H01L23/538 ,  H01L29/06 ,  H01L23/535

CPC classification number: H01L23/147 ,  H01L23/36 ,  H01L23/3736 ,  H01L23/535 ,  H01L23/5386 ,  H01L23/62 ,  H01L25/072 ,  H01L25/18 ,  H01L29/0634 ,  H01L29/0646 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2924/00014 ,  H01L2924/10252 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1203 ,  H01L2924/1301 ,  H01L2924/1304 ,  H01L2224/32225 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: A power semiconductor module including at least one power semiconductor chip providing a power electronics switch; and a semiconductor wafer, to which the at least one power semiconductor chip is bonded; wherein the semiconductor wafer is doped, such that it includes a field blocking region and an electrically conducting region on the field blocking region, to which electrically conducting region the at least one power semiconductor chip is bonded.