公开(公告)号：US20190273493A1

公开(公告)日：2019-09-05

申请号：US16411716

申请日：2019-05-14

Applicant: ABB Schweiz AG

Inventor： Umamaheswara Vemulapati ,  Ulrich Schlapbach ,  Munaf Rahimo

IPC: H03K17/567 ,  H03K17/687

Abstract: A semiconductor module comprises reverse conducting IGBT connected in parallel with a wide bandgap MOSFET, wherein each of the reverse conducting IGBT and the wide bandgap MOSFET comprises an internal anti-parallel diode. A method for operating a semiconductor module with the method including the steps of: determining a reverse conduction start time, in which the semiconductor module starts to conduct a current in a reverse direction, which reverse direction is a conducting direction of the internal anti-parallel diodes; applying a positive gate signal to the wide bandgap MOSFET after the reverse conduction start time; determining a reverse conduction end time based on the reverse conduction start time, in which the semiconductor module ends to conduct a current in the reverse direction; and applying a reduced gate signal to the wide bandgap MOSFET a blanking time interval before the reverse conduction end time, the reduced gate signal being adapted for switching the wide bandgap MOSFET

公开(公告)号：US10566463B2

公开(公告)日：2020-02-18

申请号：US16420803

申请日：2019-05-23

Applicant: ABB Schweiz AG

Inventor： Friedhelm Bauer ,  Umamaheswara Vemulapati ,  Marco Bellini

IPC: H01L29/06 ,  H01L29/861 ,  H01L29/868

Abstract: In a power semiconductor device of the application a total number n of floating field rings (10_1 to 10_n) formed in a termination area is at least 10. For any integer i in a range from i=2 to i=n, a ring-to-ring separation di,i−i between an i-th floating field ring and a directly adjacent (i−1)-th floating field ring, when counting the floating field rings (10_1 to 10_n) along a straight line starting from a main pn-junction and extending in a lateral direction away from the main pn-junction, is given by the following formula: di,i−1=d1,0+Σj=1j=i−1 Δj for i=2 to n, wherein d1,0 is a distance between the innermost floating field ring (10_1) closest to the main pn-junction and the main pn-junction, and wherein: Δzone1−0.05·Δzone2 0.1 μm, and −Δzone2/2

公开(公告)号：US20200006496A1

公开(公告)日：2020-01-02

申请号：US16558935

申请日：2019-09-03

Applicant: ABB Schweiz AG

Inventor： Friedhelm Bauer ,  Lars Knoll ,  Marco Bellini ,  Renato Minamisawa ,  Umamaheswara Vemulapati

IPC: H01L29/16 ,  H01L29/06 ,  H01L29/78 ,  H01L29/66

Abstract: A power semiconductor device includes a semiconductor wafer having a first main side surface and a second main side surface. The semiconductor wafer includes a first semiconductor layer having a first conductivity type and a plurality of columnar or plate-shaped first semiconductor regions extending in the first semiconductor layer between the first main side surface and the second main side surface in a vertical direction perpendicular to the first main side surface and the second main side surface. The first semiconductor regions have a second conductivity type, which is different from the first conductivity type. Therein, the first semiconductor is a layer of hexagonal silicon carbide. The first semiconductor regions are regions of 3C polytype silicon carbide.

公开(公告)号：US20180040526A1

公开(公告)日：2018-02-08

申请号：US15666858

申请日：2017-08-02

Applicant: ABB Schweiz AG ,  Audi AG

Inventor： Jürgen Schuderer ,  Umamaheswara Vemulapati ,  Marco Bellini ,  Jan Vobecky

IPC: H01L23/14 ,  H01L25/18 ,  H01L23/538 ,  H01L29/06 ,  H01L23/535

CPC classification number: H01L23/147 ,  H01L23/36 ,  H01L23/3736 ,  H01L23/535 ,  H01L23/5386 ,  H01L23/62 ,  H01L25/072 ,  H01L25/18 ,  H01L29/0634 ,  H01L29/0646 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2924/00014 ,  H01L2924/10252 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1203 ,  H01L2924/1301 ,  H01L2924/1304 ,  H01L2224/32225 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: A power semiconductor module including at least one power semiconductor chip providing a power electronics switch; and a semiconductor wafer, to which the at least one power semiconductor chip is bonded; wherein the semiconductor wafer is doped, such that it includes a field blocking region and an electrically conducting region on the field blocking region, to which electrically conducting region the at least one power semiconductor chip is bonded.

公开(公告)号：US10461157B2

公开(公告)日：2019-10-29

申请号：US15918581

申请日：2018-03-12

Applicant: ABB Schweiz AG

Inventor： Martin Arnold ,  Umamaheswara Vemulapati

IPC: H01L29/74 ,  H01L29/10 ,  H01L29/36 ,  H01L29/744 ,  H01L29/08 ,  H01L29/06 ,  H01L29/417 ,  H01L29/66 ,  H01L29/745

Abstract: The invention relates to a turn-off power semiconductor device comprising a plurality of thyristor cells, each thyristor cell comprising a cathode region; a base layer; a drift layer; an anode layer; a gate electrode which is arranged lateral to the cathode region in contact with the base layer; a cathode electrode; and an anode electrode. Interfaces between the cathode regions and the cathode electrodes as well as interfaces between the base layers and the gate electrodes of the plurality of thyristor cells are flat and coplanar. In addition, the base layer includes a gate well region extending from its contact with the gate electrode to a depth, which is at least half of the depth of the cathode region, wherein, for any depth, the minimum doping concentration of the gate well region at this depth is 50% above a doping concentration of the base layer between the cathode region and the gate well region at this depth and at a lateral position, which has in an orthogonal projection onto a plane parallel to the first main side a distance of 2 μm from the cathode region. The base layer includes a compensated region of the second conductivity type, the compensated region being arranged directly adjacent to the first main side and between the cathode region and the gate well region, wherein the density of first conductivity type impurities relative to the net doping concentration in the compensated region is at least 0.4.

公开(公告)号：US20190035884A1

公开(公告)日：2019-01-31

申请号：US15991240

申请日：2018-05-29

Applicant: ABB Schweiz AG

Inventor： Friedhelm Bauer ,  Umamaheswara Vemulapati

IPC: H01L29/06 ,  H01L29/16

Abstract: A high power semiconductor device with a floating field ring termination includes a wafer, wherein a plurality of floating field rings is formed in an edge termination region adjacent to a first main side surface of the wafer. At least in the termination region a drift layer, in which the floating field rings are formed, includes a surface layer and a bulk layer wherein the surface layer is formed adjacent to the first main side surface to separate the bulk layer from the first main side surface and has an average doping concentration which is less than 50% of the minimum doping concentration of the bulk layer. The drift layer includes a plurality of enhanced doping regions, wherein each one of the enhanced doping regions is in direct contact with a corresponding one of the floating field rings at least on a lateral side of this floating field ring, which faces towards the active region. The relatively low doped surface layer and the enhanced doping regions increase the electric field coupling from floating field ring to floating field ring, thus allowing an area efficient termination structure. Each enhanced doping region extends to at least the same depth as the one of the corresponding floating field ring.

公开(公告)号：US20180204913A1

公开(公告)日：2018-07-19

申请号：US15918581

申请日：2018-03-12

Applicant: ABB Schweiz AG

Inventor： Martin Arnold ,  Umamaheswara Vemulapati

IPC: H01L29/10 ,  H01L29/745 ,  H01L29/06 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66

CPC classification number: H01L29/1066 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0839 ,  H01L29/102 ,  H01L29/36 ,  H01L29/41716 ,  H01L29/66363 ,  H01L29/66393 ,  H01L29/744 ,  H01L29/745

Abstract: The invention relates to a turn-off power semiconductor device comprising a plurality of thyristor cells, each thyristor cell comprising a cathode region; a base layer; a drift layer; an anode layer; a gate electrode which is arranged lateral to the cathode region in contact with the base layer; a cathode electrode; and an anode electrode. Interfaces between the cathode regions and the cathode electrodes as well as interfaces between the base layers and the gate electrodes of the plurality of thyristor cells are flat and coplanar. In addition, the base layer includes a gate well region extending from its contact with the gate electrode to a depth, which is at least half of the depth of the cathode region, wherein, for any depth, the minimum doping concentration of the gate well region at this depth is 50% above a doping concentration of the base layer between the cathode region and the gate well region at this depth and at a lateral position, which has in an orthogonal projection onto a plane parallel to the first main side a distance of 2 μm from the cathode region. The base layer includes a compensated region of the second conductivity type, the compensated region being arranged directly adjacent to the first main side and between the cathode region and the gate well region, wherein the density of first conductivity type impurities relative to the net doping concentration in the compensated region is at least 0.4.

公开(公告)号：US20190288124A1

公开(公告)日：2019-09-19

申请号：US16420803

申请日：2019-05-23

Applicant: ABB Schweiz AG

Inventor： Friedhelm Bauer ,  Umamaheswara Vemulapati ,  Marco Bellini

IPC: H01L29/861 ,  H01L29/868 ,  H01L29/06

Abstract: In a power semiconductor device of the application a total number n of floating field rings (10_1 to 10_n) formed in a termination area is at least 10. For any integer i in a range from i=2 to i=n, a ring-to-ring separation di,1−i between an i-th floating field ring and a directly adjacent (i−1)-th floating field ring, when counting the floating field rings (10_1 to 10_n) along a straight line starting from a main pn-junction and extending in a lateral direction away from the main pn-junction, is given by the following formula: di,i−1=d1,0+Σj=1j=i−1 Δj for i=2 to n, wherein d1,0 is a distance between the innermost floating field ring (10_1) closest to the main pn-junction and the main pn-junction, and wherein: Δzone1−0.05·Δzone2

公开(公告)号：US10026732B2

公开(公告)日：2018-07-17

申请号：US15626777

申请日：2017-06-19

Applicant: ABB Schweiz AG

Inventor： Munaf Rahimo ,  Martin Arnold ,  Umamaheswara Vemulapati

IPC: H01L29/747 ,  H01L27/08 ,  H01L29/74 ,  H01L29/06

Abstract: A bidirectional power semiconductor device with full turn-off control in both current directions and improved electrical and thermal properties is provided, the device comprises a plurality of first gate commutated thyristor (GCT) cells and a plurality of second GCT cells alternating with each other, a first base layer of each first GCT cell is separated from a neighbouring second anode layer of a neighbouring second GCT cell by a first separation region, and a second base layer of each second GCT cell is separated from a neighbouring first anode layer of a neighbouring first GCT cell by a second separation region.

公开(公告)号：US20170294435A1

公开(公告)日：2017-10-12

申请号：US15626777

申请日：2017-06-19

Applicant: ABB Schweiz AG

Inventor： Munaf Rahimo ,  Martin Arnold ,  Umamaheswara Vemulapati

IPC: H01L27/08 ,  H01L29/747 ,  H01L29/74

CPC classification number: H01L27/0817 ,  H01L27/0207 ,  H01L27/0694 ,  H01L29/0692 ,  H01L29/7404 ,  H01L29/747

Abstract: A bidirectional power semiconductor device with full turn-off control in both current directions and improved electrical and thermal properties is provided, the device comprises a plurality of first gate commutated thyristor (GCT) cells and a plurality of second GCT cells alternating with each other, a first base layer of each first GCT cell is separated from a neighbouring second anode layer of a neighbouring second GCT cell by a first separation region, and a second base layer of each second GCT cell is separated from a neighbouring first anode layer of a neighbouring first GCT cell by a second separation region.