Abstract:
A computing device reads a printed circuit board (PCB) layout file from a storage device. The PCB layout file includes arrangement information of signal lines, power lines, and power through-holes arranged on a PCB. Furthermore, the computing device sets a reference distance between a selected power through-hole and a neighboring signal line, and searches for one or more line segments of one or more signal lines where the a distance between each of the one or more line segment and the selected power through-hole is less than the reference distance.
Abstract:
A power supply device includes a power supply unit and a feedback control unit. The power supply unit is configured for generating an electric potential to be provided to a load. The feedback control unit detects the electric potential and adjusts relevant parameters of the electrical potential to achieve predetermined values. The feedback control unit includes a first feedback circuit and a second feedback circuit electrically connected in series.
Abstract:
A system for optimizing a current overload protection circuit includes an input device, a data storage device, a central processing device, and a display. The central processing device includes a storage module, a control module, and a calculation module. The storage module stores a VI application therein. The control module receives instructions from the input device and selects virtual electronic components of the current overload protection circuit from the data storage device and connection of the selected electronic components. The current overload protection circuit is completed and run in the VI application; electronic components significantly affecting the maximum protection current are labeled. The calculation module calculates normal distribution samples of the current overload protection circuit based on the labeled electronic components. The display shows whether the current overload protection circuit meets a process capability standard.
Abstract:
A printed circuit board (PCB) includes a power layer and a signal layer. A signal line is arranged on the signal layer. A power via extends through the power layer and the signal layer, and is electrically connected to the power layer and the signal layer. A number of through holes is defined in the PCB, through the power layer and the signal layer, and arranged between the signal line and the power via. The through holes are insulated from the power via. The inside wall of the power via is made of conductive material.
Abstract:
In a method for inspecting the layout of a printed circuit board (PCB), a component to be checked is determined from an electronic layout diagram of the PCB, and a power transmission line which may be serving that component is selected. The layout diagram is checked to determine whether the component is connected to the power transmission line, and further checked to determine whether more than one ground pins of the component is connected to the power transmission line. Vias that are shared by two or more ground pins of the component are determined if more than one ground pin is connected to the power transmission line. Shared vias are marked on the layout diagram.
Abstract:
A printed circuit board includes a first circuit area, a second circuit area, a plurality of connectors, and a connecting terminal. The first circuit area is electrically connected to the second circuit area via the connectors. The connecting terminal is placed on one side of the first circuit area for electrically connecting with a load. An imaginary center line of the connecting terminal is perpendicular to the one side of the printed circuit board. The less a horizontal distance between the center line of connecting terminal and one of the connectors, the larger a vertical distance between the side of the printed circuit board and the one of the connector.
Abstract:
A printed circuit board includes a top layer and a bottom layer. A power supply and an electronic component are located on the top layer. The power supply is connected to the top layer and the bottom layer through a first via. A number of second vias extends through the top layer and the bottom layer, and is electrically connected to the top layer and the bottom layer. A right-angled triangular void area without vias defined therein is formed on the printed circuit board, between the second vias and the electronic component. The second vias are arranged on a hypotenuse of the void area.
Abstract:
A system and method for checking a ground via of control chips of a printed circuit board (PCB) provides a graphical user interface (GUI) displaying a layout of the PCB. The control chip has a plurality of ground pins. The computer searches for signal path routing of each ground pin and ground vias along each signal path routing of each ground pin. If there are any ground vias having the same absolute coordinates, the computer determines that the ground vias are shared by more than one ground pin.
Abstract:
A system for automatically calculating parameters of an MOSFET is disclosed. The parameter calculating system runs in a computer. The parameter calculating system is used for receiving values inputted, and for calculating parameters of the MOSFET according to the input values. The parameter calculating system includes an operation selecting module (110), a value receiving module (120), a judging module (130), a parameter calculating module (140), and a circuit netlist generating module (150). A related method is also disclosed.
Abstract:
A printed circuit board (PCB) includes first to fourth layers. A power supply is arranged on the first layer. An electronic component is arranged on the fourth layer. A first via and a second via extend through the PCB and are electrically connected to the electronic component. The PCB further includes third to seventh vias. A length of a transmission path of the current flows from the power supply to electronic component through the third via and the seventh via is almost the same as a length of a transmission path of the current flows from the power supply to the electronic component through the fourth to sixth vias.