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公开(公告)号：US4794349A
公开(公告)日：1988-12-27
申请号：US82608
申请日：1987-08-07
IPC分类号： H01L27/092 , H01L21/8238 , H03F1/08 , H03F3/20 , H03F3/26 , H03F3/30 , H03F3/34 , H03F3/45 , H03F3/68
CPC分类号： H03F3/3064 , H03F1/086 , H03F3/3028 , H03F3/45192 , H03F3/4565 , H03F2203/45421 , H03F2203/45574 , H03F2203/45674
摘要： A fully differential, CMOS, operational power amplifier, particularly useful as output buffer in monolithic analog subsystems, includes an input differential stage, two gain stages and two output stages. Each output stage may be individually provided with a functional feedback loop and locally compensated for reestablishing sufficient stability. An output common mode control circuit, operable in a continuous or sampled manner, is also contemplated, as well as a special circuit for controlling the DC biasing current through the output stages under rest conditions. The amplifier may be used indifferently as a balanced (differential) output or as a single-ended output amplifier without any depression of its performances.
摘要翻译： 全差分CMOS运算功率放大器，特别适用于单片模拟子系统中的输出缓冲器，包括输入差分级，两个增益级和两个输出级。 每个输出级可以单独地设置有功能反馈回路，并且被局部补偿以重新建立足够的稳定性。 也可考虑以连续或采样方式操作的输出共模控制电路，以及用于在静止条件下控制通过输出级的直流偏置电流的特殊电路。 放大器可以无差别地用作平衡（差分）输出或单端输出放大器，而不会降低其性能。
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公开(公告)号：US4920510A
公开(公告)日：1990-04-24
申请号：US63258
申请日：1987-06-17
CPC分类号： H03H17/02
摘要： The sampled-data band-pass filter device is based on the phenomemon of aliasing, and allows the substantially unattenuated passage of the components of an input signal at a frequency included within an interval comprised between a first frequency (f.sub.sL) and a second frequency (f.sub.sH), arranged around a third frequency (f.sub.sO), while it substantially attenuates the components of the input signal at frequencies outside said interval, and furthermore automatically performs the shift to low-frequency, around a fourth frequency (f.sub.O), of the components of the input signal which have passed without attenuation. According to the invention, the device comprises, as filter element, a sampled-data band-pass filter which employs, as sampling frequency, a fifth frequency (f.sub.s) equal to a whole submultiple of a sixth frequency (nf.sub.s) equal to the sum of the third frequency (f.sub.sO) and the fourth frequency (f.sub.O), having, as lower and upper cutoff frequencies, respectively the difference between the sixth frequency and the second frequency (nf.sub.s -f.sub.sH) and the difference between the sixth frequency and the first frequency (nf.sub.s -f.sub.sL).
摘要翻译： 采样数据带通滤波器装置基于混叠的特征，并且允许以包括在第一频率（fsL）和第二频率（fsL）之间的间隔内的频率的输入信号的分量的基本上未衰减的通过 fsH），其大致在第三频率（fs0）周围的频率衰减输入信号的分量，并且还自动地执行向组件的第四频率（f0）附近的低频移位 通过没有衰减的输入信号。 根据本发明，该装置包括作为滤波器元件的采样数据带通滤波器，采样数据带通滤波器采用等于等于总和的第六频率（nfs）的整数倍的第五频率（fs）作为采样频率 具有分别为第六频率和第二频率（nfs-fsH）之间的差和第六频率与第一频率之间的差的第三频率（fs0）和第四频率（f0）分别为下限和上限截止频率 频率（nfs-fsL）。
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3.发明授权Method of reconstructing an analog signal, particularly in digital telephony applications, and a circuit device implementing the method 失效重建模拟信号的方法，特别是数字电话应用中的模拟信号，以及实现该方法的电路装置
公开(公告)号：US5014304A
公开(公告)日：1991-05-07
申请号：US469759
申请日：1990-01-24
IPC分类号： H04B14/04
CPC分类号： H04B14/04
摘要： A method of reconstructing an analog signal, particularly for digital telephony, comprises a first step of digital-to-analog conversion, wherein a first reconstruction of the analog signal is provided by introducing a distortion component into the frequency spectrum whose amplitude decreases with the signal frequency, and a second step of filtering carried out by means of a reconstruction filter provided with integrators and having a cut-off frequency F.sub.t. That attenuating distortion component is utilized instead of one of the integrators in the reconstruction filter, to afford a reduction of the overall design of the circuit device operating in accordance with this method, and bring about, as a result, decreased occupation of the integrated circuit and power dissipation.
摘要翻译： 一种重建模拟信号，特别是数字电话的方法包括数模转换的第一步骤，其中模拟信号的第一重建是通过将失真分量引入振幅随信号幅度减小的频谱中而提供的 频率，以及通过具有积分器并具有截止频率Ft的重构滤波器进行滤波的第二步骤。 利用该衰减失真分量代替重构滤波器中的一个积分器，以减少根据该方法工作的电路装置的总体设计，并且导致集成电路的占用减少 和功耗。
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4.发明授权Apparatus and method for offset voltage correction in an analog to digital converter 失效用于模数转换器中偏移电压校正的装置和方法
公开(公告)号：US4799042A
公开(公告)日：1989-01-17
申请号：US936368
申请日：1986-12-01
CPC分类号： H03M1/1047 , H03M1/464 , H03M1/804
摘要： A charge redistribution analog-to-digital converter is described that permits their ncorporation of offset voltage correction to provide an accurate reflection in the digitalized output signal of the analog input signal. In a distributed capacitor successive approximation device, additional capacitors are added both to a most significant bit array group of capacitors and to a least significant array group of capacitors that are used in conjunction with the offset voltage. The value of the offset voltage is stored in a register and the register determines various switch positions that determine the value of the offset voltage incorporated in the final output voltage.
摘要翻译： 描述了一种电荷再分配模数转换器，其允许其偏移电压校正的组合在模拟输入信号的数字化输出信号中提供准确的反射。 在分布式电容器逐次逼近装置中，附加电容器被添加到最高有效比特阵列组的电容器和与偏移电压结合使用的最不重要的阵列组的电容器。 偏移电压的值存储在寄存器中，并且寄存器确定确定最终输出电压中所包含的偏移电压的值的各种开关位置。
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5.发明授权CMOS output stage with large voltage swing and with stabilization of the quiescent current 失效CMOS输出级具有较大的电压摆幅和稳定的静态电流
公开(公告)号：US4730168A
公开(公告)日：1988-03-08
申请号：US896205
申请日：1986-08-14
IPC分类号： H01L21/8238 , H01L21/8234 , H01L27/088 , H01L27/092 , H03F1/32 , H03F3/18 , H03F3/30 , H03F3/45
CPC分类号： H03F1/3205 , H03F3/3001
摘要： A CMOS output stage with large voltage swing particularly suited for output buffers in monolithic analog subsystems has two, push-pull connected, complementary MOS transistors and has feedback for improving its swing and linearity characteristics in comparison with those of the output stages without feedback of the prior art and also has sufficient stability characteristics which are re-established by local compensation. Furthermore the quiescent current is stabilized by a dedicated control circuit cooperating with a local feedback circuit.
摘要翻译： 具有特别适合于单片模拟子系统中的输出缓冲器的具有大电压摆幅的CMOS输出级具有两个推挽式连接的互补MOS晶体管，并且具有用于提高其摆幅和线性特性的反馈，与不输出级的反馈相比， 现有技术也具有足够的稳定特性，这些特性通过局部补偿重新建立。 此外，静态电流由与局部反馈电路协作的专用控制电路稳定。
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6.发明授权Internal all-differential operational amplifier for CMOS integrated circuits 失效用于CMOS集成电路的内部全差分运算放大器
公开(公告)号：US4714895A
公开(公告)日：1987-12-22
申请号：US918101
申请日：1986-10-14
IPC分类号： H03F3/45
CPC分类号： H03F3/45179 , H03F3/45188 , H03F3/45192 , H03F3/4565 , H03F3/45654 , H03F3/45986 , H03F2203/45012 , H03F2203/45028 , H03F2203/45082 , H03F2203/45184 , H03F2203/45421 , H03F2203/45466 , H03F2203/45651
摘要： The amplifier comprises two like CMOS cascode circuits, each having a first and a second transistors with channels having a first plurality and a third and fourth transistors with channels having the opposite polarity, the drain of the first transistor being connected to the source of the second transistor, and the drain of the fourth transistor being connected to the source of the third transistor, the drains of the second and of the third transistors being connected to each other end composing one of the output terminals of the amplifier, the sources of the first transistors being connected to each other and to the drain of a fifth transistor with a channel having the first polarity, the source of which is fed by a first supply voltage, the sources of the fourth transistors of the two cascode circuits being fed by a second supply voltage.
摘要翻译： 放大器包括两个类似的CMOS共源共栅电路，每个具有第一和第二晶体管，沟道具有第一多个第一和第二晶体管，第三和第四晶体管的沟道具有相反的极性，第一晶体管的漏极连接到第二晶体管的源极 晶体管，并且第四晶体管的漏极连接到第三晶体管的源极，第二和第三晶体管的漏极连接到构成放大器的输出端之一的另一端，第一晶体管的源极 晶体管彼此连接并连接到第五晶体管的漏极，第五晶体管的沟道具有第一极性的沟道，其源极由第一电源电压馈送，两个共源共栅电路的第四晶体管的源极被馈送第二极性 电源电压。
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7.发明授权Two-stage fully differential operational amplifier with efficient common mode feed-back circuit 失效两级全差分运算放大器，具有高效的共模反馈电路
公开(公告)号：US5955922A
公开(公告)日：1999-09-21
申请号：US956274
申请日：1997-10-22
IPC分类号： H03F3/45
CPC分类号： H03F3/45192 , H03F3/45654 , H03F3/45659 , H03F2203/45421 , H03F2203/45631 , H03F2203/45711
摘要： The circuit of a two-stage fully differential amplifier includes a differential input stage, two output stages and a common mode feedback circuit coupled to the output nodes of the amplifier. The amplifier also includes a non-inverting stage coupled to a respective output node of the differential input stage for driving the respective output stage. Each auxiliary non-inverting stage of the two branches of the fully differential amplifier uses as a biasing current generator, the load device of the branch of the differential input stage to the output of which the non-inverting stage is coupled. The fully differential amplifier permits the use of a null-consumption common mode feedback circuit as normally employed only in a single stage fully differential amplifier.
摘要翻译： 两级全差分放大器的电路包括差分输入级，两个输出级和耦合到放大器的输出节点的共模反馈电路。 放大器还包括非反相级，其耦合到差分输入级的相应输出节点，用于驱动相应的输出级。 全差分放大器的两个分支的每个辅助非反相级用作偏置电流发生器，差分输入级的分支的负载装置到非反相级耦合的输出端。 全差分放大器允许使用通常仅在单级全差分放大器中使用的零消耗共模反馈电路。
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8.发明授权Circuit for PCM conversion of an analog signal, with improvement in gain-tracking 失效模拟信号的PCM转换电路，具有增益跟踪的改进
公开(公告)号：US5287106A
公开(公告)日：1994-02-15
申请号：US187507
申请日：1988-04-28
CPC分类号： H03M1/0604 , H03M1/12
摘要： The circuit includes a filter to which an analog signal is applied, a quantizer driven by the filter, a sampler at a desired frequency driven by the quantizer and a PCM encoder driven by the sampler. The quantizer generates a quantize signal according to the received analog signal and further generates a difference signal according to the difference between a quantized signal and the analog signal. A feedback circuit feeds back the difference signal from the quantizer to a stage of the filter so that the overall transfer function from the input of the feedback circuit to the output of the filter is equivalent to a low pass filtering.
摘要翻译： 电路包括施加模拟信号的滤波器，由滤波器驱动的量化器，由量化器驱动的期望频率的采样器和由采样器驱动的PCM编码器。 量化器根据接收到的模拟信号生成量化信号，并根据量化信号和模拟信号之间的差产生差分信号。 反馈电路将差分信号从量化器反馈到滤波器的级，使得从反馈电路的输入到滤波器的输出的整体传递函数等效于低通滤波。
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9.发明授权Integrated active electronic switched capacitor filter having extremely low sensitivity to variations of the components 失效集成的有源电子开关电容滤波器对组件的变化具有极低的灵敏度
公开(公告)号：US4920325A
公开(公告)日：1990-04-24
申请号：US160643
申请日：1988-02-26
CPC分类号： H03H19/004
摘要： The filter comprises four operational amplifiers in cascade, with switched capacitors in series at the input of every amplifier, with fixed capacitors in parallel to two of said amplifiers, with fixed and switched capacitors in parallel to the remaining amplifiers, and with fixed and switched capacitors in common to groups of several amplifiers in cascade. According to the invention, a path of fixed and switched capacitors in parallel connects the input of the filter to the input of the fourth amplifier, and a fixed capacitor connects the input of the filter to the input of the second amplifier.
摘要翻译： 滤波器包括四个级联的运算放大器，每个放大器的输入端串联开关电容器，并联两个放大器的固定电容器，固定和开关电容器与其余放大器并联，并具有固定和开关电容 共同的几个级联的放大器的组。 根据本发明，并联的固定和开关电容器的路径将滤波器的输入端连接到第四放大器的输入端，固定电容器将滤波器的输入端连接到第二放大器的输入端。
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公开(公告)号：US4829266A
公开(公告)日：1989-05-09
申请号：US206016
申请日：1988-06-10
CPC分类号： H03F1/083 , H03F3/3001
摘要： A CMOS power operational amplifier with large output voltage swing and high noise rejection is obtained by coupling a folded cascode type differential input stage and an output stage comprising an intermediate signal shifting amplifier and two common source output stages. Constant current generators inject into the drain of grounded gate MOS transistors pairs of said folded cascode type stage and of said intermediate signal shifting amplifier, respectively, a current which is pulled out of the source of the same grounded gate transistors by other constant current generators for increasing the effective transconductance of said grounded gate transistors pairs.
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