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公开(公告)号：US20130106473A1
公开(公告)日：2013-05-02
申请号：US13281921
申请日：2011-10-26
IPC分类号： H03L7/00
CPC分类号： H03L5/00 , H03K17/223
摘要： The disclosed power-on reset circuit provides an indication of when and whether a supply voltage Vdd has reached a trigger voltage level Vtrig. The disclosed circuit includes a flip-flop circuit and a first comparator circuit. The circuit according to the invention has a D input node of the flip-flop circuit coupled to the supply voltage. The first comparator circuit outputs a clock signal, where the flip-flop circuit is clocked by the clock signal. A Q output node of the flip-flop circuit provides the power-on reset signal, where the power-on reset signal is in a LO state when the supply voltage is at a voltage level that is less than the trigger voltage level Vtrig. The power-on reset signal is in a HI state when the supply voltage is at a voltage level that is greater than the trigger voltage level Vtrig.
摘要翻译： 所公开的上电复位电路提供电源电压Vdd何时以及是否达到触发电压电平Vtrig的指示。 所公开的电路包括触发器电路和第一比较器电路。 根据本发明的电路具有耦合到电源电压的触发器电路的D输入节点。 第一比较器电路输出时钟信号，其中触发电路由时钟信号计时。 触发电路的Q输出节点提供上电复位信号，当供电电压处于小于触发电压电平Vtrig的电压电平时，上电复位信号处于LO状态。 当电源电压处于大于触发电压电平Vtrig的电压电平时，上电复位信号处于HI状态。
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公开(公告)号：US08415993B1
公开(公告)日：2013-04-09
申请号：US13281921
申请日：2011-10-26
IPC分类号： H03L7/00
CPC分类号： H03L5/00 , H03K17/223
摘要： The disclosed power-on reset circuit provides an indication of when and whether a supply voltage Vdd has reached a trigger voltage level Vtrig. The disclosed circuit includes a flip-flop circuit and a first comparator circuit. The circuit according to the invention has a D input node of the flip-flop circuit coupled to the supply voltage. The first comparator circuit outputs a clock signal, where the flip-flop circuit is clocked by the clock signal. A Q output node of the flip-flop circuit provides the power-on reset signal, where the power-on reset signal is in a LO state when the supply voltage is at a voltage level that is less than the trigger voltage level Vtrig. The power-on reset signal is in a HI state when the supply voltage is at a voltage level that is greater than the trigger voltage level Vtrig.
摘要翻译： 所公开的上电复位电路提供电源电压Vdd何时以及是否达到触发电压电平Vtrig的指示。 所公开的电路包括触发器电路和第一比较器电路。 根据本发明的电路具有耦合到电源电压的触发器电路的D输入节点。 第一比较器电路输出时钟信号，其中触发电路由时钟信号计时。 触发电路的Q输出节点提供上电复位信号，当供电电压处于小于触发电压电平Vtrig的电压电平时，上电复位信号处于LO状态。 当电源电压处于大于触发电压电平Vtrig的电压电平时，上电复位信号处于HI状态。
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公开(公告)号：US08395456B2
公开(公告)日：2013-03-12
申请号：US13049738
申请日：2011-03-16
IPC分类号： H03B5/30
CPC分类号： H03G3/004 , H03B5/30 , H03F3/45071 , H03H11/22
摘要： A variable phase amplifier circuit is disclosed and its method of use in tuning devices having resonators. The variable phase amplifier receives an input differential signal pair. The input differential signal pair can be generated by a resonator device. The variable phase amplifier generates a modified differential signal pair in response to receiving the input differential signal pair. The variable phase amplifier provides a means to vary the phase of the modified differential signal pair with respect to the input differential signal pair, in an accurate and stable manner. If the modified differential signal pair with a phase shift introduced in it is fed back to the resonator device, the resonator will change its frequency of oscillation, where the new frequency of oscillation is a function of the phase of the modified differential signal pair.
摘要翻译： 公开了一种可变相位放大器电路及其在具有谐振器的调谐装置中的使用方法。 可变相位放大器接收输入差分信号对。 输入差分信号对可以由谐振器装置产生。 响应于接收到输入差分信号对，可变相位放大器产生修正的差分信号对。 可变相位放大器提供了以准确和稳定的方式改变修改的差分信号对相对于输入差分信号对的相位的装置。 如果将其中引入的相移的修正的差分信号对反馈到谐振器装置，则谐振器将改变其振荡频率，其中新的振荡频率是修改的差分信号对的相位的函数。
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公开(公告)号：US20110163819A1
公开(公告)日：2011-07-07
申请号：US13049738
申请日：2011-03-16
CPC分类号： H03G3/004 , H03B5/30 , H03F3/45071 , H03H11/22
摘要： A variable phase amplifier circuit is disclosed and its method of use in tuning devices having resonators. The variable phase amplifier receives an input differential signal pair. The input differential signal pair can be generated by a resonator device. The variable phase amplifier generates a modified differential signal pair in response to receiving the input differential signal pair. The variable phase amplifier provides a means to vary the phase of the modified differential signal pair with respect to the input differential signal pair, in an accurate and stable manner. If the modified differential signal pair with a phase shift introduced in it is fed back to the resonator device, the resonator will change its frequency of oscillation, where the new frequency of oscillation is a function of the phase of the modified differential signal pair.
摘要翻译： 公开了一种可变相位放大器电路及其在具有谐振器的调谐装置中的使用方法。 可变相位放大器接收输入差分信号对。 输入差分信号对可以由谐振器装置产生。 响应于接收到输入差分信号对，可变相位放大器产生修正的差分信号对。 可变相位放大器提供了以准确和稳定的方式改变修改的差分信号对相对于输入差分信号对的相位的装置。 如果将其中引入的相移的修正的差分信号对反馈到谐振器装置，则谐振器将改变其振荡频率，其中新的振荡频率是修改的差分信号对的相位的函数。
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公开(公告)号：US08791762B2
公开(公告)日：2014-07-29
申请号：US13272587
申请日：2011-10-13
IPC分类号： H03L7/00
摘要： Frequency synthesizers for use with oscillators that generate an arbitrary frequency are described, as well as related devices and methods. Divider information can be generated or otherwise accessed for use in configuring a phase lock loop device that is adapted for coupling with the oscillator, where the phase lock loop device can include a plurality of integer dividers without utilizing a fractional divider, where the divider information can include frequency deviations corresponding to groups of integer divider settings for the phase lock loop device, and where each deviation of the frequency deviations can be based on a frequency differential between a standard operating frequency and an output frequency for the phase lock loop utilizing one group of integer divider settings from the groups of integer divider settings.
摘要翻译： 描述了与产生任意频率的振荡器一起使用的频率合成器，以及相关的装置和方法。 可以生成或以其他方式访问分频器信息以用于配置适于与振荡器耦合的锁相环装置，其中锁相环装置可以包括多个整数除数器而不使用分数分频器，其中分频器信息可以 包括对应于锁相环装置的整数分频器设置组的频率偏差，并且其中频偏的每个偏差可以基于使用一组的锁相环的锁相环的标准工作频率和输出频率之间的频率差 来自整数分频器设置组的整数分频器设置。
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6.发明授权Microelectromechanical systems (MEMS) resonators and related apparatus and methods 有权微机电系统（MEMS）谐振器及相关设备和方法公开(公告)号：US08698376B2
公开(公告)日：2014-04-15
申请号：US13681904
申请日：2012-11-20
申请人： David M. Chen , Jan H. Kuypers , Pritiraj Mohanty , Klaus Juergen Schoepf , Guiti Zolfagharkhani , Jason Goodelle , Reimund Rebel
发明人： David M. Chen , Jan H. Kuypers , Pritiraj Mohanty , Klaus Juergen Schoepf , Guiti Zolfagharkhani , Jason Goodelle , Reimund Rebel
IPC分类号： H01L41/04
CPC分类号： H01L41/053 , B81B3/0018 , H01L2224/11 , H01L2224/48091 , H02N1/006 , H03H3/007 , H03H9/02007 , H03H9/02244 , H03H9/02535 , H03H2009/241
摘要： Devices having piezoelectric material structures integrated with substrates are described. Fabrication techniques for forming such devices are also described. The fabrication may include bonding a piezoelectric material wafer to a substrate of a differing material. A structure, such as a resonator, may then be formed from the piezoelectric material wafer.
摘要翻译： 描述了具有与基板一体化的压电材料结构的装置。 还描述了用于形成这种装置的制造技术。 该制造可以包括将压电材料晶片结合到不同材料的衬底。 然后可以由压电材料晶片形成诸如谐振器的结构。
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公开(公告)号：US20130141173A1
公开(公告)日：2013-06-06
申请号：US13681611
申请日：2012-11-20
IPC分类号： H03L7/00
CPC分类号： H03L7/00 , H03B5/30 , H03H9/17 , H03H9/2426 , H03H9/25 , H03H2009/02204
摘要： Methods and apparatus for tuning devices having mechanical resonators are described. In one implementation, a mechanical resonator and a phase shifter are configured in a feedback loop, so that the phase shifter shifts the phase of the resonator output signal. The amount of phase shift induced by the phase shifter may be variable. In another implementation, an LC tuning subcircuit is coupled to a mechanical resonator. In some implementations, the LC tuning subcircuit has a variable capacitance. One or more of the apparatus described herein may be implemented as part, or all, of a microelectromechanical system (MEMS).
摘要翻译： 描述了具有机械谐振器的调谐装置的方法和装置。 在一个实现中，机械谐振器和移相器被配置在反馈环路中，使得移相器移位谐振器输出信号的相位。 由移相器引起的相移量可以是可变的。 在另一实现中，LC调谐子电路耦合到机械谐振器。 在一些实现中，LC调谐子电路具有可变电容。 本文所描述的一种或多种装置可以被实现为微机电系统（MEMS）的一部分或全部。
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公开(公告)号：US20110151856A1
公开(公告)日：2011-06-23
申请号：US12721472
申请日：2010-03-10
CPC分类号： H03B5/30 , H03B5/32 , H03B19/00 , H03C3/095 , H03J7/065 , H03L7/0991 , H03L7/18 , H03L7/197 , H04B1/40
摘要： Systems and methods for operating with oscillators configured to produce an oscillating signal having an arbitrary frequency are described. The frequency of the oscillating signal may be shifted to remove its arbitrary nature by application of multiple tuning signals or values to the oscillator. Alternatively, the arbitrary frequency may be accommodated by adjusting operation one or more components of a circuit receiving the oscillating signal.
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公开(公告)号：US20100181868A1
公开(公告)日：2010-07-22
申请号：US12639260
申请日：2009-12-16
申请人： Alexei Gaidarzhy , Jan H. Kuypers , David M. Chen , Guiti Zolfagharkhani , Pritiraj Mohanty , Reimund Rebel , Klaus Juergen Schoepf
发明人： Alexei Gaidarzhy , Jan H. Kuypers , David M. Chen , Guiti Zolfagharkhani , Pritiraj Mohanty , Reimund Rebel , Klaus Juergen Schoepf
IPC分类号： H01L41/047
CPC分类号： H03H9/0095 , H03H9/02102 , H03H9/02228
摘要： Multi-port devices having multiple electrical ports are described, as are related methods. Some of the multi-port devices may have two input ports and two output ports, and may be driven differentially, in a single-ended mode, in a single-ended to differential mode, or in a differential to single-ended mode. The multi-port devices may include one or more transducers coupled to the electrical ports.
摘要翻译： 具有多个电端口的多端口设备也被描述为相关方法。 一些多端口设备可以具有两个输入端口和两个输出端口，并且可以以单端模式，单端到差分模式或差分到单端模式在差分地驱动。 多端口设备可以包括耦合到电端口的一个或多个换能器。
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公开(公告)号：US08604888B2
公开(公告)日：2013-12-10
申请号：US12977367
申请日：2010-12-23
摘要： Systems and methods for operating with oscillators configured to produce an oscillating signal having an arbitrary frequency are described. The frequency of the oscillating signal may be shifted to remove its arbitrary nature by application of multiple tuning signals or values to the oscillator. Alternatively, the arbitrary frequency may be accommodated by adjusting operation one or more components of a circuit receiving the oscillating signal.
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